vkd3d-shader/ir: Pass a uint32_t write mask to vkd3d_write_mask_get_component_idx().

This commit is contained in:
Henri Verbeet 2023-12-05 22:19:07 +01:00 committed by Alexandre Julliard
parent 09235d9e09
commit e1aa12f94b
Notes: Alexandre Julliard 2023-12-13 23:23:35 +01:00
Approved-by: Alexandre Julliard (@julliard)
Merge-Request: https://gitlab.winehq.org/wine/vkd3d/-/merge_requests/522
3 changed files with 27 additions and 27 deletions

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@ -593,18 +593,18 @@ struct signature_element *vsir_signature_find_element_for_reg(const struct shade
} }
static unsigned int range_map_get_register_count(uint8_t range_map[][VKD3D_VEC4_SIZE], static unsigned int range_map_get_register_count(uint8_t range_map[][VKD3D_VEC4_SIZE],
unsigned int register_idx, unsigned int write_mask) unsigned int register_idx, uint32_t write_mask)
{ {
return range_map[register_idx][vkd3d_write_mask_get_component_idx(write_mask)]; return range_map[register_idx][vsir_write_mask_get_component_idx(write_mask)];
} }
static void range_map_set_register_range(uint8_t range_map[][VKD3D_VEC4_SIZE], unsigned int register_idx, static void range_map_set_register_range(uint8_t range_map[][VKD3D_VEC4_SIZE], unsigned int register_idx,
unsigned int register_count, unsigned int write_mask, bool is_dcl_indexrange) unsigned int register_count, uint32_t write_mask, bool is_dcl_indexrange)
{ {
unsigned int i, j, r, c, component_idx, component_count; unsigned int i, j, r, c, component_idx, component_count;
assert(write_mask <= VKD3DSP_WRITEMASK_ALL); assert(write_mask <= VKD3DSP_WRITEMASK_ALL);
component_idx = vkd3d_write_mask_get_component_idx(write_mask); component_idx = vsir_write_mask_get_component_idx(write_mask);
component_count = vkd3d_write_mask_component_count(write_mask); component_count = vkd3d_write_mask_component_count(write_mask);
assert(register_idx < MAX_REG_OUTPUT && MAX_REG_OUTPUT - register_idx >= register_count); assert(register_idx < MAX_REG_OUTPUT && MAX_REG_OUTPUT - register_idx >= register_count);
@ -899,7 +899,7 @@ static bool shader_dst_param_io_normalise(struct vkd3d_shader_dst_param *dst_par
element_idx = shader_signature_find_element_for_reg(signature, reg_idx, write_mask); element_idx = shader_signature_find_element_for_reg(signature, reg_idx, write_mask);
e = &signature->elements[element_idx]; e = &signature->elements[element_idx];
dst_param->write_mask >>= vkd3d_write_mask_get_component_idx(e->mask); dst_param->write_mask >>= vsir_write_mask_get_component_idx(e->mask);
if (is_io_dcl) if (is_io_dcl)
{ {
/* Validated in the TPF reader. */ /* Validated in the TPF reader. */
@ -1011,7 +1011,7 @@ static void shader_src_param_io_normalise(struct vkd3d_shader_src_param *src_par
reg->idx[id_idx].offset = element_idx; reg->idx[id_idx].offset = element_idx;
reg->idx_count = id_idx + 1; reg->idx_count = id_idx + 1;
if ((component_idx = vkd3d_write_mask_get_component_idx(e->mask))) if ((component_idx = vsir_write_mask_get_component_idx(e->mask)))
{ {
for (i = 0; i < VKD3D_VEC4_SIZE; ++i) for (i = 0; i < VKD3D_VEC4_SIZE; ++i)
if (vkd3d_swizzle_get_component(src_param->swizzle, i)) if (vkd3d_swizzle_get_component(src_param->swizzle, i))

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@ -3604,8 +3604,8 @@ static bool vkd3d_swizzle_is_scalar(unsigned int swizzle)
} }
static uint32_t spirv_compiler_emit_swizzle(struct spirv_compiler *compiler, static uint32_t spirv_compiler_emit_swizzle(struct spirv_compiler *compiler,
uint32_t val_id, unsigned int val_write_mask, enum vkd3d_shader_component_type component_type, uint32_t val_id, uint32_t val_write_mask, enum vkd3d_shader_component_type component_type,
unsigned int swizzle, unsigned int write_mask) unsigned int swizzle, uint32_t write_mask)
{ {
unsigned int i, component_idx, component_count, val_component_count; unsigned int i, component_idx, component_count, val_component_count;
struct vkd3d_spirv_builder *builder = &compiler->spirv_builder; struct vkd3d_spirv_builder *builder = &compiler->spirv_builder;
@ -3622,9 +3622,9 @@ static uint32_t spirv_compiler_emit_swizzle(struct spirv_compiler *compiler,
if (component_count == 1) if (component_count == 1)
{ {
component_idx = vkd3d_write_mask_get_component_idx(write_mask); component_idx = vsir_write_mask_get_component_idx(write_mask);
component_idx = vkd3d_swizzle_get_component(swizzle, component_idx); component_idx = vkd3d_swizzle_get_component(swizzle, component_idx);
component_idx -= vkd3d_write_mask_get_component_idx(val_write_mask); component_idx -= vsir_write_mask_get_component_idx(val_write_mask);
return vkd3d_spirv_build_op_composite_extract1(builder, type_id, val_id, component_idx); return vkd3d_spirv_build_op_composite_extract1(builder, type_id, val_id, component_idx);
} }
@ -3742,7 +3742,7 @@ static uint32_t spirv_compiler_emit_load_undef(struct spirv_compiler *compiler,
} }
static uint32_t spirv_compiler_emit_load_scalar(struct spirv_compiler *compiler, static uint32_t spirv_compiler_emit_load_scalar(struct spirv_compiler *compiler,
const struct vkd3d_shader_register *reg, DWORD swizzle, DWORD write_mask, const struct vkd3d_shader_register *reg, DWORD swizzle, uint32_t write_mask,
const struct vkd3d_shader_register_info *reg_info) const struct vkd3d_shader_register_info *reg_info)
{ {
struct vkd3d_spirv_builder *builder = &compiler->spirv_builder; struct vkd3d_spirv_builder *builder = &compiler->spirv_builder;
@ -3754,7 +3754,7 @@ static uint32_t spirv_compiler_emit_load_scalar(struct spirv_compiler *compiler,
assert(!register_is_constant_or_undef(reg)); assert(!register_is_constant_or_undef(reg));
assert(vkd3d_write_mask_component_count(write_mask) == 1); assert(vkd3d_write_mask_component_count(write_mask) == 1);
component_idx = vkd3d_write_mask_get_component_idx(write_mask); component_idx = vsir_write_mask_get_component_idx(write_mask);
component_idx = vkd3d_swizzle_get_component(swizzle, component_idx); component_idx = vkd3d_swizzle_get_component(swizzle, component_idx);
skipped_component_mask = ~reg_info->write_mask & ((VKD3DSP_WRITEMASK_0 << component_idx) - 1); skipped_component_mask = ~reg_info->write_mask & ((VKD3DSP_WRITEMASK_0 << component_idx) - 1);
if (skipped_component_mask) if (skipped_component_mask)
@ -4049,8 +4049,8 @@ static uint32_t spirv_compiler_emit_load_src_with_type(struct spirv_compiler *co
} }
static void spirv_compiler_emit_store_scalar(struct spirv_compiler *compiler, static void spirv_compiler_emit_store_scalar(struct spirv_compiler *compiler,
uint32_t dst_id, unsigned int dst_write_mask, enum vkd3d_shader_component_type component_type, uint32_t dst_id, uint32_t dst_write_mask, enum vkd3d_shader_component_type component_type,
SpvStorageClass storage_class, unsigned int write_mask, uint32_t val_id) SpvStorageClass storage_class, uint32_t write_mask, uint32_t val_id)
{ {
struct vkd3d_spirv_builder *builder = &compiler->spirv_builder; struct vkd3d_spirv_builder *builder = &compiler->spirv_builder;
uint32_t type_id, ptr_type_id, index; uint32_t type_id, ptr_type_id, index;
@ -4060,8 +4060,8 @@ static void spirv_compiler_emit_store_scalar(struct spirv_compiler *compiler,
{ {
type_id = vkd3d_spirv_get_type_id(builder, component_type, 1); type_id = vkd3d_spirv_get_type_id(builder, component_type, 1);
ptr_type_id = vkd3d_spirv_get_op_type_pointer(builder, storage_class, type_id); ptr_type_id = vkd3d_spirv_get_op_type_pointer(builder, storage_class, type_id);
component_idx = vkd3d_write_mask_get_component_idx(write_mask); component_idx = vsir_write_mask_get_component_idx(write_mask);
component_idx -= vkd3d_write_mask_get_component_idx(dst_write_mask); component_idx -= vsir_write_mask_get_component_idx(dst_write_mask);
index = spirv_compiler_get_constant_uint(compiler, component_idx); index = spirv_compiler_get_constant_uint(compiler, component_idx);
dst_id = vkd3d_spirv_build_op_in_bounds_access_chain1(builder, ptr_type_id, dst_id, index); dst_id = vkd3d_spirv_build_op_in_bounds_access_chain1(builder, ptr_type_id, dst_id, index);
} }
@ -4070,7 +4070,7 @@ static void spirv_compiler_emit_store_scalar(struct spirv_compiler *compiler,
} }
static void spirv_compiler_emit_store(struct spirv_compiler *compiler, static void spirv_compiler_emit_store(struct spirv_compiler *compiler,
uint32_t dst_id, unsigned int dst_write_mask, enum vkd3d_shader_component_type component_type, uint32_t dst_id, uint32_t dst_write_mask, enum vkd3d_shader_component_type component_type,
SpvStorageClass storage_class, unsigned int write_mask, uint32_t val_id) SpvStorageClass storage_class, unsigned int write_mask, uint32_t val_id)
{ {
struct vkd3d_spirv_builder *builder = &compiler->spirv_builder; struct vkd3d_spirv_builder *builder = &compiler->spirv_builder;
@ -4088,7 +4088,7 @@ static void spirv_compiler_emit_store(struct spirv_compiler *compiler,
{ {
type_id = vkd3d_spirv_get_type_id(builder, component_type, 1); type_id = vkd3d_spirv_get_type_id(builder, component_type, 1);
val_id = vkd3d_spirv_build_op_composite_extract1(builder, type_id, val_id, val_id = vkd3d_spirv_build_op_composite_extract1(builder, type_id, val_id,
vkd3d_write_mask_get_component_idx(dst_write_mask)); vsir_write_mask_get_component_idx(dst_write_mask));
write_mask &= dst_write_mask; write_mask &= dst_write_mask;
component_count = 1; component_count = 1;
} }
@ -4239,7 +4239,7 @@ static void spirv_compiler_emit_store_dst_scalar(struct spirv_compiler *compiler
uint32_t component_ids[VKD3D_VEC4_SIZE]; uint32_t component_ids[VKD3D_VEC4_SIZE];
unsigned int component_idx, i; unsigned int component_idx, i;
component_idx = vkd3d_write_mask_get_component_idx(dst->write_mask); component_idx = vsir_write_mask_get_component_idx(dst->write_mask);
for (i = 0; i < component_count; ++i) for (i = 0; i < component_count; ++i)
{ {
if (vkd3d_swizzle_get_component(swizzle, component_idx + i)) if (vkd3d_swizzle_get_component(swizzle, component_idx + i))
@ -4779,7 +4779,7 @@ static uint32_t spirv_compiler_emit_input(struct spirv_compiler *compiler,
enum vkd3d_shader_component_type component_type; enum vkd3d_shader_component_type component_type;
const struct vkd3d_spirv_builtin *builtin; const struct vkd3d_spirv_builtin *builtin;
enum vkd3d_shader_sysval_semantic sysval; enum vkd3d_shader_sysval_semantic sysval;
unsigned int write_mask, reg_write_mask; uint32_t write_mask, reg_write_mask;
struct vkd3d_symbol *symbol = NULL; struct vkd3d_symbol *symbol = NULL;
uint32_t val_id, input_id, var_id; uint32_t val_id, input_id, var_id;
uint32_t type_id, float_type_id; uint32_t type_id, float_type_id;
@ -4822,7 +4822,7 @@ static uint32_t spirv_compiler_emit_input(struct spirv_compiler *compiler,
{ {
component_type = signature_element->component_type; component_type = signature_element->component_type;
input_component_count = vkd3d_write_mask_component_count(signature_element->mask); input_component_count = vkd3d_write_mask_component_count(signature_element->mask);
component_idx = vkd3d_write_mask_get_component_idx(signature_element->mask); component_idx = vsir_write_mask_get_component_idx(signature_element->mask);
} }
if (needs_private_io_variable(builtin)) if (needs_private_io_variable(builtin))
@ -4832,7 +4832,7 @@ static uint32_t spirv_compiler_emit_input(struct spirv_compiler *compiler,
} }
else else
{ {
component_idx = vkd3d_write_mask_get_component_idx(write_mask); component_idx = vsir_write_mask_get_component_idx(write_mask);
reg_write_mask = write_mask >> component_idx; reg_write_mask = write_mask >> component_idx;
} }
@ -4988,7 +4988,7 @@ static void calculate_clip_or_cull_distance_mask(const struct signature_element
return; return;
} }
write_mask = e->mask >> vkd3d_write_mask_get_component_idx(e->mask); write_mask = e->mask >> vsir_write_mask_get_component_idx(e->mask);
*mask |= (write_mask & VKD3DSP_WRITEMASK_ALL) << (VKD3D_VEC4_SIZE * e->semantic_index); *mask |= (write_mask & VKD3DSP_WRITEMASK_ALL) << (VKD3D_VEC4_SIZE * e->semantic_index);
} }
@ -5126,7 +5126,7 @@ static void spirv_compiler_emit_output(struct spirv_compiler *compiler,
const struct shader_signature *shader_signature; const struct shader_signature *shader_signature;
const struct vkd3d_spirv_builtin *builtin; const struct vkd3d_spirv_builtin *builtin;
enum vkd3d_shader_sysval_semantic sysval; enum vkd3d_shader_sysval_semantic sysval;
unsigned int write_mask, reg_write_mask; uint32_t write_mask, reg_write_mask;
bool use_private_variable = false; bool use_private_variable = false;
struct vkd3d_symbol reg_symbol; struct vkd3d_symbol reg_symbol;
SpvStorageClass storage_class; SpvStorageClass storage_class;
@ -5152,7 +5152,7 @@ static void spirv_compiler_emit_output(struct spirv_compiler *compiler,
write_mask = signature_element->mask; write_mask = signature_element->mask;
component_idx = vkd3d_write_mask_get_component_idx(write_mask); component_idx = vsir_write_mask_get_component_idx(write_mask);
output_component_count = vkd3d_write_mask_component_count(write_mask); output_component_count = vkd3d_write_mask_component_count(write_mask);
if (builtin) if (builtin)
{ {
@ -5317,7 +5317,7 @@ static void spirv_compiler_emit_store_shader_output(struct spirv_compiler *compi
use_mask |= element->used_mask; use_mask |= element->used_mask;
} }
} }
index = vkd3d_write_mask_get_component_idx(output->mask); index = vsir_write_mask_get_component_idx(output->mask);
dst_write_mask >>= index; dst_write_mask >>= index;
use_mask >>= index; use_mask >>= index;
write_mask &= dst_write_mask; write_mask &= dst_write_mask;

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@ -1516,7 +1516,7 @@ static inline enum vkd3d_shader_input_sysval_semantic vkd3d_siv_from_sysval(enum
return vkd3d_siv_from_sysval_indexed(sysval, 0); return vkd3d_siv_from_sysval_indexed(sysval, 0);
} }
static inline unsigned int vkd3d_write_mask_get_component_idx(DWORD write_mask) static inline unsigned int vsir_write_mask_get_component_idx(uint32_t write_mask)
{ {
unsigned int i; unsigned int i;