mirror of
https://gitlab.winehq.org/wine/vkd3d.git
synced 2024-11-21 16:46:41 -08:00
vkd3d-shader/ir: Pass a uint32_t write mask to vkd3d_write_mask_get_component_idx().
This commit is contained in:
parent
09235d9e09
commit
e1aa12f94b
Notes:
Alexandre Julliard
2023-12-13 23:23:35 +01:00
Approved-by: Alexandre Julliard (@julliard) Merge-Request: https://gitlab.winehq.org/wine/vkd3d/-/merge_requests/522
@ -593,18 +593,18 @@ struct signature_element *vsir_signature_find_element_for_reg(const struct shade
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}
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}
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static unsigned int range_map_get_register_count(uint8_t range_map[][VKD3D_VEC4_SIZE],
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static unsigned int range_map_get_register_count(uint8_t range_map[][VKD3D_VEC4_SIZE],
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unsigned int register_idx, unsigned int write_mask)
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unsigned int register_idx, uint32_t write_mask)
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{
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{
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return range_map[register_idx][vkd3d_write_mask_get_component_idx(write_mask)];
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return range_map[register_idx][vsir_write_mask_get_component_idx(write_mask)];
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}
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}
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static void range_map_set_register_range(uint8_t range_map[][VKD3D_VEC4_SIZE], unsigned int register_idx,
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static void range_map_set_register_range(uint8_t range_map[][VKD3D_VEC4_SIZE], unsigned int register_idx,
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unsigned int register_count, unsigned int write_mask, bool is_dcl_indexrange)
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unsigned int register_count, uint32_t write_mask, bool is_dcl_indexrange)
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{
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{
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unsigned int i, j, r, c, component_idx, component_count;
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unsigned int i, j, r, c, component_idx, component_count;
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assert(write_mask <= VKD3DSP_WRITEMASK_ALL);
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assert(write_mask <= VKD3DSP_WRITEMASK_ALL);
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component_idx = vkd3d_write_mask_get_component_idx(write_mask);
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component_idx = vsir_write_mask_get_component_idx(write_mask);
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component_count = vkd3d_write_mask_component_count(write_mask);
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component_count = vkd3d_write_mask_component_count(write_mask);
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assert(register_idx < MAX_REG_OUTPUT && MAX_REG_OUTPUT - register_idx >= register_count);
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assert(register_idx < MAX_REG_OUTPUT && MAX_REG_OUTPUT - register_idx >= register_count);
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@ -899,7 +899,7 @@ static bool shader_dst_param_io_normalise(struct vkd3d_shader_dst_param *dst_par
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element_idx = shader_signature_find_element_for_reg(signature, reg_idx, write_mask);
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element_idx = shader_signature_find_element_for_reg(signature, reg_idx, write_mask);
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e = &signature->elements[element_idx];
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e = &signature->elements[element_idx];
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dst_param->write_mask >>= vkd3d_write_mask_get_component_idx(e->mask);
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dst_param->write_mask >>= vsir_write_mask_get_component_idx(e->mask);
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if (is_io_dcl)
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if (is_io_dcl)
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{
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{
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/* Validated in the TPF reader. */
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/* Validated in the TPF reader. */
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@ -1011,7 +1011,7 @@ static void shader_src_param_io_normalise(struct vkd3d_shader_src_param *src_par
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reg->idx[id_idx].offset = element_idx;
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reg->idx[id_idx].offset = element_idx;
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reg->idx_count = id_idx + 1;
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reg->idx_count = id_idx + 1;
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if ((component_idx = vkd3d_write_mask_get_component_idx(e->mask)))
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if ((component_idx = vsir_write_mask_get_component_idx(e->mask)))
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{
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{
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for (i = 0; i < VKD3D_VEC4_SIZE; ++i)
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for (i = 0; i < VKD3D_VEC4_SIZE; ++i)
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if (vkd3d_swizzle_get_component(src_param->swizzle, i))
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if (vkd3d_swizzle_get_component(src_param->swizzle, i))
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@ -3604,8 +3604,8 @@ static bool vkd3d_swizzle_is_scalar(unsigned int swizzle)
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}
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}
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static uint32_t spirv_compiler_emit_swizzle(struct spirv_compiler *compiler,
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static uint32_t spirv_compiler_emit_swizzle(struct spirv_compiler *compiler,
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uint32_t val_id, unsigned int val_write_mask, enum vkd3d_shader_component_type component_type,
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uint32_t val_id, uint32_t val_write_mask, enum vkd3d_shader_component_type component_type,
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unsigned int swizzle, unsigned int write_mask)
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unsigned int swizzle, uint32_t write_mask)
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{
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{
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unsigned int i, component_idx, component_count, val_component_count;
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unsigned int i, component_idx, component_count, val_component_count;
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struct vkd3d_spirv_builder *builder = &compiler->spirv_builder;
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struct vkd3d_spirv_builder *builder = &compiler->spirv_builder;
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@ -3622,9 +3622,9 @@ static uint32_t spirv_compiler_emit_swizzle(struct spirv_compiler *compiler,
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if (component_count == 1)
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if (component_count == 1)
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{
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{
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component_idx = vkd3d_write_mask_get_component_idx(write_mask);
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component_idx = vsir_write_mask_get_component_idx(write_mask);
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component_idx = vkd3d_swizzle_get_component(swizzle, component_idx);
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component_idx = vkd3d_swizzle_get_component(swizzle, component_idx);
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component_idx -= vkd3d_write_mask_get_component_idx(val_write_mask);
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component_idx -= vsir_write_mask_get_component_idx(val_write_mask);
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return vkd3d_spirv_build_op_composite_extract1(builder, type_id, val_id, component_idx);
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return vkd3d_spirv_build_op_composite_extract1(builder, type_id, val_id, component_idx);
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}
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}
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@ -3742,7 +3742,7 @@ static uint32_t spirv_compiler_emit_load_undef(struct spirv_compiler *compiler,
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}
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}
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static uint32_t spirv_compiler_emit_load_scalar(struct spirv_compiler *compiler,
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static uint32_t spirv_compiler_emit_load_scalar(struct spirv_compiler *compiler,
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const struct vkd3d_shader_register *reg, DWORD swizzle, DWORD write_mask,
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const struct vkd3d_shader_register *reg, DWORD swizzle, uint32_t write_mask,
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const struct vkd3d_shader_register_info *reg_info)
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const struct vkd3d_shader_register_info *reg_info)
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{
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{
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struct vkd3d_spirv_builder *builder = &compiler->spirv_builder;
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struct vkd3d_spirv_builder *builder = &compiler->spirv_builder;
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@ -3754,7 +3754,7 @@ static uint32_t spirv_compiler_emit_load_scalar(struct spirv_compiler *compiler,
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assert(!register_is_constant_or_undef(reg));
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assert(!register_is_constant_or_undef(reg));
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assert(vkd3d_write_mask_component_count(write_mask) == 1);
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assert(vkd3d_write_mask_component_count(write_mask) == 1);
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component_idx = vkd3d_write_mask_get_component_idx(write_mask);
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component_idx = vsir_write_mask_get_component_idx(write_mask);
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component_idx = vkd3d_swizzle_get_component(swizzle, component_idx);
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component_idx = vkd3d_swizzle_get_component(swizzle, component_idx);
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skipped_component_mask = ~reg_info->write_mask & ((VKD3DSP_WRITEMASK_0 << component_idx) - 1);
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skipped_component_mask = ~reg_info->write_mask & ((VKD3DSP_WRITEMASK_0 << component_idx) - 1);
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if (skipped_component_mask)
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if (skipped_component_mask)
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@ -4049,8 +4049,8 @@ static uint32_t spirv_compiler_emit_load_src_with_type(struct spirv_compiler *co
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}
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}
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static void spirv_compiler_emit_store_scalar(struct spirv_compiler *compiler,
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static void spirv_compiler_emit_store_scalar(struct spirv_compiler *compiler,
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uint32_t dst_id, unsigned int dst_write_mask, enum vkd3d_shader_component_type component_type,
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uint32_t dst_id, uint32_t dst_write_mask, enum vkd3d_shader_component_type component_type,
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SpvStorageClass storage_class, unsigned int write_mask, uint32_t val_id)
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SpvStorageClass storage_class, uint32_t write_mask, uint32_t val_id)
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{
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{
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struct vkd3d_spirv_builder *builder = &compiler->spirv_builder;
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struct vkd3d_spirv_builder *builder = &compiler->spirv_builder;
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uint32_t type_id, ptr_type_id, index;
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uint32_t type_id, ptr_type_id, index;
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@ -4060,8 +4060,8 @@ static void spirv_compiler_emit_store_scalar(struct spirv_compiler *compiler,
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{
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{
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type_id = vkd3d_spirv_get_type_id(builder, component_type, 1);
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type_id = vkd3d_spirv_get_type_id(builder, component_type, 1);
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ptr_type_id = vkd3d_spirv_get_op_type_pointer(builder, storage_class, type_id);
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ptr_type_id = vkd3d_spirv_get_op_type_pointer(builder, storage_class, type_id);
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component_idx = vkd3d_write_mask_get_component_idx(write_mask);
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component_idx = vsir_write_mask_get_component_idx(write_mask);
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component_idx -= vkd3d_write_mask_get_component_idx(dst_write_mask);
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component_idx -= vsir_write_mask_get_component_idx(dst_write_mask);
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index = spirv_compiler_get_constant_uint(compiler, component_idx);
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index = spirv_compiler_get_constant_uint(compiler, component_idx);
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dst_id = vkd3d_spirv_build_op_in_bounds_access_chain1(builder, ptr_type_id, dst_id, index);
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dst_id = vkd3d_spirv_build_op_in_bounds_access_chain1(builder, ptr_type_id, dst_id, index);
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}
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}
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@ -4070,7 +4070,7 @@ static void spirv_compiler_emit_store_scalar(struct spirv_compiler *compiler,
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}
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}
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static void spirv_compiler_emit_store(struct spirv_compiler *compiler,
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static void spirv_compiler_emit_store(struct spirv_compiler *compiler,
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uint32_t dst_id, unsigned int dst_write_mask, enum vkd3d_shader_component_type component_type,
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uint32_t dst_id, uint32_t dst_write_mask, enum vkd3d_shader_component_type component_type,
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SpvStorageClass storage_class, unsigned int write_mask, uint32_t val_id)
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SpvStorageClass storage_class, unsigned int write_mask, uint32_t val_id)
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{
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{
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struct vkd3d_spirv_builder *builder = &compiler->spirv_builder;
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struct vkd3d_spirv_builder *builder = &compiler->spirv_builder;
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@ -4088,7 +4088,7 @@ static void spirv_compiler_emit_store(struct spirv_compiler *compiler,
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{
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{
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type_id = vkd3d_spirv_get_type_id(builder, component_type, 1);
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type_id = vkd3d_spirv_get_type_id(builder, component_type, 1);
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val_id = vkd3d_spirv_build_op_composite_extract1(builder, type_id, val_id,
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val_id = vkd3d_spirv_build_op_composite_extract1(builder, type_id, val_id,
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vkd3d_write_mask_get_component_idx(dst_write_mask));
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vsir_write_mask_get_component_idx(dst_write_mask));
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write_mask &= dst_write_mask;
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write_mask &= dst_write_mask;
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component_count = 1;
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component_count = 1;
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}
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}
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@ -4239,7 +4239,7 @@ static void spirv_compiler_emit_store_dst_scalar(struct spirv_compiler *compiler
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uint32_t component_ids[VKD3D_VEC4_SIZE];
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uint32_t component_ids[VKD3D_VEC4_SIZE];
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unsigned int component_idx, i;
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unsigned int component_idx, i;
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component_idx = vkd3d_write_mask_get_component_idx(dst->write_mask);
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component_idx = vsir_write_mask_get_component_idx(dst->write_mask);
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for (i = 0; i < component_count; ++i)
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for (i = 0; i < component_count; ++i)
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{
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{
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if (vkd3d_swizzle_get_component(swizzle, component_idx + i))
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if (vkd3d_swizzle_get_component(swizzle, component_idx + i))
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@ -4779,7 +4779,7 @@ static uint32_t spirv_compiler_emit_input(struct spirv_compiler *compiler,
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enum vkd3d_shader_component_type component_type;
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enum vkd3d_shader_component_type component_type;
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const struct vkd3d_spirv_builtin *builtin;
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const struct vkd3d_spirv_builtin *builtin;
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enum vkd3d_shader_sysval_semantic sysval;
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enum vkd3d_shader_sysval_semantic sysval;
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unsigned int write_mask, reg_write_mask;
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uint32_t write_mask, reg_write_mask;
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struct vkd3d_symbol *symbol = NULL;
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struct vkd3d_symbol *symbol = NULL;
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uint32_t val_id, input_id, var_id;
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uint32_t val_id, input_id, var_id;
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uint32_t type_id, float_type_id;
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uint32_t type_id, float_type_id;
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@ -4822,7 +4822,7 @@ static uint32_t spirv_compiler_emit_input(struct spirv_compiler *compiler,
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{
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{
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component_type = signature_element->component_type;
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component_type = signature_element->component_type;
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input_component_count = vkd3d_write_mask_component_count(signature_element->mask);
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input_component_count = vkd3d_write_mask_component_count(signature_element->mask);
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component_idx = vkd3d_write_mask_get_component_idx(signature_element->mask);
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component_idx = vsir_write_mask_get_component_idx(signature_element->mask);
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}
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}
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if (needs_private_io_variable(builtin))
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if (needs_private_io_variable(builtin))
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@ -4832,7 +4832,7 @@ static uint32_t spirv_compiler_emit_input(struct spirv_compiler *compiler,
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}
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}
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else
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else
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{
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{
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component_idx = vkd3d_write_mask_get_component_idx(write_mask);
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component_idx = vsir_write_mask_get_component_idx(write_mask);
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reg_write_mask = write_mask >> component_idx;
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reg_write_mask = write_mask >> component_idx;
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}
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}
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@ -4988,7 +4988,7 @@ static void calculate_clip_or_cull_distance_mask(const struct signature_element
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return;
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return;
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}
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}
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write_mask = e->mask >> vkd3d_write_mask_get_component_idx(e->mask);
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write_mask = e->mask >> vsir_write_mask_get_component_idx(e->mask);
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*mask |= (write_mask & VKD3DSP_WRITEMASK_ALL) << (VKD3D_VEC4_SIZE * e->semantic_index);
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*mask |= (write_mask & VKD3DSP_WRITEMASK_ALL) << (VKD3D_VEC4_SIZE * e->semantic_index);
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}
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}
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@ -5126,7 +5126,7 @@ static void spirv_compiler_emit_output(struct spirv_compiler *compiler,
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const struct shader_signature *shader_signature;
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const struct shader_signature *shader_signature;
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const struct vkd3d_spirv_builtin *builtin;
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const struct vkd3d_spirv_builtin *builtin;
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enum vkd3d_shader_sysval_semantic sysval;
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enum vkd3d_shader_sysval_semantic sysval;
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unsigned int write_mask, reg_write_mask;
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uint32_t write_mask, reg_write_mask;
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bool use_private_variable = false;
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bool use_private_variable = false;
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struct vkd3d_symbol reg_symbol;
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struct vkd3d_symbol reg_symbol;
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SpvStorageClass storage_class;
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SpvStorageClass storage_class;
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@ -5152,7 +5152,7 @@ static void spirv_compiler_emit_output(struct spirv_compiler *compiler,
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write_mask = signature_element->mask;
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write_mask = signature_element->mask;
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component_idx = vkd3d_write_mask_get_component_idx(write_mask);
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component_idx = vsir_write_mask_get_component_idx(write_mask);
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output_component_count = vkd3d_write_mask_component_count(write_mask);
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output_component_count = vkd3d_write_mask_component_count(write_mask);
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if (builtin)
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if (builtin)
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{
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{
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@ -5317,7 +5317,7 @@ static void spirv_compiler_emit_store_shader_output(struct spirv_compiler *compi
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use_mask |= element->used_mask;
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use_mask |= element->used_mask;
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}
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}
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}
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}
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index = vkd3d_write_mask_get_component_idx(output->mask);
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index = vsir_write_mask_get_component_idx(output->mask);
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dst_write_mask >>= index;
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dst_write_mask >>= index;
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use_mask >>= index;
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use_mask >>= index;
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write_mask &= dst_write_mask;
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write_mask &= dst_write_mask;
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@ -1516,7 +1516,7 @@ static inline enum vkd3d_shader_input_sysval_semantic vkd3d_siv_from_sysval(enum
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return vkd3d_siv_from_sysval_indexed(sysval, 0);
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return vkd3d_siv_from_sysval_indexed(sysval, 0);
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}
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}
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static inline unsigned int vkd3d_write_mask_get_component_idx(DWORD write_mask)
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static inline unsigned int vsir_write_mask_get_component_idx(uint32_t write_mask)
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{
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{
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unsigned int i;
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unsigned int i;
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