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vkd3d-shader/dxil: Pass the function emission state to sm6_parser_emit_dx_input_register_mov().

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This commit is contained in:
Giovanni Mascellani
2025-12-04 11:59:30 +01:00
committed by Henri Verbeet
parent 47c1b05a5f
commit e00ba4f3da
Notes: Henri Verbeet 2025-12-09 17:22:15 +01:00 
Approved-by: Henri Verbeet (@hverbeet)
Merge-Request: https://gitlab.winehq.org/wine/vkd3d/-/merge_requests/1862
1 changed files with 14 additions and 13 deletions
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27
libs/vkd3d-shader/dxil.c
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@@ -5567,28 +5567,29 @@ static void sm6_parser_dcl_register_builtin(struct sm6_parser *dxil, enum vkd3d_
} }
} }
static void sm6_parser_emit_dx_input_register_mov(struct sm6_parser *sm6, struct vkd3d_shader_instruction *ins, static void sm6_parser_emit_dx_input_register_mov(struct sm6_parser *dxil, struct function_emission_state *state,
enum vkd3d_shader_register_type reg_type, enum vsir_data_type data_type, bool scalar) enum vkd3d_shader_register_type reg_type, enum vsir_data_type data_type, bool scalar)
{ {
struct vkd3d_shader_instruction *ins = state->ins;
struct vsir_src_operand *src_param; struct vsir_src_operand *src_param;
vsir_instruction_init(ins, &sm6->p.location, VSIR_OP_MOV); vsir_instruction_init(ins, &dxil->p.location, VSIR_OP_MOV);
if (!(src_param = instruction_src_params_alloc(ins, 1, sm6))) if (!(src_param = instruction_src_params_alloc(ins, 1, dxil)))
return; return;
sm6_parser_dcl_register_builtin(sm6, VSIR_OP_DCL_INPUT, reg_type, data_type, 1); sm6_parser_dcl_register_builtin(dxil, VSIR_OP_DCL_INPUT, reg_type, data_type, 1);
vsir_register_init(&src_param->reg, reg_type, data_type, 0); vsir_register_init(&src_param->reg, reg_type, data_type, 0);
if (!scalar) if (!scalar)
src_param->reg.dimension = VSIR_DIMENSION_VEC4; src_param->reg.dimension = VSIR_DIMENSION_VEC4;
src_param_init(src_param); src_param_init(src_param);
instruction_dst_param_init_ssa_scalar(ins, 0, sm6); instruction_dst_param_init_ssa_scalar(ins, 0, dxil);
} }
static void sm6_parser_emit_dx_coverage(struct sm6_parser *sm6, enum dx_intrinsic_opcode op, static void sm6_parser_emit_dx_coverage(struct sm6_parser *dxil, enum dx_intrinsic_opcode op,
const struct sm6_value **operands, struct function_emission_state *state) const struct sm6_value **operands, struct function_emission_state *state)
{ {
sm6_parser_emit_dx_input_register_mov(sm6, state->ins, VKD3DSPR_COVERAGE, VSIR_DATA_U32, false); sm6_parser_emit_dx_input_register_mov(dxil, state, VKD3DSPR_COVERAGE, VSIR_DATA_U32, false);
} }
static const struct sm6_descriptor_info *sm6_parser_get_descriptor(struct sm6_parser *sm6, static const struct sm6_descriptor_info *sm6_parser_get_descriptor(struct sm6_parser *sm6,
@@ -6085,16 +6086,16 @@ static void sm6_parser_emit_dx_make_double(struct sm6_parser *sm6, enum dx_intri
instruction_dst_param_init_ssa_scalar(ins, 0, sm6); instruction_dst_param_init_ssa_scalar(ins, 0, sm6);
} }
static void sm6_parser_emit_dx_output_control_point_id(struct sm6_parser *sm6, enum dx_intrinsic_opcode op, static void sm6_parser_emit_dx_output_control_point_id(struct sm6_parser *dxil, enum dx_intrinsic_opcode op,
const struct sm6_value **operands, struct function_emission_state *state) const struct sm6_value **operands, struct function_emission_state *state)
{ {
sm6_parser_emit_dx_input_register_mov(sm6, state->ins, VKD3DSPR_OUTPOINTID, VSIR_DATA_U32, true); sm6_parser_emit_dx_input_register_mov(dxil, state, VKD3DSPR_OUTPOINTID, VSIR_DATA_U32, true);
} }
static void sm6_parser_emit_dx_primitive_id(struct sm6_parser *sm6, enum dx_intrinsic_opcode op, static void sm6_parser_emit_dx_primitive_id(struct sm6_parser *dxil, enum dx_intrinsic_opcode op,
const struct sm6_value **operands, struct function_emission_state *state) const struct sm6_value **operands, struct function_emission_state *state)
{ {
sm6_parser_emit_dx_input_register_mov(sm6, state->ins, VKD3DSPR_PRIMID, VSIR_DATA_U32, true); sm6_parser_emit_dx_input_register_mov(dxil, state, VKD3DSPR_PRIMID, VSIR_DATA_U32, true);
} }
static enum vkd3d_shader_opcode dx_map_quad_op(enum dxil_quad_op_kind op) static enum vkd3d_shader_opcode dx_map_quad_op(enum dxil_quad_op_kind op)
@@ -6915,7 +6916,7 @@ static void sm6_parser_emit_dx_wave_op(struct sm6_parser *sm6, enum dx_intrinsic
instruction_dst_param_init_ssa_scalar(ins, 0, sm6); instruction_dst_param_init_ssa_scalar(ins, 0, sm6);
} }
static void sm6_parser_emit_dx_wave_builtin(struct sm6_parser *sm6, enum dx_intrinsic_opcode op, static void sm6_parser_emit_dx_wave_builtin(struct sm6_parser *dxil, enum dx_intrinsic_opcode op,
const struct sm6_value **operands, struct function_emission_state *state) const struct sm6_value **operands, struct function_emission_state *state)
{ {
enum vkd3d_shader_register_type type; enum vkd3d_shader_register_type type;
@@ -6932,7 +6933,7 @@ static void sm6_parser_emit_dx_wave_builtin(struct sm6_parser *sm6, enum dx_intr
vkd3d_unreachable(); vkd3d_unreachable();
} }
sm6_parser_emit_dx_input_register_mov(sm6, state->ins, type, VSIR_DATA_U32, true); sm6_parser_emit_dx_input_register_mov(dxil, state, type, VSIR_DATA_U32, true);
} }
struct sm6_dx_opcode_info struct sm6_dx_opcode_info