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vkd3d-shader/spirv: Introduce an FREM instruction.

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Conor McCarthy 2023-05-25 12:06:22 +10:00 committed by Alexandre Julliard
parent bae6079047
commit c8d3515d8b
Notes: Alexandre Julliard 2023-11-06 23:18:07 +01:00 
Approved-by: Giovanni Mascellani (@giomasce)
Approved-by: Henri Verbeet (@hverbeet)
Approved-by: Alexandre Julliard (@julliard)
Merge-Request: https://gitlab.winehq.org/wine/vkd3d/-/merge_requests/409
3 changed files with 4 additions and 0 deletions
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1
libs/vkd3d-shader/d3d_asm.c
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@ -152,6 +152,7 @@ static const char * const shader_opcode_names[] =
[VKD3DSIH_FIRSTBIT_LO ] = "firstbit_lo", [VKD3DSIH_FIRSTBIT_LO ] = "firstbit_lo",
[VKD3DSIH_FIRSTBIT_SHI ] = "firstbit_shi", [VKD3DSIH_FIRSTBIT_SHI ] = "firstbit_shi",
[VKD3DSIH_FRC ] = "frc", [VKD3DSIH_FRC ] = "frc",
[VKD3DSIH_FREM ] = "frem",
[VKD3DSIH_FTOD ] = "ftod", [VKD3DSIH_FTOD ] = "ftod",
[VKD3DSIH_FTOI ] = "ftoi", [VKD3DSIH_FTOI ] = "ftoi",
[VKD3DSIH_FTOU ] = "ftou", [VKD3DSIH_FTOU ] = "ftou",

2
libs/vkd3d-shader/spirv.c
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@ -6577,6 +6577,7 @@ static SpvOp spirv_compiler_map_alu_instruction(const struct vkd3d_shader_instru
{VKD3DSIH_DTOF, SpvOpFConvert}, {VKD3DSIH_DTOF, SpvOpFConvert},
{VKD3DSIH_DTOI, SpvOpConvertFToS}, {VKD3DSIH_DTOI, SpvOpConvertFToS},
{VKD3DSIH_DTOU, SpvOpConvertFToU}, {VKD3DSIH_DTOU, SpvOpConvertFToU},
{VKD3DSIH_FREM, SpvOpFRem},
{VKD3DSIH_FTOD, SpvOpFConvert}, {VKD3DSIH_FTOD, SpvOpFConvert},
{VKD3DSIH_IADD, SpvOpIAdd}, {VKD3DSIH_IADD, SpvOpIAdd},
{VKD3DSIH_INEG, SpvOpSNegate}, {VKD3DSIH_INEG, SpvOpSNegate},
@ -9388,6 +9389,7 @@ static int spirv_compiler_handle_instruction(struct spirv_compiler *compiler,
case VKD3DSIH_DTOF: case VKD3DSIH_DTOF:
case VKD3DSIH_DTOI: case VKD3DSIH_DTOI:
case VKD3DSIH_DTOU: case VKD3DSIH_DTOU:
case VKD3DSIH_FREM:
case VKD3DSIH_FTOD: case VKD3DSIH_FTOD:
case VKD3DSIH_IADD: case VKD3DSIH_IADD:
case VKD3DSIH_INEG: case VKD3DSIH_INEG:

1
libs/vkd3d-shader/vkd3d_shader_private.h
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@ -336,6 +336,7 @@ enum vkd3d_shader_opcode
VKD3DSIH_FIRSTBIT_LO, VKD3DSIH_FIRSTBIT_LO,
VKD3DSIH_FIRSTBIT_SHI, VKD3DSIH_FIRSTBIT_SHI,
VKD3DSIH_FRC, VKD3DSIH_FRC,
VKD3DSIH_FREM,
VKD3DSIH_FTOD, VKD3DSIH_FTOD,
VKD3DSIH_FTOI, VKD3DSIH_FTOI,
VKD3DSIH_FTOU, VKD3DSIH_FTOU,