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vkd3d-shader: Replace assert() with VKD3D_ASSERT() in d3dbc.c
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parent
8e08fa6bf2
commit
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Notes:
Henri Verbeet
2024-07-30 16:38:27 +02:00
Approved-by: Giovanni Mascellani (@giomasce) Approved-by: Henri Verbeet (@hverbeet) Merge-Request: https://gitlab.winehq.org/wine/vkd3d/-/merge_requests/970
@ -757,7 +757,7 @@ static void record_constant_register(struct vkd3d_shader_sm1_parser *sm1,
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{
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/* d3d shaders have a maximum of 8192 constants; we should not overrun
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* this array. */
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assert((index / 32) <= ARRAY_SIZE(sm1->constants[set].def_mask));
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VKD3D_ASSERT((index / 32) <= ARRAY_SIZE(sm1->constants[set].def_mask));
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bitmap_set(sm1->constants[set].def_mask, index);
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}
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}
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@ -1492,7 +1492,7 @@ D3DXPARAMETER_CLASS hlsl_sm1_class(const struct hlsl_type *type)
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case HLSL_CLASS_ARRAY:
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return hlsl_sm1_class(type->e.array.type);
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case HLSL_CLASS_MATRIX:
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assert(type->modifiers & HLSL_MODIFIERS_MAJORITY_MASK);
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VKD3D_ASSERT(type->modifiers & HLSL_MODIFIERS_MAJORITY_MASK);
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if (type->modifiers & HLSL_MODIFIER_COLUMN_MAJOR)
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return D3DXPC_MATRIX_COLUMNS;
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else
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@ -1910,7 +1910,7 @@ static bool is_inconsequential_instr(const struct sm1_instruction *instr)
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static void write_sm1_dst_register(struct vkd3d_bytecode_buffer *buffer, const struct sm1_dst_register *reg)
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{
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assert(reg->writemask);
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VKD3D_ASSERT(reg->writemask);
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put_u32(buffer, (1u << 31) | sm1_encode_register_type(reg->type) | reg->mod | (reg->writemask << 16) | reg->reg);
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}
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@ -2090,7 +2090,7 @@ static void d3dbc_write_cast(struct d3dbc_compiler *d3dbc, const struct hlsl_ir_
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struct hlsl_ctx *ctx = d3dbc->ctx;
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/* Narrowing casts were already lowered. */
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assert(src_type->dimx == dst_type->dimx);
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VKD3D_ASSERT(src_type->dimx == dst_type->dimx);
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switch (dst_type->e.numeric.type)
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{
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@ -2204,7 +2204,7 @@ static void d3dbc_write_semantic_dcl(struct d3dbc_compiler *d3dbc,
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else
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{
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ret = hlsl_sm1_usage_from_semantic(element->semantic_name, element->semantic_index, &usage, &usage_idx);
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assert(ret);
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VKD3D_ASSERT(ret);
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reg.type = output ? VKD3DSPR_OUTPUT : VKD3DSPR_INPUT;
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reg.reg = element->register_index;
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}
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@ -2348,8 +2348,8 @@ static void d3dbc_write_constant(struct d3dbc_compiler *d3dbc, const struct hlsl
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.src_count = 1,
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};
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assert(instr->reg.allocated);
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assert(constant->reg.allocated);
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VKD3D_ASSERT(instr->reg.allocated);
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VKD3D_ASSERT(constant->reg.allocated);
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sm1_map_src_swizzle(&sm1_instr.srcs[0], sm1_instr.dst.writemask);
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d3dbc_write_instruction(d3dbc, &sm1_instr);
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}
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@ -2375,9 +2375,9 @@ static void d3dbc_write_sincos(struct d3dbc_compiler *d3dbc, enum hlsl_ir_expr_o
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const struct hlsl_reg *dst, const struct hlsl_reg *src)
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{
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if (op == HLSL_OP1_COS_REDUCED)
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assert(dst->writemask == VKD3DSP_WRITEMASK_0);
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VKD3D_ASSERT(dst->writemask == VKD3DSP_WRITEMASK_0);
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else /* HLSL_OP1_SIN_REDUCED */
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assert(dst->writemask == VKD3DSP_WRITEMASK_1);
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VKD3D_ASSERT(dst->writemask == VKD3DSP_WRITEMASK_1);
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d3dbc_write_unary_op(d3dbc, D3DSIO_SINCOS, dst, src, 0, 0);
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}
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@ -2391,7 +2391,7 @@ static void d3dbc_write_expr(struct d3dbc_compiler *d3dbc, const struct hlsl_ir_
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struct hlsl_ir_node *arg3 = expr->operands[2].node;
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struct hlsl_ctx *ctx = d3dbc->ctx;
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assert(instr->reg.allocated);
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VKD3D_ASSERT(instr->reg.allocated);
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if (expr->op == HLSL_OP1_REINTERPRET)
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{
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@ -2534,7 +2534,7 @@ static void d3dbc_write_if(struct d3dbc_compiler *d3dbc, const struct hlsl_ir_no
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struct sm1_instruction sm1_ifc, sm1_else, sm1_endif;
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condition = iff->condition.node;
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assert(condition->data_type->dimx == 1 && condition->data_type->dimy == 1);
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VKD3D_ASSERT(condition->data_type->dimx == 1 && condition->data_type->dimy == 1);
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sm1_ifc = (struct sm1_instruction)
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{
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@ -2616,11 +2616,11 @@ static void d3dbc_write_load(struct d3dbc_compiler *d3dbc, const struct hlsl_ir_
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.src_count = 1,
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};
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assert(instr->reg.allocated);
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VKD3D_ASSERT(instr->reg.allocated);
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if (load->src.var->is_uniform)
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{
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assert(reg.allocated);
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VKD3D_ASSERT(reg.allocated);
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sm1_instr.srcs[0].type = VKD3DSPR_CONST;
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}
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else if (load->src.var->is_input_semantic)
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@ -2628,7 +2628,7 @@ static void d3dbc_write_load(struct d3dbc_compiler *d3dbc, const struct hlsl_ir_
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if (!hlsl_sm1_register_from_semantic(&d3dbc->program->shader_version, load->src.var->semantic.name,
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load->src.var->semantic.index, false, &sm1_instr.srcs[0].type, &sm1_instr.srcs[0].reg))
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{
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assert(reg.allocated);
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VKD3D_ASSERT(reg.allocated);
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sm1_instr.srcs[0].type = VKD3DSPR_INPUT;
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sm1_instr.srcs[0].reg = reg.id;
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}
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@ -2706,7 +2706,7 @@ static void d3dbc_write_resource_load(struct d3dbc_compiler *d3dbc, const struct
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return;
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}
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assert(instr->reg.allocated);
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VKD3D_ASSERT(instr->reg.allocated);
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d3dbc_write_instruction(d3dbc, &sm1_instr);
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}
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@ -2749,7 +2749,7 @@ static void d3dbc_write_store(struct d3dbc_compiler *d3dbc, const struct hlsl_ir
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else if (!hlsl_sm1_register_from_semantic(&d3dbc->program->shader_version, store->lhs.var->semantic.name,
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store->lhs.var->semantic.index, true, &sm1_instr.dst.type, &sm1_instr.dst.reg))
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{
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assert(reg.allocated);
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VKD3D_ASSERT(reg.allocated);
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sm1_instr.dst.type = VKD3DSPR_OUTPUT;
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sm1_instr.dst.reg = reg.id;
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}
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@ -2757,7 +2757,7 @@ static void d3dbc_write_store(struct d3dbc_compiler *d3dbc, const struct hlsl_ir
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sm1_instr.dst.writemask = (1u << store->lhs.var->data_type->dimx) - 1;
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}
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else
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assert(reg.allocated);
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VKD3D_ASSERT(reg.allocated);
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sm1_map_src_swizzle(&sm1_instr.srcs[0], sm1_instr.dst.writemask);
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d3dbc_write_instruction(d3dbc, &sm1_instr);
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@ -2783,8 +2783,8 @@ static void d3dbc_write_swizzle(struct d3dbc_compiler *d3dbc, const struct hlsl_
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.src_count = 1,
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};
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assert(instr->reg.allocated);
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assert(val->reg.allocated);
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VKD3D_ASSERT(instr->reg.allocated);
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VKD3D_ASSERT(val->reg.allocated);
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sm1_map_src_swizzle(&sm1_instr.srcs[0], sm1_instr.dst.writemask);
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d3dbc_write_instruction(d3dbc, &sm1_instr);
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}
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