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vkd3d-shader/ir: Sort vsir_validator_instructions[] alphabetically.

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Giovanni Mascellani
2025-07-16 20:59:50 +02:00
committed by Henri Verbeet
parent 195e62430e
commit b287e7959c
Notes: Henri Verbeet 2025-07-17 14:18:59 +02:00 
Approved-by: Henri Verbeet (@hverbeet)
Merge-Request: https://gitlab.winehq.org/wine/vkd3d/-/merge_requests/1622
1 changed files with 44 additions and 44 deletions
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88
libs/vkd3d-shader/ir.c
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@@ -11441,50 +11441,6 @@ static const struct vsir_validator_instruction_desc vsir_validator_instructions[
[VSIR_OP_ATAN] = {1, 1, vsir_validate_float_elementwise_operation}, [VSIR_OP_ATAN] = {1, 1, vsir_validate_float_elementwise_operation},
[VSIR_OP_BRANCH] = {0, ~0u, vsir_validate_branch}, [VSIR_OP_BRANCH] = {0, ~0u, vsir_validate_branch},
[VSIR_OP_DADD] = {1, 2, vsir_validate_double_elementwise_operation}, [VSIR_OP_DADD] = {1, 2, vsir_validate_double_elementwise_operation},
[VSIR_OP_DDIV] = {1, 2, vsir_validate_double_elementwise_operation},
[VSIR_OP_DEQO] = {1, 2, vsir_validate_double_comparison_operation},
[VSIR_OP_DFMA] = {1, 3, vsir_validate_double_elementwise_operation},
[VSIR_OP_DGEO] = {1, 2, vsir_validate_double_comparison_operation},
[VSIR_OP_DIV] = {1, 2, vsir_validate_float_elementwise_operation},
[VSIR_OP_DLT] = {1, 2, vsir_validate_double_comparison_operation},
[VSIR_OP_DMAX] = {1, 2, vsir_validate_double_elementwise_operation},
[VSIR_OP_DMIN] = {1, 2, vsir_validate_double_elementwise_operation},
[VSIR_OP_DMOV] = {1, 1, vsir_validate_double_elementwise_operation},
[VSIR_OP_DMUL] = {1, 2, vsir_validate_double_elementwise_operation},
[VSIR_OP_DNE] = {1, 2, vsir_validate_double_comparison_operation},
[VSIR_OP_DRCP] = {1, 1, vsir_validate_double_elementwise_operation},
[VSIR_OP_DSX] = {1, 1, vsir_validate_float_elementwise_operation},
[VSIR_OP_DSX_COARSE] = {1, 1, vsir_validate_float_elementwise_operation},
[VSIR_OP_DSX_FINE] = {1, 1, vsir_validate_float_elementwise_operation},
[VSIR_OP_DSY] = {1, 1, vsir_validate_float_elementwise_operation},
[VSIR_OP_DSY_COARSE] = {1, 1, vsir_validate_float_elementwise_operation},
[VSIR_OP_DSY_FINE] = {1, 1, vsir_validate_float_elementwise_operation},
[VSIR_OP_EQO] = {1, 2, vsir_validate_float_comparison_operation},
[VSIR_OP_EQU] = {1, 2, vsir_validate_float_comparison_operation},
[VSIR_OP_EXP] = {1, 1, vsir_validate_float_elementwise_operation},
[VSIR_OP_FRC] = {1, 1, vsir_validate_float_elementwise_operation},
[VSIR_OP_FREM] = {1, 2, vsir_validate_float_elementwise_operation},
[VSIR_OP_GEO] = {1, 2, vsir_validate_float_comparison_operation},
[VSIR_OP_GEU] = {1, 2, vsir_validate_float_comparison_operation},
[VSIR_OP_HCOS] = {1, 1, vsir_validate_float_elementwise_operation},
[VSIR_OP_HSIN] = {1, 1, vsir_validate_float_elementwise_operation},
[VSIR_OP_HTAN] = {1, 1, vsir_validate_float_elementwise_operation},
[VSIR_OP_HS_CONTROL_POINT_PHASE] = {0, 0, vsir_validate_hull_shader_phase},
[VSIR_OP_HS_DECLS] = {0, 0, vsir_validate_hull_shader_phase},
[VSIR_OP_HS_FORK_PHASE] = {0, 0, vsir_validate_hull_shader_phase},
[VSIR_OP_HS_JOIN_PHASE] = {0, 0, vsir_validate_hull_shader_phase},
[VSIR_OP_IADD] = {1, 2, vsir_validate_integer_elementwise_operation},
[VSIR_OP_IEQ] = {1, 2, vsir_validate_integer_comparison_operation},
[VSIR_OP_IGE] = {1, 2, vsir_validate_integer_comparison_operation},
[VSIR_OP_ILT] = {1, 2, vsir_validate_integer_comparison_operation},
[VSIR_OP_IMAD] = {1, 3, vsir_validate_integer_elementwise_operation},
[VSIR_OP_IMAX] = {1, 2, vsir_validate_integer_elementwise_operation},
[VSIR_OP_IMIN] = {1, 2, vsir_validate_integer_elementwise_operation},
[VSIR_OP_INE] = {1, 2, vsir_validate_integer_comparison_operation},
[VSIR_OP_INEG] = {1, 1, vsir_validate_integer_elementwise_operation},
[VSIR_OP_IREM] = {1, 2, vsir_validate_integer_elementwise_operation},
[VSIR_OP_ISHL] = {1, 2, vsir_validate_integer_elementwise_operation},
[VSIR_OP_ISHR] = {1, 2, vsir_validate_integer_elementwise_operation},
[VSIR_OP_DCL_GS_INSTANCES] = {0, 0, vsir_validate_dcl_gs_instances}, [VSIR_OP_DCL_GS_INSTANCES] = {0, 0, vsir_validate_dcl_gs_instances},
[VSIR_OP_DCL_HS_MAX_TESSFACTOR] = {0, 0, vsir_validate_dcl_hs_max_tessfactor}, [VSIR_OP_DCL_HS_MAX_TESSFACTOR] = {0, 0, vsir_validate_dcl_hs_max_tessfactor},
[VSIR_OP_DCL_INDEX_RANGE] = {0, 0, vsir_validate_dcl_index_range}, [VSIR_OP_DCL_INDEX_RANGE] = {0, 0, vsir_validate_dcl_index_range},
@@ -11504,13 +11460,57 @@ static const struct vsir_validator_instruction_desc vsir_validator_instructions[
[VSIR_OP_DCL_TESSELLATOR_OUTPUT_PRIMITIVE] = {0, 0, vsir_validate_dcl_tessellator_output_primitive}, [VSIR_OP_DCL_TESSELLATOR_OUTPUT_PRIMITIVE] = {0, 0, vsir_validate_dcl_tessellator_output_primitive},
[VSIR_OP_DCL_TESSELLATOR_PARTITIONING] = {0, 0, vsir_validate_dcl_tessellator_partitioning}, [VSIR_OP_DCL_TESSELLATOR_PARTITIONING] = {0, 0, vsir_validate_dcl_tessellator_partitioning},
[VSIR_OP_DCL_VERTICES_OUT] = {0, 0, vsir_validate_dcl_vertices_out}, [VSIR_OP_DCL_VERTICES_OUT] = {0, 0, vsir_validate_dcl_vertices_out},
[VSIR_OP_DDIV] = {1, 2, vsir_validate_double_elementwise_operation},
[VSIR_OP_DEQO] = {1, 2, vsir_validate_double_comparison_operation},
[VSIR_OP_DFMA] = {1, 3, vsir_validate_double_elementwise_operation},
[VSIR_OP_DGEO] = {1, 2, vsir_validate_double_comparison_operation},
[VSIR_OP_DIV] = {1, 2, vsir_validate_float_elementwise_operation},
[VSIR_OP_DLT] = {1, 2, vsir_validate_double_comparison_operation},
[VSIR_OP_DMAX] = {1, 2, vsir_validate_double_elementwise_operation},
[VSIR_OP_DMIN] = {1, 2, vsir_validate_double_elementwise_operation},
[VSIR_OP_DMOV] = {1, 1, vsir_validate_double_elementwise_operation},
[VSIR_OP_DMUL] = {1, 2, vsir_validate_double_elementwise_operation},
[VSIR_OP_DNE] = {1, 2, vsir_validate_double_comparison_operation},
[VSIR_OP_DRCP] = {1, 1, vsir_validate_double_elementwise_operation},
[VSIR_OP_DSX] = {1, 1, vsir_validate_float_elementwise_operation},
[VSIR_OP_DSX_COARSE] = {1, 1, vsir_validate_float_elementwise_operation},
[VSIR_OP_DSX_FINE] = {1, 1, vsir_validate_float_elementwise_operation},
[VSIR_OP_DSY] = {1, 1, vsir_validate_float_elementwise_operation},
[VSIR_OP_DSY_COARSE] = {1, 1, vsir_validate_float_elementwise_operation},
[VSIR_OP_DSY_FINE] = {1, 1, vsir_validate_float_elementwise_operation},
[VSIR_OP_ELSE] = {0, 0, vsir_validate_else}, [VSIR_OP_ELSE] = {0, 0, vsir_validate_else},
[VSIR_OP_ENDIF] = {0, 0, vsir_validate_endif}, [VSIR_OP_ENDIF] = {0, 0, vsir_validate_endif},
[VSIR_OP_ENDLOOP] = {0, 0, vsir_validate_endloop}, [VSIR_OP_ENDLOOP] = {0, 0, vsir_validate_endloop},
[VSIR_OP_ENDREP] = {0, 0, vsir_validate_endrep}, [VSIR_OP_ENDREP] = {0, 0, vsir_validate_endrep},
[VSIR_OP_ENDSWITCH] = {0, 0, vsir_validate_endswitch}, [VSIR_OP_ENDSWITCH] = {0, 0, vsir_validate_endswitch},
[VSIR_OP_EQO] = {1, 2, vsir_validate_float_comparison_operation},
[VSIR_OP_EQU] = {1, 2, vsir_validate_float_comparison_operation},
[VSIR_OP_EXP] = {1, 1, vsir_validate_float_elementwise_operation},
[VSIR_OP_FRC] = {1, 1, vsir_validate_float_elementwise_operation},
[VSIR_OP_FREM] = {1, 2, vsir_validate_float_elementwise_operation},
[VSIR_OP_GEO] = {1, 2, vsir_validate_float_comparison_operation},
[VSIR_OP_GEU] = {1, 2, vsir_validate_float_comparison_operation},
[VSIR_OP_HCOS] = {1, 1, vsir_validate_float_elementwise_operation},
[VSIR_OP_HSIN] = {1, 1, vsir_validate_float_elementwise_operation},
[VSIR_OP_HS_CONTROL_POINT_PHASE] = {0, 0, vsir_validate_hull_shader_phase},
[VSIR_OP_HS_DECLS] = {0, 0, vsir_validate_hull_shader_phase},
[VSIR_OP_HS_FORK_PHASE] = {0, 0, vsir_validate_hull_shader_phase},
[VSIR_OP_HS_JOIN_PHASE] = {0, 0, vsir_validate_hull_shader_phase},
[VSIR_OP_HTAN] = {1, 1, vsir_validate_float_elementwise_operation},
[VSIR_OP_IADD] = {1, 2, vsir_validate_integer_elementwise_operation},
[VSIR_OP_IEQ] = {1, 2, vsir_validate_integer_comparison_operation},
[VSIR_OP_IF] = {0, 1, vsir_validate_if}, [VSIR_OP_IF] = {0, 1, vsir_validate_if},
[VSIR_OP_IFC] = {0, 2, vsir_validate_ifc}, [VSIR_OP_IFC] = {0, 2, vsir_validate_ifc},
[VSIR_OP_IGE] = {1, 2, vsir_validate_integer_comparison_operation},
[VSIR_OP_ILT] = {1, 2, vsir_validate_integer_comparison_operation},
[VSIR_OP_IMAD] = {1, 3, vsir_validate_integer_elementwise_operation},
[VSIR_OP_IMAX] = {1, 2, vsir_validate_integer_elementwise_operation},
[VSIR_OP_IMIN] = {1, 2, vsir_validate_integer_elementwise_operation},
[VSIR_OP_INE] = {1, 2, vsir_validate_integer_comparison_operation},
[VSIR_OP_INEG] = {1, 1, vsir_validate_integer_elementwise_operation},
[VSIR_OP_IREM] = {1, 2, vsir_validate_integer_elementwise_operation},
[VSIR_OP_ISHL] = {1, 2, vsir_validate_integer_elementwise_operation},
[VSIR_OP_ISHR] = {1, 2, vsir_validate_integer_elementwise_operation},
[VSIR_OP_LABEL] = {0, 1, vsir_validate_label}, [VSIR_OP_LABEL] = {0, 1, vsir_validate_label},
[VSIR_OP_LOOP] = {0, ~0u, vsir_validate_loop}, [VSIR_OP_LOOP] = {0, ~0u, vsir_validate_loop},
[VSIR_OP_NOP] = {0, 0, vsir_validate_nop}, [VSIR_OP_NOP] = {0, 0, vsir_validate_nop},