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vkd3d-shader/dxil: Implement DX intrinsic WaveActiveBit.
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parent
1c49b3a779
commit
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Notes:
Alexandre Julliard
2024-05-06 22:37:06 +02:00
Approved-by: Giovanni Mascellani (@giomasce) Approved-by: Henri Verbeet (@hverbeet) Approved-by: Alexandre Julliard (@julliard) Merge-Request: https://gitlab.winehq.org/wine/vkd3d/-/merge_requests/827
@ -329,6 +329,9 @@ static const char * const shader_opcode_names[] =
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[VKD3DSIH_UTOU ] = "utou",
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[VKD3DSIH_UTOU ] = "utou",
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[VKD3DSIH_WAVE_ACTIVE_ALL_EQUAL ] = "wave_active_all_equal",
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[VKD3DSIH_WAVE_ACTIVE_ALL_EQUAL ] = "wave_active_all_equal",
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[VKD3DSIH_WAVE_ACTIVE_BALLOT ] = "wave_active_ballot",
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[VKD3DSIH_WAVE_ACTIVE_BALLOT ] = "wave_active_ballot",
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[VKD3DSIH_WAVE_ACTIVE_BIT_AND ] = "wave_active_bit_and",
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[VKD3DSIH_WAVE_ACTIVE_BIT_OR ] = "wave_active_bit_or",
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[VKD3DSIH_WAVE_ACTIVE_BIT_XOR ] = "wave_active_bit_xor",
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[VKD3DSIH_WAVE_ALL_TRUE ] = "wave_all_true",
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[VKD3DSIH_WAVE_ALL_TRUE ] = "wave_all_true",
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[VKD3DSIH_WAVE_ANY_TRUE ] = "wave_any_true",
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[VKD3DSIH_WAVE_ANY_TRUE ] = "wave_any_true",
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[VKD3DSIH_XOR ] = "xor",
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[VKD3DSIH_XOR ] = "xor",
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@ -433,6 +433,7 @@ enum dx_intrinsic_opcode
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DX_WAVE_ALL_TRUE = 114,
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DX_WAVE_ALL_TRUE = 114,
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DX_WAVE_ACTIVE_ALL_EQUAL = 115,
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DX_WAVE_ACTIVE_ALL_EQUAL = 115,
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DX_WAVE_ACTIVE_BALLOT = 116,
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DX_WAVE_ACTIVE_BALLOT = 116,
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DX_WAVE_ACTIVE_BIT = 120,
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DX_LEGACY_F32TOF16 = 130,
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DX_LEGACY_F32TOF16 = 130,
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DX_LEGACY_F16TOF32 = 131,
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DX_LEGACY_F16TOF32 = 131,
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DX_RAW_BUFFER_LOAD = 139,
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DX_RAW_BUFFER_LOAD = 139,
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@ -534,6 +535,13 @@ enum dxil_sync_flags
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SYNC_GROUP_SHARED_MEMORY = 0x8,
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SYNC_GROUP_SHARED_MEMORY = 0x8,
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};
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};
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enum dxil_wave_bit_op_kind
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{
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WAVE_BIT_OP_AND = 0,
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WAVE_BIT_OP_OR = 1,
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WAVE_BIT_OP_XOR = 2,
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};
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struct sm6_pointer_info
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struct sm6_pointer_info
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{
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{
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const struct sm6_type *type;
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const struct sm6_type *type;
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@ -5925,6 +5933,46 @@ static void sm6_parser_emit_dx_wave_active_ballot(struct sm6_parser *sm6, enum d
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instruction_dst_param_init_ssa_vector(ins, VKD3D_VEC4_SIZE, sm6);
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instruction_dst_param_init_ssa_vector(ins, VKD3D_VEC4_SIZE, sm6);
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}
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}
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static enum vkd3d_shader_opcode sm6_dx_map_wave_bit_op(enum dxil_wave_bit_op_kind op,
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struct sm6_parser *sm6)
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{
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switch (op)
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{
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case WAVE_BIT_OP_AND:
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return VKD3DSIH_WAVE_ACTIVE_BIT_AND;
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case WAVE_BIT_OP_OR:
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return VKD3DSIH_WAVE_ACTIVE_BIT_OR;
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case WAVE_BIT_OP_XOR:
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return VKD3DSIH_WAVE_ACTIVE_BIT_XOR;
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default:
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FIXME("Unhandled wave bit op %u.\n", op);
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vkd3d_shader_parser_error(&sm6->p, VKD3D_SHADER_ERROR_DXIL_UNHANDLED_INTRINSIC,
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"Wave bit operation %u is unhandled.\n", op);
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return VKD3DSIH_INVALID;
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}
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}
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static void sm6_parser_emit_dx_wave_active_bit(struct sm6_parser *sm6, enum dx_intrinsic_opcode op,
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const struct sm6_value **operands, struct function_emission_state *state)
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{
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struct vkd3d_shader_instruction *ins = state->ins;
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struct vkd3d_shader_src_param *src_param;
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enum dxil_wave_bit_op_kind wave_op;
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enum vkd3d_shader_opcode opcode;
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wave_op = sm6_value_get_constant_uint(operands[1]);
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if ((opcode = sm6_dx_map_wave_bit_op(wave_op, sm6)) == VKD3DSIH_INVALID)
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return;
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vsir_instruction_init(ins, &sm6->p.location, opcode);
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if (!(src_param = instruction_src_params_alloc(ins, 1, sm6)))
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return;
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src_param_init_from_value(src_param, operands[0]);
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instruction_dst_param_init_ssa_scalar(ins, sm6);
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}
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static void sm6_parser_emit_dx_wave_builtin(struct sm6_parser *sm6, enum dx_intrinsic_opcode op,
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static void sm6_parser_emit_dx_wave_builtin(struct sm6_parser *sm6, enum dx_intrinsic_opcode op,
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const struct sm6_value **operands, struct function_emission_state *state)
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const struct sm6_value **operands, struct function_emission_state *state)
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{
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{
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@ -6068,6 +6116,7 @@ static const struct sm6_dx_opcode_info sm6_dx_op_table[] =
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[DX_UMIN ] = {"m", "RR", sm6_parser_emit_dx_binary},
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[DX_UMIN ] = {"m", "RR", sm6_parser_emit_dx_binary},
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[DX_WAVE_ACTIVE_ALL_EQUAL ] = {"1", "n", sm6_parser_emit_dx_unary},
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[DX_WAVE_ACTIVE_ALL_EQUAL ] = {"1", "n", sm6_parser_emit_dx_unary},
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[DX_WAVE_ACTIVE_BALLOT ] = {"V", "1", sm6_parser_emit_dx_wave_active_ballot},
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[DX_WAVE_ACTIVE_BALLOT ] = {"V", "1", sm6_parser_emit_dx_wave_active_ballot},
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[DX_WAVE_ACTIVE_BIT ] = {"m", "Rc", sm6_parser_emit_dx_wave_active_bit},
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[DX_WAVE_ALL_TRUE ] = {"1", "1", sm6_parser_emit_dx_unary},
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[DX_WAVE_ALL_TRUE ] = {"1", "1", sm6_parser_emit_dx_unary},
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[DX_WAVE_ANY_TRUE ] = {"1", "1", sm6_parser_emit_dx_unary},
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[DX_WAVE_ANY_TRUE ] = {"1", "1", sm6_parser_emit_dx_unary},
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[DX_WAVE_GET_LANE_COUNT ] = {"i", "", sm6_parser_emit_dx_wave_builtin},
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[DX_WAVE_GET_LANE_COUNT ] = {"i", "", sm6_parser_emit_dx_wave_builtin},
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@ -529,6 +529,9 @@ enum vkd3d_shader_opcode
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VKD3DSIH_UTOU,
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VKD3DSIH_UTOU,
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VKD3DSIH_WAVE_ACTIVE_ALL_EQUAL,
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VKD3DSIH_WAVE_ACTIVE_ALL_EQUAL,
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VKD3DSIH_WAVE_ACTIVE_BALLOT,
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VKD3DSIH_WAVE_ACTIVE_BALLOT,
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VKD3DSIH_WAVE_ACTIVE_BIT_AND,
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VKD3DSIH_WAVE_ACTIVE_BIT_OR,
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VKD3DSIH_WAVE_ACTIVE_BIT_XOR,
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VKD3DSIH_WAVE_ALL_TRUE,
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VKD3DSIH_WAVE_ALL_TRUE,
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VKD3DSIH_WAVE_ANY_TRUE,
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VKD3DSIH_WAVE_ANY_TRUE,
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VKD3DSIH_XOR,
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VKD3DSIH_XOR,
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