From ad2f821ff5da974775a3730435844e98288d88cf Mon Sep 17 00:00:00 2001 From: Francisco Casas Date: Thu, 10 Oct 2024 19:35:34 -0300 Subject: [PATCH] vkd3d-shader/tpf: Write sysval semantic consistently. Specifically we should write the sysval semantic as an instruction idx for the following instructions: VKD3D_SM4_OP_DCL_INPUT_SGV VKD3D_SM4_OP_DCL_INPUT_PS_SGV VKD3D_SM4_OP_DCL_INPUT_SIV VKD3D_SM4_OP_DCL_INPUT_PS_SIV VKD3D_SM4_OP_DCL_OUTPUT_SIV and not the following ones: VKD3D_SM4_OP_DCL_INPUT VKD3D_SM4_OP_DCL_PS_INPUT VKD3D_SM4_OP_DCL_OUTPUT Which is consistent with what we do when reading these instructions in the following functions: shader_sm4_read_declaration_register_semantic() shader_sm4_read_dcl_input_ps_siv() and shader_sm4_read_dcl_input_ps() shader_sm4_read_declaration_dst() for the non-SGV and non-SIV cases. Note that the non-SGV and non-SIV instructions don't need/use this extra information because they rely on the dst register type and index. I suggest to introduce this change because the here replaced check is brittle, and we might be omitting the sysval semantic in some cases. --- libs/vkd3d-shader/tpf.c | 26 +++++++++++++------------- 1 file changed, 13 insertions(+), 13 deletions(-) diff --git a/libs/vkd3d-shader/tpf.c b/libs/vkd3d-shader/tpf.c index 1957dd25..20f5f634 100644 --- a/libs/vkd3d-shader/tpf.c +++ b/libs/vkd3d-shader/tpf.c @@ -4877,20 +4877,20 @@ static void write_sm4_dcl_semantic(const struct tpf_writer *tpf, const struct hl instr.opcode = VKD3D_SM4_OP_DCL_OUTPUT_SIV; } - switch (semantic) + if (instr.opcode == VKD3D_SM4_OP_DCL_OUTPUT) { - case VKD3D_SHADER_SV_COVERAGE: - case VKD3D_SHADER_SV_DEPTH: - case VKD3D_SHADER_SV_DEPTH_GREATER_EQUAL: - case VKD3D_SHADER_SV_DEPTH_LESS_EQUAL: - case VKD3D_SHADER_SV_TARGET: - case VKD3D_SHADER_SV_NONE: - break; - - default: - instr.idx_count = 1; - instr.idx[0] = semantic; - break; + VKD3D_ASSERT(semantic == VKD3D_SHADER_SV_NONE || semantic == VKD3D_SHADER_SV_TARGET + || instr.dsts[0].reg.type != VKD3DSPR_OUTPUT); + } + else if (instr.opcode == VKD3D_SM4_OP_DCL_INPUT || instr.opcode == VKD3D_SM4_OP_DCL_INPUT_PS) + { + VKD3D_ASSERT(semantic == VKD3D_SHADER_SV_NONE); + } + else + { + VKD3D_ASSERT(semantic != VKD3D_SHADER_SV_NONE); + instr.idx_count = 1; + instr.idx[0] = semantic; } write_sm4_instruction(tpf, &instr);