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vkd3d-shader/ir: Validate the TEMP register indices in each HS phase.
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Notes:
Alexandre Julliard
2023-11-10 00:10:44 +01:00
Approved-by: Henri Verbeet (@hverbeet) Approved-by: Alexandre Julliard (@julliard) Merge-Request: https://gitlab.winehq.org/wine/vkd3d/-/merge_requests/462
@ -1472,6 +1472,7 @@ struct validation_context
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struct vkd3d_shader_parser *parser;
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struct vkd3d_shader_parser *parser;
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size_t instruction_idx;
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size_t instruction_idx;
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bool dcl_temps_found;
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bool dcl_temps_found;
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unsigned int temp_count;
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enum vkd3d_shader_opcode phase;
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enum vkd3d_shader_opcode phase;
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enum vkd3d_shader_opcode *blocks;
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enum vkd3d_shader_opcode *blocks;
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@ -1500,6 +1501,12 @@ static void VKD3D_PRINTF_FUNC(3, 4) validator_error(struct validation_context *c
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static void vsir_validate_register(struct validation_context *ctx,
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static void vsir_validate_register(struct validation_context *ctx,
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const struct vkd3d_shader_register *reg)
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const struct vkd3d_shader_register *reg)
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{
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{
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unsigned int temp_count = ctx->temp_count;
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/* SM1-3 shaders do not include a DCL_TEMPS instruction. */
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if (ctx->parser->shader_version.major <= 3)
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temp_count = ctx->parser->shader_desc.temp_count;
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if (reg->type >= VKD3DSPR_COUNT)
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if (reg->type >= VKD3DSPR_COUNT)
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validator_error(ctx, VKD3D_SHADER_ERROR_VSIR_INVALID_REGISTER_TYPE, "Invalid register type %#x.",
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validator_error(ctx, VKD3D_SHADER_ERROR_VSIR_INVALID_REGISTER_TYPE, "Invalid register type %#x.",
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reg->type);
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reg->type);
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@ -1530,9 +1537,9 @@ static void vsir_validate_register(struct validation_context *ctx,
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if (reg->idx_count >= 1 && reg->idx[0].rel_addr)
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if (reg->idx_count >= 1 && reg->idx[0].rel_addr)
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validator_error(ctx, VKD3D_SHADER_ERROR_VSIR_INVALID_INDEX, "Non-NULL relative address for a TEMP register.");
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validator_error(ctx, VKD3D_SHADER_ERROR_VSIR_INVALID_INDEX, "Non-NULL relative address for a TEMP register.");
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if (reg->idx_count >= 1 && reg->idx[0].offset >= ctx->parser->shader_desc.temp_count)
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if (reg->idx_count >= 1 && reg->idx[0].offset >= temp_count)
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validator_error(ctx, VKD3D_SHADER_ERROR_VSIR_INVALID_INDEX, "TEMP register index %u exceeds the declared count %u.",
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validator_error(ctx, VKD3D_SHADER_ERROR_VSIR_INVALID_INDEX, "TEMP register index %u exceeds the maximum count %u.",
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reg->idx[0].offset, ctx->parser->shader_desc.temp_count);
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reg->idx[0].offset, temp_count);
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break;
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break;
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default:
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default:
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@ -1636,6 +1643,8 @@ static void vsir_validate_instruction(struct validation_context *ctx)
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validator_error(ctx, VKD3D_SHADER_ERROR_VSIR_INVALID_INSTRUCTION_NESTING, "Phase instruction %#x must appear to top level.",
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validator_error(ctx, VKD3D_SHADER_ERROR_VSIR_INVALID_INSTRUCTION_NESTING, "Phase instruction %#x must appear to top level.",
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instruction->handler_idx);
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instruction->handler_idx);
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ctx->phase = instruction->handler_idx;
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ctx->phase = instruction->handler_idx;
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ctx->dcl_temps_found = false;
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ctx->temp_count = 0;
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return;
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return;
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default:
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default:
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@ -1652,15 +1661,13 @@ static void vsir_validate_instruction(struct validation_context *ctx)
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case VKD3DSIH_DCL_TEMPS:
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case VKD3DSIH_DCL_TEMPS:
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vsir_validate_dst_count(ctx, instruction, 0);
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vsir_validate_dst_count(ctx, instruction, 0);
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vsir_validate_src_count(ctx, instruction, 0);
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vsir_validate_src_count(ctx, instruction, 0);
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/* TODO Check that each phase in a hull shader has at most
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if (ctx->dcl_temps_found)
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* one occurrence. */
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if (ctx->dcl_temps_found && ctx->parser->shader_version.type != VKD3D_SHADER_TYPE_HULL)
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validator_error(ctx, VKD3D_SHADER_ERROR_VSIR_DUPLICATE_DCL_TEMPS, "Duplicate DCL_TEMPS instruction.");
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validator_error(ctx, VKD3D_SHADER_ERROR_VSIR_DUPLICATE_DCL_TEMPS, "Duplicate DCL_TEMPS instruction.");
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ctx->dcl_temps_found = true;
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if (instruction->declaration.count > ctx->parser->shader_desc.temp_count)
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if (instruction->declaration.count != ctx->parser->shader_desc.temp_count &&
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validator_error(ctx, VKD3D_SHADER_ERROR_VSIR_INVALID_DCL_TEMPS, "Invalid DCL_TEMPS count %u, expected at most %u.",
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ctx->parser->shader_version.type != VKD3D_SHADER_TYPE_HULL)
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validator_error(ctx, VKD3D_SHADER_ERROR_VSIR_INVALID_DCL_TEMPS, "Invalid DCL_TEMPS count %u, expected %u.",
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instruction->declaration.count, ctx->parser->shader_desc.temp_count);
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instruction->declaration.count, ctx->parser->shader_desc.temp_count);
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ctx->dcl_temps_found = true;
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ctx->temp_count = instruction->declaration.count;
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break;
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break;
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case VKD3DSIH_IF:
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case VKD3DSIH_IF:
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