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vkd3d-shader/hlsl: Store SM1 sampler dcls on the vsir_program.
This commit is contained in:
parent
9a564872c5
commit
a61846c28a
Notes:
Henri Verbeet
2024-09-04 18:48:04 +02:00
Approved-by: Elizabeth Figura (@zfigura) Approved-by: Henri Verbeet (@hverbeet) Merge-Request: https://gitlab.winehq.org/wine/vkd3d/-/merge_requests/941
@ -2193,6 +2193,71 @@ static void d3dbc_write_vsir_def(struct d3dbc_compiler *d3dbc, const struct vkd3
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put_f32(buffer, ins->src[0].reg.u.immconst_f32[x]);
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}
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static void d3dbc_write_vsir_sampler_dcl(struct d3dbc_compiler *d3dbc,
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unsigned int reg_id, enum vkd3d_sm1_resource_type res_type)
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{
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const struct vkd3d_shader_version *version = &d3dbc->program->shader_version;
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struct vkd3d_bytecode_buffer *buffer = &d3dbc->buffer;
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struct sm1_dst_register reg = {0};
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uint32_t token;
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token = VKD3D_SM1_OP_DCL;
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if (version->major > 1)
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token |= 2 << VKD3D_SM1_INSTRUCTION_LENGTH_SHIFT;
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put_u32(buffer, token);
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token = VKD3D_SM1_INSTRUCTION_PARAMETER;
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token |= res_type << VKD3D_SM1_RESOURCE_TYPE_SHIFT;
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put_u32(buffer, token);
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reg.type = VKD3DSPR_COMBINED_SAMPLER;
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reg.writemask = VKD3DSP_WRITEMASK_ALL;
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reg.reg = reg_id;
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write_sm1_dst_register(buffer, ®);
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}
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static void d3dbc_write_vsir_dcl(struct d3dbc_compiler *d3dbc, const struct vkd3d_shader_instruction *ins)
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{
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const struct vkd3d_shader_version *version = &d3dbc->program->shader_version;
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const struct vkd3d_shader_semantic *semantic = &ins->declaration.semantic;
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unsigned int reg_id;
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if (version->major < 2)
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return;
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reg_id = semantic->resource.reg.reg.idx[0].offset;
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if (semantic->resource.reg.reg.type != VKD3DSPR_SAMPLER)
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{
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vkd3d_shader_error(d3dbc->message_context, &ins->location, VKD3D_SHADER_ERROR_D3DBC_INVALID_REGISTER_TYPE,
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"dcl instruction with register type %u.", semantic->resource.reg.reg.type);
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d3dbc->failed = true;
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return;
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}
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switch (semantic->resource_type)
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{
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case VKD3D_SHADER_RESOURCE_TEXTURE_2D:
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d3dbc_write_vsir_sampler_dcl(d3dbc, reg_id, VKD3D_SM1_RESOURCE_TEXTURE_2D);
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break;
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case VKD3D_SHADER_RESOURCE_TEXTURE_CUBE:
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d3dbc_write_vsir_sampler_dcl(d3dbc, reg_id, VKD3D_SM1_RESOURCE_TEXTURE_CUBE);
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break;
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case VKD3D_SHADER_RESOURCE_TEXTURE_3D:
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d3dbc_write_vsir_sampler_dcl(d3dbc, reg_id, VKD3D_SM1_RESOURCE_TEXTURE_3D);
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break;
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default:
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vkd3d_shader_error(d3dbc->message_context, &ins->location, VKD3D_SHADER_ERROR_D3DBC_INVALID_RESOURCE_TYPE,
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"dcl instruction with resource_type %u.", semantic->resource_type);
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d3dbc->failed = true;
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return;
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}
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}
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static void d3dbc_write_vsir_instruction(struct d3dbc_compiler *d3dbc, const struct vkd3d_shader_instruction *ins)
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{
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switch (ins->opcode)
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@ -2201,6 +2266,10 @@ static void d3dbc_write_vsir_instruction(struct d3dbc_compiler *d3dbc, const str
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d3dbc_write_vsir_def(d3dbc, ins);
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break;
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case VKD3DSIH_DCL:
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d3dbc_write_vsir_dcl(d3dbc, ins);
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break;
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default:
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vkd3d_shader_error(d3dbc->message_context, &ins->location, VKD3D_SHADER_ERROR_D3DBC_INVALID_OPCODE,
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"vsir instruction with opcode %#x.", ins->opcode);
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@ -2274,86 +2343,6 @@ static void d3dbc_write_semantic_dcls(struct d3dbc_compiler *d3dbc)
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}
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}
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static void d3dbc_write_sampler_dcl(struct d3dbc_compiler *d3dbc,
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unsigned int reg_id, enum hlsl_sampler_dim sampler_dim)
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{
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const struct vkd3d_shader_version *version = &d3dbc->program->shader_version;
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struct vkd3d_bytecode_buffer *buffer = &d3dbc->buffer;
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struct sm1_dst_register reg = {0};
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uint32_t token, res_type = 0;
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token = D3DSIO_DCL;
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if (version->major > 1)
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token |= 2 << D3DSI_INSTLENGTH_SHIFT;
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put_u32(buffer, token);
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switch (sampler_dim)
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{
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case HLSL_SAMPLER_DIM_2D:
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res_type = VKD3D_SM1_RESOURCE_TEXTURE_2D;
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break;
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case HLSL_SAMPLER_DIM_CUBE:
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res_type = VKD3D_SM1_RESOURCE_TEXTURE_CUBE;
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break;
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case HLSL_SAMPLER_DIM_3D:
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res_type = VKD3D_SM1_RESOURCE_TEXTURE_3D;
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break;
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default:
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vkd3d_unreachable();
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break;
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}
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token = (1u << 31);
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token |= res_type << VKD3D_SM1_RESOURCE_TYPE_SHIFT;
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put_u32(buffer, token);
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reg.type = VKD3DSPR_COMBINED_SAMPLER;
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reg.writemask = VKD3DSP_WRITEMASK_ALL;
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reg.reg = reg_id;
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write_sm1_dst_register(buffer, ®);
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}
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static void d3dbc_write_sampler_dcls(struct d3dbc_compiler *d3dbc)
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{
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const struct vkd3d_shader_version *version = &d3dbc->program->shader_version;
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struct hlsl_ctx *ctx = d3dbc->ctx;
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enum hlsl_sampler_dim sampler_dim;
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unsigned int i, count, reg_id;
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struct hlsl_ir_var *var;
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if (version->major < 2)
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return;
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LIST_FOR_EACH_ENTRY(var, &ctx->extern_vars, struct hlsl_ir_var, extern_entry)
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{
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if (!var->regs[HLSL_REGSET_SAMPLERS].allocated)
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continue;
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count = var->bind_count[HLSL_REGSET_SAMPLERS];
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for (i = 0; i < count; ++i)
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{
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if (var->objects_usage[HLSL_REGSET_SAMPLERS][i].used)
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{
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sampler_dim = var->objects_usage[HLSL_REGSET_SAMPLERS][i].sampler_dim;
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if (sampler_dim == HLSL_SAMPLER_DIM_GENERIC)
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{
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/* These can appear in sm4-style combined sample instructions. */
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hlsl_fixme(ctx, &var->loc, "Generic samplers need to be lowered.");
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continue;
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}
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reg_id = var->regs[HLSL_REGSET_SAMPLERS].index + i;
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d3dbc_write_sampler_dcl(d3dbc, reg_id, sampler_dim);
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}
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}
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}
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}
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static void d3dbc_write_constant(struct d3dbc_compiler *d3dbc, const struct hlsl_ir_node *instr)
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{
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const struct hlsl_ir_constant *constant = hlsl_ir_constant(instr);
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@ -2928,7 +2917,6 @@ int d3dbc_compile(struct vsir_program *program, uint64_t config_flags,
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bytecode_put_bytes(buffer, ctab->code, ctab->size);
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d3dbc_write_semantic_dcls(&d3dbc);
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d3dbc_write_sampler_dcls(&d3dbc);
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d3dbc_write_block(&d3dbc, &entry_func->body);
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put_u32(buffer, D3DSIO_END);
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@ -6069,6 +6069,94 @@ static void sm1_generate_vsir_constant_defs(struct hlsl_ctx *ctx, struct vsir_pr
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}
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}
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static void sm1_generate_vsir_sampler_dcls(struct hlsl_ctx *ctx,
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struct vsir_program *program, struct hlsl_block *block)
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{
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struct vkd3d_shader_instruction_array *instructions = &program->instructions;
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enum vkd3d_shader_resource_type resource_type;
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struct vkd3d_shader_register_range *range;
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struct vkd3d_shader_dst_param *dst_param;
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struct vkd3d_shader_semantic *semantic;
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struct vkd3d_shader_instruction *ins;
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enum hlsl_sampler_dim sampler_dim;
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struct hlsl_ir_node *vsir_instr;
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struct hlsl_ir_var *var;
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unsigned int i, count;
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LIST_FOR_EACH_ENTRY(var, &ctx->extern_vars, struct hlsl_ir_var, extern_entry)
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{
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if (!var->regs[HLSL_REGSET_SAMPLERS].allocated)
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continue;
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count = var->bind_count[HLSL_REGSET_SAMPLERS];
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for (i = 0; i < count; ++i)
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{
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if (var->objects_usage[HLSL_REGSET_SAMPLERS][i].used)
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{
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sampler_dim = var->objects_usage[HLSL_REGSET_SAMPLERS][i].sampler_dim;
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switch (sampler_dim)
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{
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case HLSL_SAMPLER_DIM_2D:
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resource_type = VKD3D_SHADER_RESOURCE_TEXTURE_2D;
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break;
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case HLSL_SAMPLER_DIM_CUBE:
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resource_type = VKD3D_SHADER_RESOURCE_TEXTURE_CUBE;
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break;
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case HLSL_SAMPLER_DIM_3D:
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resource_type = VKD3D_SHADER_RESOURCE_TEXTURE_3D;
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break;
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case HLSL_SAMPLER_DIM_GENERIC:
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/* These can appear in sm4-style combined sample instructions. */
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hlsl_fixme(ctx, &var->loc, "Generic samplers need to be lowered.");
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continue;
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default:
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vkd3d_unreachable();
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break;
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}
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if (!shader_instruction_array_reserve(instructions, instructions->count + 1))
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{
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ctx->result = VKD3D_ERROR_OUT_OF_MEMORY;
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return;
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}
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ins = &instructions->elements[instructions->count];
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if (!vsir_instruction_init_with_params(program, ins, &var->loc, VKD3DSIH_DCL, 0, 0))
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{
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ctx->result = VKD3D_ERROR_OUT_OF_MEMORY;
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return;
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}
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++instructions->count;
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semantic = &ins->declaration.semantic;
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semantic->resource_type = resource_type;
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dst_param = &semantic->resource.reg;
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vsir_register_init(&dst_param->reg, VKD3DSPR_SAMPLER, VKD3D_DATA_FLOAT, 1);
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dst_param->reg.dimension = VSIR_DIMENSION_NONE;
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dst_param->reg.idx[0].offset = var->regs[HLSL_REGSET_SAMPLERS].index + i;
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dst_param->write_mask = 0;
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range = &semantic->resource.range;
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range->space = 0;
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range->first = range->last = dst_param->reg.idx[0].offset;
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if (!(vsir_instr = hlsl_new_vsir_instruction_ref(ctx, instructions->count - 1, NULL,
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NULL, &var->loc)))
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{
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ctx->result = VKD3D_ERROR_OUT_OF_MEMORY;
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return;
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}
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hlsl_block_add_instr(block, vsir_instr);
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}
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}
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}
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}
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/* OBJECTIVE: Translate all the information from ctx and entry_func to the
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* vsir_program and ctab blob, so they can be used as input to d3dbc_compile()
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* without relying on ctx and entry_func. */
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@ -6102,6 +6190,7 @@ static void sm1_generate_vsir(struct hlsl_ctx *ctx, struct hlsl_ir_function_decl
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hlsl_block_init(&block);
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sm1_generate_vsir_constant_defs(ctx, program, &block);
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sm1_generate_vsir_sampler_dcls(ctx, program, &block);
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list_move_head(&entry_func->body.instrs, &block.instrs);
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}
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@ -169,6 +169,7 @@ enum vkd3d_shader_error
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VKD3D_SHADER_ERROR_D3DBC_OUT_OF_MEMORY = 7004,
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VKD3D_SHADER_ERROR_D3DBC_INVALID_REGISTER_INDEX = 7005,
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VKD3D_SHADER_ERROR_D3DBC_UNDECLARED_SEMANTIC = 7006,
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VKD3D_SHADER_ERROR_D3DBC_INVALID_REGISTER_TYPE = 7007,
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VKD3D_SHADER_WARNING_D3DBC_IGNORED_INSTRUCTION_FLAGS= 7300,
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