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vkd3d-shader/hlsl: Store SM1 sampler dcls on the vsir_program.

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This commit is contained in:
Francisco Casas 2024-05-23 21:22:04 -04:00 committed by Henri Verbeet
parent 9a564872c5
commit a61846c28a
Notes: Henri Verbeet 2024-09-04 18:48:04 +02:00 
Approved-by: Elizabeth Figura (@zfigura)
Approved-by: Henri Verbeet (@hverbeet)
Merge-Request: https://gitlab.winehq.org/wine/vkd3d/-/merge_requests/941
3 changed files with 159 additions and 81 deletions
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150
libs/vkd3d-shader/d3dbc.c
View File

@ -2193,6 +2193,71 @@ static void d3dbc_write_vsir_def(struct d3dbc_compiler *d3dbc, const struct vkd3
put_f32(buffer, ins->src[0].reg.u.immconst_f32[x]); put_f32(buffer, ins->src[0].reg.u.immconst_f32[x]);
} }
static void d3dbc_write_vsir_sampler_dcl(struct d3dbc_compiler *d3dbc,
unsigned int reg_id, enum vkd3d_sm1_resource_type res_type)
{
const struct vkd3d_shader_version *version = &d3dbc->program->shader_version;
struct vkd3d_bytecode_buffer *buffer = &d3dbc->buffer;
struct sm1_dst_register reg = {0};
uint32_t token;
token = VKD3D_SM1_OP_DCL;
if (version->major > 1)
token |= 2 << VKD3D_SM1_INSTRUCTION_LENGTH_SHIFT;
put_u32(buffer, token);
token = VKD3D_SM1_INSTRUCTION_PARAMETER;
token |= res_type << VKD3D_SM1_RESOURCE_TYPE_SHIFT;
put_u32(buffer, token);
reg.type = VKD3DSPR_COMBINED_SAMPLER;
reg.writemask = VKD3DSP_WRITEMASK_ALL;
reg.reg = reg_id;
write_sm1_dst_register(buffer, &reg);
}
static void d3dbc_write_vsir_dcl(struct d3dbc_compiler *d3dbc, const struct vkd3d_shader_instruction *ins)
{
const struct vkd3d_shader_version *version = &d3dbc->program->shader_version;
const struct vkd3d_shader_semantic *semantic = &ins->declaration.semantic;
unsigned int reg_id;
if (version->major < 2)
return;
reg_id = semantic->resource.reg.reg.idx[0].offset;
if (semantic->resource.reg.reg.type != VKD3DSPR_SAMPLER)
{
vkd3d_shader_error(d3dbc->message_context, &ins->location, VKD3D_SHADER_ERROR_D3DBC_INVALID_REGISTER_TYPE,
"dcl instruction with register type %u.", semantic->resource.reg.reg.type);
d3dbc->failed = true;
return;
}
switch (semantic->resource_type)
{
case VKD3D_SHADER_RESOURCE_TEXTURE_2D:
d3dbc_write_vsir_sampler_dcl(d3dbc, reg_id, VKD3D_SM1_RESOURCE_TEXTURE_2D);
break;
case VKD3D_SHADER_RESOURCE_TEXTURE_CUBE:
d3dbc_write_vsir_sampler_dcl(d3dbc, reg_id, VKD3D_SM1_RESOURCE_TEXTURE_CUBE);
break;
case VKD3D_SHADER_RESOURCE_TEXTURE_3D:
d3dbc_write_vsir_sampler_dcl(d3dbc, reg_id, VKD3D_SM1_RESOURCE_TEXTURE_3D);
break;
default:
vkd3d_shader_error(d3dbc->message_context, &ins->location, VKD3D_SHADER_ERROR_D3DBC_INVALID_RESOURCE_TYPE,
"dcl instruction with resource_type %u.", semantic->resource_type);
d3dbc->failed = true;
return;
}
}
static void d3dbc_write_vsir_instruction(struct d3dbc_compiler *d3dbc, const struct vkd3d_shader_instruction *ins) static void d3dbc_write_vsir_instruction(struct d3dbc_compiler *d3dbc, const struct vkd3d_shader_instruction *ins)
{ {
switch (ins->opcode) switch (ins->opcode)
@ -2201,6 +2266,10 @@ static void d3dbc_write_vsir_instruction(struct d3dbc_compiler *d3dbc, const str
d3dbc_write_vsir_def(d3dbc, ins); d3dbc_write_vsir_def(d3dbc, ins);
break; break;
case VKD3DSIH_DCL:
d3dbc_write_vsir_dcl(d3dbc, ins);
break;
default: default:
vkd3d_shader_error(d3dbc->message_context, &ins->location, VKD3D_SHADER_ERROR_D3DBC_INVALID_OPCODE, vkd3d_shader_error(d3dbc->message_context, &ins->location, VKD3D_SHADER_ERROR_D3DBC_INVALID_OPCODE,
"vsir instruction with opcode %#x.", ins->opcode); "vsir instruction with opcode %#x.", ins->opcode);
@ -2274,86 +2343,6 @@ static void d3dbc_write_semantic_dcls(struct d3dbc_compiler *d3dbc)
} }
} }
static void d3dbc_write_sampler_dcl(struct d3dbc_compiler *d3dbc,
unsigned int reg_id, enum hlsl_sampler_dim sampler_dim)
{
const struct vkd3d_shader_version *version = &d3dbc->program->shader_version;
struct vkd3d_bytecode_buffer *buffer = &d3dbc->buffer;
struct sm1_dst_register reg = {0};
uint32_t token, res_type = 0;
token = D3DSIO_DCL;
if (version->major > 1)
token |= 2 << D3DSI_INSTLENGTH_SHIFT;
put_u32(buffer, token);
switch (sampler_dim)
{
case HLSL_SAMPLER_DIM_2D:
res_type = VKD3D_SM1_RESOURCE_TEXTURE_2D;
break;
case HLSL_SAMPLER_DIM_CUBE:
res_type = VKD3D_SM1_RESOURCE_TEXTURE_CUBE;
break;
case HLSL_SAMPLER_DIM_3D:
res_type = VKD3D_SM1_RESOURCE_TEXTURE_3D;
break;
default:
vkd3d_unreachable();
break;
}
token = (1u << 31);
token |= res_type << VKD3D_SM1_RESOURCE_TYPE_SHIFT;
put_u32(buffer, token);
reg.type = VKD3DSPR_COMBINED_SAMPLER;
reg.writemask = VKD3DSP_WRITEMASK_ALL;
reg.reg = reg_id;
write_sm1_dst_register(buffer, &reg);
}
static void d3dbc_write_sampler_dcls(struct d3dbc_compiler *d3dbc)
{
const struct vkd3d_shader_version *version = &d3dbc->program->shader_version;
struct hlsl_ctx *ctx = d3dbc->ctx;
enum hlsl_sampler_dim sampler_dim;
unsigned int i, count, reg_id;
struct hlsl_ir_var *var;
if (version->major < 2)
return;
LIST_FOR_EACH_ENTRY(var, &ctx->extern_vars, struct hlsl_ir_var, extern_entry)
{
if (!var->regs[HLSL_REGSET_SAMPLERS].allocated)
continue;
count = var->bind_count[HLSL_REGSET_SAMPLERS];
for (i = 0; i < count; ++i)
{
if (var->objects_usage[HLSL_REGSET_SAMPLERS][i].used)
{
sampler_dim = var->objects_usage[HLSL_REGSET_SAMPLERS][i].sampler_dim;
if (sampler_dim == HLSL_SAMPLER_DIM_GENERIC)
{
/* These can appear in sm4-style combined sample instructions. */
hlsl_fixme(ctx, &var->loc, "Generic samplers need to be lowered.");
continue;
}
reg_id = var->regs[HLSL_REGSET_SAMPLERS].index + i;
d3dbc_write_sampler_dcl(d3dbc, reg_id, sampler_dim);
}
}
}
}
static void d3dbc_write_constant(struct d3dbc_compiler *d3dbc, const struct hlsl_ir_node *instr) static void d3dbc_write_constant(struct d3dbc_compiler *d3dbc, const struct hlsl_ir_node *instr)
{ {
const struct hlsl_ir_constant *constant = hlsl_ir_constant(instr); const struct hlsl_ir_constant *constant = hlsl_ir_constant(instr);
@ -2928,7 +2917,6 @@ int d3dbc_compile(struct vsir_program *program, uint64_t config_flags,
bytecode_put_bytes(buffer, ctab->code, ctab->size); bytecode_put_bytes(buffer, ctab->code, ctab->size);
d3dbc_write_semantic_dcls(&d3dbc); d3dbc_write_semantic_dcls(&d3dbc);
d3dbc_write_sampler_dcls(&d3dbc);
d3dbc_write_block(&d3dbc, &entry_func->body); d3dbc_write_block(&d3dbc, &entry_func->body);
put_u32(buffer, D3DSIO_END); put_u32(buffer, D3DSIO_END);

89
libs/vkd3d-shader/hlsl_codegen.c
View File

@ -6069,6 +6069,94 @@ static void sm1_generate_vsir_constant_defs(struct hlsl_ctx *ctx, struct vsir_pr
} }
} }
static void sm1_generate_vsir_sampler_dcls(struct hlsl_ctx *ctx,
struct vsir_program *program, struct hlsl_block *block)
{
struct vkd3d_shader_instruction_array *instructions = &program->instructions;
enum vkd3d_shader_resource_type resource_type;
struct vkd3d_shader_register_range *range;
struct vkd3d_shader_dst_param *dst_param;
struct vkd3d_shader_semantic *semantic;
struct vkd3d_shader_instruction *ins;
enum hlsl_sampler_dim sampler_dim;
struct hlsl_ir_node *vsir_instr;
struct hlsl_ir_var *var;
unsigned int i, count;
LIST_FOR_EACH_ENTRY(var, &ctx->extern_vars, struct hlsl_ir_var, extern_entry)
{
if (!var->regs[HLSL_REGSET_SAMPLERS].allocated)
continue;
count = var->bind_count[HLSL_REGSET_SAMPLERS];
for (i = 0; i < count; ++i)
{
if (var->objects_usage[HLSL_REGSET_SAMPLERS][i].used)
{
sampler_dim = var->objects_usage[HLSL_REGSET_SAMPLERS][i].sampler_dim;
switch (sampler_dim)
{
case HLSL_SAMPLER_DIM_2D:
resource_type = VKD3D_SHADER_RESOURCE_TEXTURE_2D;
break;
case HLSL_SAMPLER_DIM_CUBE:
resource_type = VKD3D_SHADER_RESOURCE_TEXTURE_CUBE;
break;
case HLSL_SAMPLER_DIM_3D:
resource_type = VKD3D_SHADER_RESOURCE_TEXTURE_3D;
break;
case HLSL_SAMPLER_DIM_GENERIC:
/* These can appear in sm4-style combined sample instructions. */
hlsl_fixme(ctx, &var->loc, "Generic samplers need to be lowered.");
continue;
default:
vkd3d_unreachable();
break;
}
if (!shader_instruction_array_reserve(instructions, instructions->count + 1))
{
ctx->result = VKD3D_ERROR_OUT_OF_MEMORY;
return;
}
ins = &instructions->elements[instructions->count];
if (!vsir_instruction_init_with_params(program, ins, &var->loc, VKD3DSIH_DCL, 0, 0))
{
ctx->result = VKD3D_ERROR_OUT_OF_MEMORY;
return;
}
++instructions->count;
semantic = &ins->declaration.semantic;
semantic->resource_type = resource_type;
dst_param = &semantic->resource.reg;
vsir_register_init(&dst_param->reg, VKD3DSPR_SAMPLER, VKD3D_DATA_FLOAT, 1);
dst_param->reg.dimension = VSIR_DIMENSION_NONE;
dst_param->reg.idx[0].offset = var->regs[HLSL_REGSET_SAMPLERS].index + i;
dst_param->write_mask = 0;
range = &semantic->resource.range;
range->space = 0;
range->first = range->last = dst_param->reg.idx[0].offset;
if (!(vsir_instr = hlsl_new_vsir_instruction_ref(ctx, instructions->count - 1, NULL,
NULL, &var->loc)))
{
ctx->result = VKD3D_ERROR_OUT_OF_MEMORY;
return;
}
hlsl_block_add_instr(block, vsir_instr);
}
}
}
}
/* OBJECTIVE: Translate all the information from ctx and entry_func to the /* OBJECTIVE: Translate all the information from ctx and entry_func to the
* vsir_program and ctab blob, so they can be used as input to d3dbc_compile() * vsir_program and ctab blob, so they can be used as input to d3dbc_compile()
* without relying on ctx and entry_func. */ * without relying on ctx and entry_func. */
@ -6102,6 +6190,7 @@ static void sm1_generate_vsir(struct hlsl_ctx *ctx, struct hlsl_ir_function_decl
hlsl_block_init(&block); hlsl_block_init(&block);
sm1_generate_vsir_constant_defs(ctx, program, &block); sm1_generate_vsir_constant_defs(ctx, program, &block);
sm1_generate_vsir_sampler_dcls(ctx, program, &block);
list_move_head(&entry_func->body.instrs, &block.instrs); list_move_head(&entry_func->body.instrs, &block.instrs);
} }

1
libs/vkd3d-shader/vkd3d_shader_private.h
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@ -169,6 +169,7 @@ enum vkd3d_shader_error
VKD3D_SHADER_ERROR_D3DBC_OUT_OF_MEMORY = 7004, VKD3D_SHADER_ERROR_D3DBC_OUT_OF_MEMORY = 7004,
VKD3D_SHADER_ERROR_D3DBC_INVALID_REGISTER_INDEX = 7005, VKD3D_SHADER_ERROR_D3DBC_INVALID_REGISTER_INDEX = 7005,
VKD3D_SHADER_ERROR_D3DBC_UNDECLARED_SEMANTIC = 7006, VKD3D_SHADER_ERROR_D3DBC_UNDECLARED_SEMANTIC = 7006,
VKD3D_SHADER_ERROR_D3DBC_INVALID_REGISTER_TYPE = 7007,
VKD3D_SHADER_WARNING_D3DBC_IGNORED_INSTRUCTION_FLAGS= 7300, VKD3D_SHADER_WARNING_D3DBC_IGNORED_INSTRUCTION_FLAGS= 7300,