diff --git a/libs/vkd3d-shader/ir.c b/libs/vkd3d-shader/ir.c index 30afccd8..91f8d6b9 100644 --- a/libs/vkd3d-shader/ir.c +++ b/libs/vkd3d-shader/ir.c @@ -6265,6 +6265,17 @@ static void vsir_validate_dcl_tessellator_domain(struct validation_context *ctx, "Tessellator domain %#x is invalid.", instruction->declaration.tessellator_domain); } +static void vsir_validate_dcl_tessellator_output_primitive(struct validation_context *ctx, + const struct vkd3d_shader_instruction *instruction) +{ + if (!instruction->declaration.tessellator_output_primitive + || instruction->declaration.tessellator_output_primitive + > VKD3D_SHADER_TESSELLATOR_OUTPUT_TRIANGLE_CCW) + validator_error(ctx, VKD3D_SHADER_ERROR_VSIR_INVALID_TESSELLATION, + "Tessellator output primitive %#x is invalid.", + instruction->declaration.tessellator_output_primitive); +} + static void vsir_validate_dcl_vertices_out(struct validation_context *ctx, const struct vkd3d_shader_instruction *instruction) { @@ -6496,30 +6507,31 @@ struct vsir_validator_instruction_desc static const struct vsir_validator_instruction_desc vsir_validator_instructions[] = { - [VKD3DSIH_BRANCH] = {0, ~0u, vsir_validate_branch}, - [VKD3DSIH_DCL_GS_INSTANCES] = {0, 0, vsir_validate_dcl_gs_instances}, - [VKD3DSIH_DCL_HS_MAX_TESSFACTOR] = {0, 0, vsir_validate_dcl_hs_max_tessfactor}, - [VKD3DSIH_DCL_INPUT_PRIMITIVE] = {0, 0, vsir_validate_dcl_input_primitive}, - [VKD3DSIH_DCL_OUTPUT_CONTROL_POINT_COUNT] = {0, 0, vsir_validate_dcl_output_control_point_count}, - [VKD3DSIH_DCL_OUTPUT_TOPOLOGY] = {0, 0, vsir_validate_dcl_output_topology}, - [VKD3DSIH_DCL_TEMPS] = {0, 0, vsir_validate_dcl_temps}, - [VKD3DSIH_DCL_TESSELLATOR_DOMAIN] = {0, 0, vsir_validate_dcl_tessellator_domain}, - [VKD3DSIH_DCL_VERTICES_OUT] = {0, 0, vsir_validate_dcl_vertices_out}, - [VKD3DSIH_ELSE] = {0, 0, vsir_validate_else}, - [VKD3DSIH_ENDIF] = {0, 0, vsir_validate_endif}, - [VKD3DSIH_ENDLOOP] = {0, 0, vsir_validate_endloop}, - [VKD3DSIH_ENDREP] = {0, 0, vsir_validate_endrep}, - [VKD3DSIH_ENDSWITCH] = {0, 0, vsir_validate_endswitch}, - [VKD3DSIH_IF] = {0, 1, vsir_validate_if}, - [VKD3DSIH_IFC] = {0, 2, vsir_validate_ifc}, - [VKD3DSIH_LABEL] = {0, 1, vsir_validate_label}, - [VKD3DSIH_LOOP] = {0, ~0u, vsir_validate_loop}, - [VKD3DSIH_NOP] = {0, 0, vsir_validate_nop}, - [VKD3DSIH_PHI] = {1, ~0u, vsir_validate_phi}, - [VKD3DSIH_REP] = {0, 1, vsir_validate_rep}, - [VKD3DSIH_RET] = {0, 0, vsir_validate_ret}, - [VKD3DSIH_SWITCH] = {0, 1, vsir_validate_switch}, - [VKD3DSIH_SWITCH_MONOLITHIC] = {0, ~0u, vsir_validate_switch_monolithic}, + [VKD3DSIH_BRANCH] = {0, ~0u, vsir_validate_branch}, + [VKD3DSIH_DCL_GS_INSTANCES] = {0, 0, vsir_validate_dcl_gs_instances}, + [VKD3DSIH_DCL_HS_MAX_TESSFACTOR] = {0, 0, vsir_validate_dcl_hs_max_tessfactor}, + [VKD3DSIH_DCL_INPUT_PRIMITIVE] = {0, 0, vsir_validate_dcl_input_primitive}, + [VKD3DSIH_DCL_OUTPUT_CONTROL_POINT_COUNT] = {0, 0, vsir_validate_dcl_output_control_point_count}, + [VKD3DSIH_DCL_OUTPUT_TOPOLOGY] = {0, 0, vsir_validate_dcl_output_topology}, + [VKD3DSIH_DCL_TEMPS] = {0, 0, vsir_validate_dcl_temps}, + [VKD3DSIH_DCL_TESSELLATOR_DOMAIN] = {0, 0, vsir_validate_dcl_tessellator_domain}, + [VKD3DSIH_DCL_TESSELLATOR_OUTPUT_PRIMITIVE] = {0, 0, vsir_validate_dcl_tessellator_output_primitive}, + [VKD3DSIH_DCL_VERTICES_OUT] = {0, 0, vsir_validate_dcl_vertices_out}, + [VKD3DSIH_ELSE] = {0, 0, vsir_validate_else}, + [VKD3DSIH_ENDIF] = {0, 0, vsir_validate_endif}, + [VKD3DSIH_ENDLOOP] = {0, 0, vsir_validate_endloop}, + [VKD3DSIH_ENDREP] = {0, 0, vsir_validate_endrep}, + [VKD3DSIH_ENDSWITCH] = {0, 0, vsir_validate_endswitch}, + [VKD3DSIH_IF] = {0, 1, vsir_validate_if}, + [VKD3DSIH_IFC] = {0, 2, vsir_validate_ifc}, + [VKD3DSIH_LABEL] = {0, 1, vsir_validate_label}, + [VKD3DSIH_LOOP] = {0, ~0u, vsir_validate_loop}, + [VKD3DSIH_NOP] = {0, 0, vsir_validate_nop}, + [VKD3DSIH_PHI] = {1, ~0u, vsir_validate_phi}, + [VKD3DSIH_REP] = {0, 1, vsir_validate_rep}, + [VKD3DSIH_RET] = {0, 0, vsir_validate_ret}, + [VKD3DSIH_SWITCH] = {0, 1, vsir_validate_switch}, + [VKD3DSIH_SWITCH_MONOLITHIC] = {0, ~0u, vsir_validate_switch_monolithic}, }; static void vsir_validate_instruction(struct validation_context *ctx) @@ -6562,13 +6574,6 @@ static void vsir_validate_instruction(struct validation_context *ctx) ctx->dcl_temps_found = false; return; - case VKD3DSIH_DCL_TESSELLATOR_OUTPUT_PRIMITIVE: - if (!instruction->declaration.tessellator_output_primitive - || instruction->declaration.tessellator_output_primitive > VKD3D_SHADER_TESSELLATOR_OUTPUT_TRIANGLE_CCW) - validator_error(ctx, VKD3D_SHADER_ERROR_VSIR_INVALID_TESSELLATION, - "Tessellator output primitive %#x is invalid.", instruction->declaration.tessellator_output_primitive); - return; - case VKD3DSIH_DCL_TESSELLATOR_PARTITIONING: if (!instruction->declaration.tessellator_partitioning || instruction->declaration.tessellator_partitioning > VKD3D_SHADER_TESSELLATOR_PARTITIONING_FRACTIONAL_EVEN)