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vkd3d-shader/dxil: Implement DX intrinsic Unary.
This commit is contained in:
committed by
Alexandre Julliard
parent
cc5e703802
commit
a33a9127ca
Notes:
Alexandre Julliard
2023-12-07 22:47:27 +01:00
Approved-by: Giovanni Mascellani (@giomasce) Approved-by: Henri Verbeet (@hverbeet) Approved-by: Alexandre Julliard (@julliard) Merge-Request: https://gitlab.winehq.org/wine/vkd3d/-/merge_requests/497
@@ -296,8 +296,28 @@ enum dx_intrinsic_opcode
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{
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DX_LOAD_INPUT = 4,
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DX_STORE_OUTPUT = 5,
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DX_EXP = 21,
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DX_FRC = 22,
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DX_LOG = 23,
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DX_SQRT = 24,
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DX_RSQRT = 25,
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DX_ROUND_NE = 26,
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DX_ROUND_NI = 27,
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DX_ROUND_PI = 28,
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DX_ROUND_Z = 29,
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DX_BFREV = 30,
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DX_COUNT_BITS = 31,
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DX_FIRST_BIT_LO = 32,
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DX_FIRST_BIT_HI = 33,
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DX_FIRST_BIT_SHI = 34,
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DX_CREATE_HANDLE = 57,
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DX_CBUFFER_LOAD_LEGACY = 59,
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DX_DERIV_COARSEX = 83,
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DX_DERIV_COARSEY = 84,
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DX_DERIV_FINEX = 85,
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DX_DERIV_FINEY = 86,
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DX_LEGACY_F32TOF16 = 130,
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DX_LEGACY_F16TOF32 = 131,
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};
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enum dxil_cast_code
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@@ -1573,6 +1593,11 @@ static bool sm6_type_is_bool_i16_i32_i64(const struct sm6_type *type)
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return type->class == TYPE_CLASS_INTEGER && (type->u.width == 1 || type->u.width >= 16);
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}
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static bool sm6_type_is_i16_i32_i64(const struct sm6_type *type)
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{
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return type->class == TYPE_CLASS_INTEGER && type->u.width >= 16;
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}
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static bool sm6_type_is_bool(const struct sm6_type *type)
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{
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return type->class == TYPE_CLASS_INTEGER && type->u.width == 1;
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@@ -1588,6 +1613,16 @@ static inline bool sm6_type_is_i32(const struct sm6_type *type)
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return type->class == TYPE_CLASS_INTEGER && type->u.width == 32;
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}
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static bool sm6_type_is_float(const struct sm6_type *type)
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{
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return type->class == TYPE_CLASS_FLOAT && type->u.width == 32;
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}
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static bool sm6_type_is_f16_f32(const struct sm6_type *type)
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{
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return type->class == TYPE_CLASS_FLOAT && (type->u.width == 16 || type->u.width == 32);
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}
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static inline bool sm6_type_is_floating_point(const struct sm6_type *type)
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{
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return type->class == TYPE_CLASS_FLOAT;
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@@ -3205,6 +3240,67 @@ static void sm6_parser_emit_binop(struct sm6_parser *sm6, const struct dxil_reco
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}
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}
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static enum vkd3d_shader_opcode map_dx_unary_op(enum dx_intrinsic_opcode op)
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{
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switch (op)
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{
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case DX_EXP:
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return VKD3DSIH_EXP;
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case DX_FRC:
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return VKD3DSIH_FRC;
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case DX_LOG:
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return VKD3DSIH_LOG;
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case DX_SQRT:
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return VKD3DSIH_SQRT;
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case DX_RSQRT:
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return VKD3DSIH_RSQ;
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case DX_ROUND_NE:
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return VKD3DSIH_ROUND_NE;
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case DX_ROUND_NI:
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return VKD3DSIH_ROUND_NI;
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case DX_ROUND_PI:
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return VKD3DSIH_ROUND_PI;
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case DX_ROUND_Z:
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return VKD3DSIH_ROUND_Z;
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case DX_BFREV:
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return VKD3DSIH_BFREV;
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case DX_COUNT_BITS:
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return VKD3DSIH_COUNTBITS;
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case DX_FIRST_BIT_LO:
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return VKD3DSIH_FIRSTBIT_LO;
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case DX_FIRST_BIT_HI:
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return VKD3DSIH_FIRSTBIT_HI;
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case DX_FIRST_BIT_SHI:
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return VKD3DSIH_FIRSTBIT_SHI;
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case DX_DERIV_COARSEX:
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return VKD3DSIH_DSX_COARSE;
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case DX_DERIV_COARSEY:
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return VKD3DSIH_DSY_COARSE;
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case DX_DERIV_FINEX:
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return VKD3DSIH_DSX_FINE;
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case DX_DERIV_FINEY:
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return VKD3DSIH_DSY_FINE;
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case DX_LEGACY_F32TOF16:
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return VKD3DSIH_F32TOF16;
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case DX_LEGACY_F16TOF32:
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return VKD3DSIH_F16TOF32;
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default:
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vkd3d_unreachable();
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}
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}
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static void sm6_parser_emit_dx_unary(struct sm6_parser *sm6, struct sm6_block *code_block,
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enum dx_intrinsic_opcode op, const struct sm6_value **operands, struct vkd3d_shader_instruction *ins)
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{
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struct vkd3d_shader_src_param *src_param;
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vsir_instruction_init(ins, &sm6->p.location, map_dx_unary_op(op));
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src_param = instruction_src_params_alloc(ins, 1, sm6);
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src_param_init_from_value(src_param, operands[0]);
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instruction_dst_param_init_ssa_scalar(ins, sm6);
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}
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static void sm6_parser_emit_dx_cbuffer_load(struct sm6_parser *sm6, struct sm6_block *code_block,
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enum dx_intrinsic_opcode op, const struct sm6_value **operands, struct vkd3d_shader_instruction *ins)
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{
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@@ -3378,7 +3474,7 @@ static void sm6_parser_emit_dx_store_output(struct sm6_parser *sm6, struct sm6_b
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struct sm6_dx_opcode_info
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{
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const char ret_type;
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const char *ret_type;
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const char *operand_info;
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void (*handler)(struct sm6_parser *, struct sm6_block *, enum dx_intrinsic_opcode,
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const struct sm6_value **, struct vkd3d_shader_instruction *);
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@@ -3389,16 +3485,40 @@ struct sm6_dx_opcode_info
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b -> constant int1
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c -> constant int8/16/32
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i -> int32
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m -> int16/32/64
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f -> float
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e -> half/float
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g -> half/float/double
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H -> handle
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v -> void
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o -> overloaded
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*/
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static const struct sm6_dx_opcode_info sm6_dx_op_table[] =
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{
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[DX_CBUFFER_LOAD_LEGACY ] = {'o', "Hi", sm6_parser_emit_dx_cbuffer_load},
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[DX_CREATE_HANDLE ] = {'H', "ccib", sm6_parser_emit_dx_create_handle},
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[DX_LOAD_INPUT ] = {'o', "ii8i", sm6_parser_emit_dx_load_input},
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[DX_STORE_OUTPUT ] = {'v', "ii8o", sm6_parser_emit_dx_store_output},
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[DX_BFREV ] = {"m0", "m", sm6_parser_emit_dx_unary},
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[DX_CBUFFER_LOAD_LEGACY ] = {"o", "Hi", sm6_parser_emit_dx_cbuffer_load},
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[DX_COUNT_BITS ] = {"i", "m", sm6_parser_emit_dx_unary},
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[DX_CREATE_HANDLE ] = {"H", "ccib", sm6_parser_emit_dx_create_handle},
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[DX_DERIV_COARSEX ] = {"e0", "e", sm6_parser_emit_dx_unary},
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[DX_DERIV_COARSEY ] = {"e0", "e", sm6_parser_emit_dx_unary},
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[DX_DERIV_FINEX ] = {"e0", "e", sm6_parser_emit_dx_unary},
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[DX_DERIV_FINEY ] = {"e0", "e", sm6_parser_emit_dx_unary},
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[DX_EXP ] = {"g0", "g", sm6_parser_emit_dx_unary},
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[DX_FIRST_BIT_HI ] = {"i", "m", sm6_parser_emit_dx_unary},
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[DX_FIRST_BIT_LO ] = {"i", "m", sm6_parser_emit_dx_unary},
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[DX_FIRST_BIT_SHI ] = {"i", "m", sm6_parser_emit_dx_unary},
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[DX_FRC ] = {"g0", "g", sm6_parser_emit_dx_unary},
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[DX_LEGACY_F16TOF32 ] = {"f", "i", sm6_parser_emit_dx_unary},
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[DX_LEGACY_F32TOF16 ] = {"i", "f", sm6_parser_emit_dx_unary},
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[DX_LOAD_INPUT ] = {"o", "ii8i", sm6_parser_emit_dx_load_input},
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[DX_LOG ] = {"g0", "g", sm6_parser_emit_dx_unary},
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[DX_ROUND_NE ] = {"g0", "g", sm6_parser_emit_dx_unary},
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[DX_ROUND_NI ] = {"g0", "g", sm6_parser_emit_dx_unary},
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[DX_ROUND_PI ] = {"g0", "g", sm6_parser_emit_dx_unary},
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[DX_ROUND_Z ] = {"g0", "g", sm6_parser_emit_dx_unary},
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[DX_RSQRT ] = {"g0", "g", sm6_parser_emit_dx_unary},
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[DX_SQRT ] = {"g0", "g", sm6_parser_emit_dx_unary},
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[DX_STORE_OUTPUT ] = {"v", "ii8o", sm6_parser_emit_dx_store_output},
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};
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static bool sm6_parser_validate_operand_type(struct sm6_parser *sm6, const struct sm6_value *value, char info_type,
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@@ -3423,6 +3543,14 @@ static bool sm6_parser_validate_operand_type(struct sm6_parser *sm6, const struc
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&& type->u.width <= 32;
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case 'i':
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return sm6_type_is_i32(type);
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case 'm':
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return sm6_type_is_i16_i32_i64(type);
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case 'f':
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return sm6_type_is_float(type);
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case 'e':
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return sm6_type_is_f16_f32(type);
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case 'g':
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return sm6_type_is_floating_point(type);
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case 'H':
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return (is_return || sm6_value_is_handle(value)) && type == sm6->handle_type;
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case 'v':
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@@ -3436,6 +3564,17 @@ static bool sm6_parser_validate_operand_type(struct sm6_parser *sm6, const struc
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}
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}
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static bool operand_types_match(struct sm6_value *dst, const struct sm6_value **operands, unsigned int operand_count,
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char index_char)
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{
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unsigned int i = index_char - '0';
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assert(i < 10);
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if (i >= operand_count)
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return false;
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return dst->type == operands[i]->type;
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}
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static bool sm6_parser_validate_dx_op(struct sm6_parser *sm6, enum dx_intrinsic_opcode op, const char *name,
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const struct sm6_value **operands, unsigned int operand_count, struct sm6_value *dst)
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{
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@@ -3444,7 +3583,9 @@ static bool sm6_parser_validate_dx_op(struct sm6_parser *sm6, enum dx_intrinsic_
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info = &sm6_dx_op_table[op];
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if (!sm6_parser_validate_operand_type(sm6, dst, info->ret_type, true))
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assert(info->ret_type[0]);
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if (!sm6_parser_validate_operand_type(sm6, dst, info->ret_type[0], true)
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|| (info->ret_type[1] && !operand_types_match(dst, operands, operand_count, info->ret_type[1])))
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{
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WARN("Failed to validate return type for dx intrinsic id %u, '%s'.\n", op, name);
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/* Return type validation failure is not so critical. We only need to set
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