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vkd3d-shader/hlsl: Save hlsl_ir_loads in the vsir_program for SM1.
This commit is contained in:
parent
23e3ec84f7
commit
9aace1ac4e
Notes:
Henri Verbeet
2024-09-04 18:48:04 +02:00
Approved-by: Elizabeth Figura (@zfigura) Approved-by: Henri Verbeet (@hverbeet) Merge-Request: https://gitlab.winehq.org/wine/vkd3d/-/merge_requests/941
@ -2724,50 +2724,6 @@ static void d3dbc_write_jump(struct d3dbc_compiler *d3dbc, const struct hlsl_ir_
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}
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}
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}
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}
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static void d3dbc_write_load(struct d3dbc_compiler *d3dbc, const struct hlsl_ir_node *instr)
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{
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const struct hlsl_ir_load *load = hlsl_ir_load(instr);
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struct hlsl_ctx *ctx = d3dbc->ctx;
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const struct hlsl_reg reg = hlsl_reg_from_deref(ctx, &load->src);
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struct sm1_instruction sm1_instr =
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{
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.opcode = D3DSIO_MOV,
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.dst.type = VKD3DSPR_TEMP,
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.dst.reg = instr->reg.id,
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.dst.writemask = instr->reg.writemask,
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.has_dst = 1,
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.srcs[0].type = VKD3DSPR_TEMP,
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.srcs[0].reg = reg.id,
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.srcs[0].swizzle = hlsl_swizzle_from_writemask(reg.writemask),
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.src_count = 1,
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};
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VKD3D_ASSERT(instr->reg.allocated);
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if (load->src.var->is_uniform)
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{
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VKD3D_ASSERT(reg.allocated);
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sm1_instr.srcs[0].type = VKD3DSPR_CONST;
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}
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else if (load->src.var->is_input_semantic)
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{
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if (!hlsl_sm1_register_from_semantic(&d3dbc->program->shader_version, load->src.var->semantic.name,
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load->src.var->semantic.index, false, &sm1_instr.srcs[0].type, &sm1_instr.srcs[0].reg))
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{
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VKD3D_ASSERT(reg.allocated);
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sm1_instr.srcs[0].type = VKD3DSPR_INPUT;
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sm1_instr.srcs[0].reg = reg.id;
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}
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else
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sm1_instr.srcs[0].swizzle = hlsl_swizzle_from_writemask((1 << load->src.var->data_type->dimx) - 1);
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}
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sm1_map_src_swizzle(&sm1_instr.srcs[0], sm1_instr.dst.writemask);
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d3dbc_write_instruction(d3dbc, &sm1_instr);
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}
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static void d3dbc_write_resource_load(struct d3dbc_compiler *d3dbc, const struct hlsl_ir_node *instr)
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static void d3dbc_write_resource_load(struct d3dbc_compiler *d3dbc, const struct hlsl_ir_node *instr)
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{
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{
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const struct hlsl_ir_resource_load *load = hlsl_ir_resource_load(instr);
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const struct hlsl_ir_resource_load *load = hlsl_ir_resource_load(instr);
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@ -2949,10 +2905,6 @@ static void d3dbc_write_block(struct d3dbc_compiler *d3dbc, const struct hlsl_bl
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d3dbc_write_jump(d3dbc, instr);
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d3dbc_write_jump(d3dbc, instr);
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break;
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break;
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case HLSL_IR_LOAD:
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d3dbc_write_load(d3dbc, instr);
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break;
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case HLSL_IR_RESOURCE_LOAD:
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case HLSL_IR_RESOURCE_LOAD:
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d3dbc_write_resource_load(d3dbc, instr);
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d3dbc_write_resource_load(d3dbc, instr);
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break;
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break;
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@ -6167,6 +6167,29 @@ static void sm1_generate_vsir_sampler_dcls(struct hlsl_ctx *ctx,
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}
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}
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}
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}
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static struct vkd3d_shader_instruction *generate_vsir_add_program_instruction(
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struct hlsl_ctx *ctx, struct vsir_program *program,
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const struct vkd3d_shader_location *loc, enum vkd3d_shader_opcode opcode,
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unsigned int dst_count, unsigned int src_count)
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{
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struct vkd3d_shader_instruction_array *instructions = &program->instructions;
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struct vkd3d_shader_instruction *ins;
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if (!shader_instruction_array_reserve(instructions, instructions->count + 1))
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{
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ctx->result = VKD3D_ERROR_OUT_OF_MEMORY;
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return NULL;
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}
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ins = &instructions->elements[instructions->count];
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if (!vsir_instruction_init_with_params(program, ins, loc, opcode, dst_count, src_count))
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{
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ctx->result = VKD3D_ERROR_OUT_OF_MEMORY;
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return NULL;
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}
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++instructions->count;
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return ins;
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}
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static void sm1_generate_vsir_instr_constant(struct hlsl_ctx *ctx,
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static void sm1_generate_vsir_instr_constant(struct hlsl_ctx *ctx,
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struct vsir_program *program, struct hlsl_ir_constant *constant)
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struct vsir_program *program, struct hlsl_ir_constant *constant)
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{
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{
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@ -6180,18 +6203,8 @@ static void sm1_generate_vsir_instr_constant(struct hlsl_ctx *ctx,
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VKD3D_ASSERT(instr->reg.allocated);
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VKD3D_ASSERT(instr->reg.allocated);
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VKD3D_ASSERT(constant->reg.allocated);
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VKD3D_ASSERT(constant->reg.allocated);
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if (!shader_instruction_array_reserve(instructions, instructions->count + 1))
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if (!(ins = generate_vsir_add_program_instruction(ctx, program, &instr->loc, VKD3DSIH_MOV, 1, 1)))
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{
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ctx->result = VKD3D_ERROR_OUT_OF_MEMORY;
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return;
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return;
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}
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ins = &instructions->elements[instructions->count];
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if (!vsir_instruction_init_with_params(program, ins, &instr->loc, VKD3DSIH_MOV, 1, 1))
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{
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ctx->result = VKD3D_ERROR_OUT_OF_MEMORY;
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return;
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}
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++instructions->count;
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src_param = &ins->src[0];
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src_param = &ins->src[0];
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vsir_register_init(&src_param->reg, VKD3DSPR_CONST, VKD3D_DATA_FLOAT, 1);
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vsir_register_init(&src_param->reg, VKD3DSPR_CONST, VKD3D_DATA_FLOAT, 1);
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@ -6214,6 +6227,82 @@ static void sm1_generate_vsir_instr_constant(struct hlsl_ctx *ctx,
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hlsl_replace_node(instr, vsir_instr);
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hlsl_replace_node(instr, vsir_instr);
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}
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}
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static void sm1_generate_vsir_init_src_param_from_deref(struct hlsl_ctx *ctx,
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struct vkd3d_shader_src_param *src_param, struct hlsl_deref *deref,
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unsigned int dst_writemask, const struct vkd3d_shader_location *loc)
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{
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enum vkd3d_shader_register_type type = VKD3DSPR_TEMP;
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struct vkd3d_shader_version version;
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uint32_t register_index;
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unsigned int writemask;
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struct hlsl_reg reg;
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reg = hlsl_reg_from_deref(ctx, deref);
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register_index = reg.id;
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writemask = reg.writemask;
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if (deref->var->is_uniform)
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{
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VKD3D_ASSERT(reg.allocated);
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type = VKD3DSPR_CONST;
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}
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else if (deref->var->is_input_semantic)
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{
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version.major = ctx->profile->major_version;
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version.minor = ctx->profile->minor_version;
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version.type = ctx->profile->type;
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if (!hlsl_sm1_register_from_semantic(&version, deref->var->semantic.name,
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deref->var->semantic.index, false, &type, ®ister_index))
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{
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VKD3D_ASSERT(reg.allocated);
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type = VKD3DSPR_INPUT;
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register_index = reg.id;
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}
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else
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writemask = (1 << deref->var->data_type->dimx) - 1;
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}
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vsir_register_init(&src_param->reg, type, VKD3D_DATA_FLOAT, 1);
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src_param->reg.idx[0].offset = register_index;
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src_param->swizzle = sm1_generate_vsir_get_src_swizzle(writemask, dst_writemask);
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if (deref->rel_offset.node)
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hlsl_fixme(ctx, loc, "Translate relative addressing on src register for vsir.");
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}
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static void sm1_generate_vsir_instr_load(struct hlsl_ctx *ctx, struct vsir_program *program,
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struct hlsl_ir_load *load)
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{
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struct vkd3d_shader_instruction_array *instructions = &program->instructions;
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struct hlsl_ir_node *instr = &load->node;
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struct vkd3d_shader_dst_param *dst_param;
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struct vkd3d_shader_instruction *ins;
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struct hlsl_ir_node *vsir_instr;
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VKD3D_ASSERT(instr->reg.allocated);
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if (!(ins = generate_vsir_add_program_instruction(ctx, program, &instr->loc, VKD3DSIH_MOV, 1, 1)))
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return;
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dst_param = &ins->dst[0];
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vsir_register_init(&dst_param->reg, VKD3DSPR_TEMP, VKD3D_DATA_FLOAT, 1);
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dst_param->reg.idx[0].offset = instr->reg.id;
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dst_param->write_mask = instr->reg.writemask;
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sm1_generate_vsir_init_src_param_from_deref(ctx, &ins->src[0], &load->src, dst_param->write_mask,
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&ins->location);
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if (!(vsir_instr = hlsl_new_vsir_instruction_ref(ctx, instructions->count - 1, instr->data_type,
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&instr->reg, &instr->loc)))
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{
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ctx->result = VKD3D_ERROR_OUT_OF_MEMORY;
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return;
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}
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list_add_before(&instr->entry, &vsir_instr->entry);
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hlsl_replace_node(instr, vsir_instr);
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}
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static bool sm1_generate_vsir_instr(struct hlsl_ctx *ctx, struct hlsl_ir_node *instr, void *context)
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static bool sm1_generate_vsir_instr(struct hlsl_ctx *ctx, struct hlsl_ir_node *instr, void *context)
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{
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{
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struct vsir_program *program = context;
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struct vsir_program *program = context;
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@ -6224,6 +6313,10 @@ static bool sm1_generate_vsir_instr(struct hlsl_ctx *ctx, struct hlsl_ir_node *i
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sm1_generate_vsir_instr_constant(ctx, program, hlsl_ir_constant(instr));
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sm1_generate_vsir_instr_constant(ctx, program, hlsl_ir_constant(instr));
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return true;
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return true;
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case HLSL_IR_LOAD:
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sm1_generate_vsir_instr_load(ctx, program, hlsl_ir_load(instr));
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return true;
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default:
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default:
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break;
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break;
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}
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}
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