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vkd3d-shader/tpf: Don't pass 0x4 as mask for vec4 constant src registers.
Co-authored-by: Evan Tang <etang@codeweavers.com> Evan Tang reported that new fixmes appeared on the shader_runner when running some of his tests after f50d0ae2cbc5ee2a26fedd7b8aac2def62decd6c. vkd3d:652593:fixme:shader_sm4_read_src_param Unhandled mask 0x4. The change to blame seems to be this added line in sm4_src_from_constant_value(). + src->swizzle = VKD3D_SHADER_NO_SWIZZLE; On tpf binaries the last 12 bits of each src register in an instruction specify the swizzle, and there are 5 possible combinations: Dimension NONE -------- 00 Dimension SCALAR -------- 01 Dimension VEC4, with a 4 bit writemask: ---- xxxx 00 01 Dimension VEC4, with an 8 bit swizzle: xx xx xx xx 01 01 Dimension VEC4, with a 2bit scalar dimension number: ------ xx 10 01 So far, we have only seen src registers use 4 bit writemasks in a single case: for vec4 constants, and it is always zero. So we expect this: ---- 0000 00 01 Now, I probably wanted to initialize src->swizzle to zero when writing constants, but VKD3D_SHADER_NO_SWIZZLE is not zero, it is actually the default swizzle: 11 10 01 00 And the last 4 bits (0x4) get written in the mask part, which causes the reader to complain.
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Alexandre Julliard
2023-11-06 23:18:22 +01:00
Approved-by: Zebediah Figura (@zfigura) Approved-by: Giovanni Mascellani (@giomasce) Approved-by: Henri Verbeet (@hverbeet) Approved-by: Alexandre Julliard (@julliard) Merge-Request: https://gitlab.winehq.org/wine/vkd3d/-/merge_requests/438
@ -3790,7 +3790,7 @@ static void sm4_dst_from_node(struct vkd3d_shader_dst_param *dst, const struct h
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static void sm4_src_from_constant_value(struct vkd3d_shader_src_param *src,
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const struct hlsl_constant_value *value, unsigned int width, unsigned int map_writemask)
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{
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src->swizzle = VKD3D_SHADER_NO_SWIZZLE;
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src->swizzle = 0;
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src->reg.type = VKD3DSPR_IMMCONST;
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if (width == 1)
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{
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