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vkd3d-shader/hlsl: Save CAST hlsl_ir_exprs in the vsir_program for SM1.

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This commit is contained in:
Francisco Casas 2024-05-31 22:33:47 -04:00 committed by Henri Verbeet
parent 8933620109
commit 961c4f8b23
Notes: Henri Verbeet 2024-09-12 18:57:08 +02:00 
Approved-by: Elizabeth Figura (@zfigura)
Approved-by: Henri Verbeet (@hverbeet)
Merge-Request: https://gitlab.winehq.org/wine/vkd3d/-/merge_requests/1062
2 changed files with 95 additions and 133 deletions
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133
libs/vkd3d-shader/d3dbc.c
View File

@ -1962,112 +1962,6 @@ static void d3dbc_write_instruction(struct d3dbc_compiler *d3dbc, const struct s
write_sm1_src_register(buffer, &instr->srcs[i]);
};
static void sm1_map_src_swizzle(struct sm1_src_register *src, unsigned int map_writemask)
{
src->swizzle = hlsl_map_swizzle(src->swizzle, map_writemask);
}
static void d3dbc_write_unary_op(struct d3dbc_compiler *d3dbc, enum vkd3d_sm1_opcode opcode,
const struct hlsl_reg *dst, const struct hlsl_reg *src,
enum vkd3d_shader_src_modifier src_mod, enum vkd3d_shader_dst_modifier dst_mod)
{
struct sm1_instruction instr =
{
.opcode = opcode,
.dst.type = VKD3DSPR_TEMP,
.dst.mod = dst_mod,
.dst.writemask = dst->writemask,
.dst.reg = dst->id,
.has_dst = 1,
.srcs[0].type = VKD3DSPR_TEMP,
.srcs[0].swizzle = hlsl_swizzle_from_writemask(src->writemask),
.srcs[0].reg = src->id,
.srcs[0].mod = src_mod,
.src_count = 1,
};
sm1_map_src_swizzle(&instr.srcs[0], instr.dst.writemask);
d3dbc_write_instruction(d3dbc, &instr);
}
static void d3dbc_write_cast(struct d3dbc_compiler *d3dbc, const struct hlsl_ir_node *instr)
{
struct hlsl_ir_expr *expr = hlsl_ir_expr(instr);
const struct hlsl_ir_node *arg1 = expr->operands[0].node;
const struct hlsl_type *dst_type = expr->node.data_type;
const struct hlsl_type *src_type = arg1->data_type;
struct hlsl_ctx *ctx = d3dbc->ctx;
/* Narrowing casts were already lowered. */
VKD3D_ASSERT(src_type->dimx == dst_type->dimx);
switch (dst_type->e.numeric.type)
{
case HLSL_TYPE_HALF:
case HLSL_TYPE_FLOAT:
switch (src_type->e.numeric.type)
{
case HLSL_TYPE_INT:
case HLSL_TYPE_UINT:
case HLSL_TYPE_BOOL:
/* Integrals are internally represented as floats, so no change is necessary.*/
case HLSL_TYPE_HALF:
case HLSL_TYPE_FLOAT:
d3dbc_write_unary_op(d3dbc, VKD3D_SM1_OP_MOV, &instr->reg, &arg1->reg, 0, 0);
break;
case HLSL_TYPE_DOUBLE:
hlsl_fixme(ctx, &instr->loc, "SM1 cast from double to float.");
break;
default:
vkd3d_unreachable();
}
break;
case HLSL_TYPE_INT:
case HLSL_TYPE_UINT:
switch(src_type->e.numeric.type)
{
case HLSL_TYPE_HALF:
case HLSL_TYPE_FLOAT:
/* A compilation pass turns these into FLOOR+REINTERPRET, so we should not
* reach this case unless we are missing something. */
hlsl_fixme(ctx, &instr->loc, "Unlowered SM1 cast from float to integer.");
break;
case HLSL_TYPE_INT:
case HLSL_TYPE_UINT:
d3dbc_write_unary_op(d3dbc, VKD3D_SM1_OP_MOV, &instr->reg, &arg1->reg, 0, 0);
break;
case HLSL_TYPE_BOOL:
hlsl_fixme(ctx, &instr->loc, "SM1 cast from bool to integer.");
break;
case HLSL_TYPE_DOUBLE:
hlsl_fixme(ctx, &instr->loc, "SM1 cast from double to integer.");
break;
default:
vkd3d_unreachable();
}
break;
case HLSL_TYPE_DOUBLE:
hlsl_fixme(ctx, &instr->loc, "SM1 cast to double.");
break;
case HLSL_TYPE_BOOL:
/* Casts to bool should have already been lowered. */
default:
hlsl_fixme(ctx, &expr->node.loc, "SM1 cast from %s to %s.",
debug_hlsl_type(ctx, src_type), debug_hlsl_type(ctx, dst_type));
break;
}
}
static const struct vkd3d_sm1_opcode_info *shader_sm1_get_opcode_info_from_vsir(
struct d3dbc_compiler *d3dbc, enum vkd3d_shader_opcode vkd3d_opcode)
{
@ -2402,29 +2296,6 @@ static void d3dbc_write_semantic_dcls(struct d3dbc_compiler *d3dbc)
}
}
static void d3dbc_write_expr(struct d3dbc_compiler *d3dbc, const struct hlsl_ir_node *instr)
{
struct hlsl_ir_expr *expr = hlsl_ir_expr(instr);
struct hlsl_ctx *ctx = d3dbc->ctx;
VKD3D_ASSERT(instr->reg.allocated);
if (expr->op == HLSL_OP1_CAST)
{
d3dbc_write_cast(d3dbc, instr);
return;
}
if (instr->data_type->e.numeric.type != HLSL_TYPE_FLOAT)
{
/* These need to be lowered. */
hlsl_fixme(ctx, &instr->loc, "SM1 non-float expression.");
return;
}
hlsl_fixme(ctx, &instr->loc, "SM1 \"%s\" expression.", debug_hlsl_expr_op(expr->op));
}
static void d3dbc_write_block(struct d3dbc_compiler *d3dbc, const struct hlsl_block *block);
static void d3dbc_write_if(struct d3dbc_compiler *d3dbc, const struct hlsl_ir_node *instr)
@ -2590,10 +2461,6 @@ static void d3dbc_write_block(struct d3dbc_compiler *d3dbc, const struct hlsl_bl
case HLSL_IR_CALL:
vkd3d_unreachable();
case HLSL_IR_EXPR:
d3dbc_write_expr(d3dbc, instr);
break;
case HLSL_IR_IF:
if (hlsl_version_ge(ctx, 2, 1))
d3dbc_write_if(d3dbc, instr);

95
libs/vkd3d-shader/hlsl_codegen.c
View File

@ -6684,15 +6684,110 @@ static void sm1_generate_vsir_instr_expr_sincos(struct hlsl_ctx *ctx, struct vsi
hlsl_replace_node(instr, vsir_instr);
}
static bool sm1_generate_vsir_instr_expr_cast(struct hlsl_ctx *ctx,
struct vsir_program *program, struct hlsl_ir_expr *expr)
{
const struct hlsl_type *src_type, *dst_type;
const struct hlsl_ir_node *arg1, *instr;
arg1 = expr->operands[0].node;
src_type = arg1->data_type;
instr = &expr->node;
dst_type = instr->data_type;
/* Narrowing casts were already lowered. */
VKD3D_ASSERT(src_type->dimx == dst_type->dimx);
switch (dst_type->e.numeric.type)
{
case HLSL_TYPE_HALF:
case HLSL_TYPE_FLOAT:
switch (src_type->e.numeric.type)
{
case HLSL_TYPE_INT:
case HLSL_TYPE_UINT:
case HLSL_TYPE_BOOL:
/* Integrals are internally represented as floats, so no change is necessary.*/
case HLSL_TYPE_HALF:
case HLSL_TYPE_FLOAT:
sm1_generate_vsir_instr_expr_single_instr_op(ctx, program, expr, VKD3DSIH_MOV, 0, 0, true);
return true;
case HLSL_TYPE_DOUBLE:
hlsl_fixme(ctx, &instr->loc, "SM1 cast from double to float.");
break;
default:
vkd3d_unreachable();
}
break;
case HLSL_TYPE_INT:
case HLSL_TYPE_UINT:
switch(src_type->e.numeric.type)
{
case HLSL_TYPE_HALF:
case HLSL_TYPE_FLOAT:
/* A compilation pass turns these into FLOOR+REINTERPRET, so we should not
* reach this case unless we are missing something. */
hlsl_fixme(ctx, &instr->loc, "Unlowered SM1 cast from float to integer.");
break;
case HLSL_TYPE_INT:
case HLSL_TYPE_UINT:
sm1_generate_vsir_instr_expr_single_instr_op(ctx, program, expr, VKD3DSIH_MOV, 0, 0, true);
return true;
case HLSL_TYPE_BOOL:
hlsl_fixme(ctx, &instr->loc, "SM1 cast from bool to integer.");
break;
case HLSL_TYPE_DOUBLE:
hlsl_fixme(ctx, &instr->loc, "SM1 cast from double to integer.");
break;
default:
vkd3d_unreachable();
}
break;
case HLSL_TYPE_DOUBLE:
hlsl_fixme(ctx, &instr->loc, "SM1 cast to double.");
break;
case HLSL_TYPE_BOOL:
/* Casts to bool should have already been lowered. */
default:
hlsl_fixme(ctx, &expr->node.loc, "SM1 cast from %s to %s.",
debug_hlsl_type(ctx, src_type), debug_hlsl_type(ctx, dst_type));
break;
}
return false;
}
static bool sm1_generate_vsir_instr_expr(struct hlsl_ctx *ctx, struct vsir_program *program,
struct hlsl_ir_expr *expr)
{
struct hlsl_ir_node *instr = &expr->node;
if (expr->op != HLSL_OP1_REINTERPRET && expr->op != HLSL_OP1_CAST
&& instr->data_type->e.numeric.type != HLSL_TYPE_FLOAT)
{
/* These need to be lowered. */
hlsl_fixme(ctx, &instr->loc, "SM1 non-float expression.");
return false;
}
switch (expr->op)
{
case HLSL_OP1_ABS:
sm1_generate_vsir_instr_expr_single_instr_op(ctx, program, expr, VKD3DSIH_ABS, 0, 0, true);
break;
case HLSL_OP1_CAST:
return sm1_generate_vsir_instr_expr_cast(ctx, program, expr);
case HLSL_OP1_COS_REDUCED:
VKD3D_ASSERT(expr->node.reg.writemask == VKD3DSP_WRITEMASK_0);
sm1_generate_vsir_instr_expr_sincos(ctx, program, expr);