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vkd3d-shader/hlsl: Save CAST hlsl_ir_exprs in the vsir_program for SM1.
This commit is contained in:
Francisco Casas
Henri Verbeet
parent
8933620109
commit
961c4f8b23
Notes:
Henri Verbeet
2024-09-12 18:57:08 +02:00
Approved-by: Elizabeth Figura (@zfigura) Approved-by: Henri Verbeet (@hverbeet) Merge-Request: https://gitlab.winehq.org/wine/vkd3d/-/merge_requests/1062
@ -1962,112 +1962,6 @@ static void d3dbc_write_instruction(struct d3dbc_compiler *d3dbc, const struct s
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write_sm1_src_register(buffer, &instr->srcs[i]);
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write_sm1_src_register(buffer, &instr->srcs[i]);
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};
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};
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static void sm1_map_src_swizzle(struct sm1_src_register *src, unsigned int map_writemask)
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{
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src->swizzle = hlsl_map_swizzle(src->swizzle, map_writemask);
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}
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static void d3dbc_write_unary_op(struct d3dbc_compiler *d3dbc, enum vkd3d_sm1_opcode opcode,
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const struct hlsl_reg *dst, const struct hlsl_reg *src,
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enum vkd3d_shader_src_modifier src_mod, enum vkd3d_shader_dst_modifier dst_mod)
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{
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struct sm1_instruction instr =
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{
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.opcode = opcode,
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.dst.type = VKD3DSPR_TEMP,
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.dst.mod = dst_mod,
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.dst.writemask = dst->writemask,
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.dst.reg = dst->id,
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.has_dst = 1,
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.srcs[0].type = VKD3DSPR_TEMP,
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.srcs[0].swizzle = hlsl_swizzle_from_writemask(src->writemask),
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.srcs[0].reg = src->id,
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.srcs[0].mod = src_mod,
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.src_count = 1,
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};
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sm1_map_src_swizzle(&instr.srcs[0], instr.dst.writemask);
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d3dbc_write_instruction(d3dbc, &instr);
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}
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static void d3dbc_write_cast(struct d3dbc_compiler *d3dbc, const struct hlsl_ir_node *instr)
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{
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struct hlsl_ir_expr *expr = hlsl_ir_expr(instr);
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const struct hlsl_ir_node *arg1 = expr->operands[0].node;
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const struct hlsl_type *dst_type = expr->node.data_type;
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const struct hlsl_type *src_type = arg1->data_type;
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struct hlsl_ctx *ctx = d3dbc->ctx;
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/* Narrowing casts were already lowered. */
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VKD3D_ASSERT(src_type->dimx == dst_type->dimx);
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switch (dst_type->e.numeric.type)
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{
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case HLSL_TYPE_HALF:
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case HLSL_TYPE_FLOAT:
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switch (src_type->e.numeric.type)
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{
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case HLSL_TYPE_INT:
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case HLSL_TYPE_UINT:
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case HLSL_TYPE_BOOL:
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/* Integrals are internally represented as floats, so no change is necessary.*/
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case HLSL_TYPE_HALF:
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case HLSL_TYPE_FLOAT:
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d3dbc_write_unary_op(d3dbc, VKD3D_SM1_OP_MOV, &instr->reg, &arg1->reg, 0, 0);
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break;
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case HLSL_TYPE_DOUBLE:
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hlsl_fixme(ctx, &instr->loc, "SM1 cast from double to float.");
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break;
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default:
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vkd3d_unreachable();
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}
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break;
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case HLSL_TYPE_INT:
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case HLSL_TYPE_UINT:
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switch(src_type->e.numeric.type)
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{
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case HLSL_TYPE_HALF:
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case HLSL_TYPE_FLOAT:
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/* A compilation pass turns these into FLOOR+REINTERPRET, so we should not
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* reach this case unless we are missing something. */
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hlsl_fixme(ctx, &instr->loc, "Unlowered SM1 cast from float to integer.");
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break;
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case HLSL_TYPE_INT:
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case HLSL_TYPE_UINT:
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d3dbc_write_unary_op(d3dbc, VKD3D_SM1_OP_MOV, &instr->reg, &arg1->reg, 0, 0);
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break;
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case HLSL_TYPE_BOOL:
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hlsl_fixme(ctx, &instr->loc, "SM1 cast from bool to integer.");
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break;
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case HLSL_TYPE_DOUBLE:
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hlsl_fixme(ctx, &instr->loc, "SM1 cast from double to integer.");
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break;
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default:
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vkd3d_unreachable();
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}
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break;
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case HLSL_TYPE_DOUBLE:
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hlsl_fixme(ctx, &instr->loc, "SM1 cast to double.");
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break;
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case HLSL_TYPE_BOOL:
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/* Casts to bool should have already been lowered. */
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default:
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hlsl_fixme(ctx, &expr->node.loc, "SM1 cast from %s to %s.",
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debug_hlsl_type(ctx, src_type), debug_hlsl_type(ctx, dst_type));
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break;
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}
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}
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static const struct vkd3d_sm1_opcode_info *shader_sm1_get_opcode_info_from_vsir(
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static const struct vkd3d_sm1_opcode_info *shader_sm1_get_opcode_info_from_vsir(
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struct d3dbc_compiler *d3dbc, enum vkd3d_shader_opcode vkd3d_opcode)
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struct d3dbc_compiler *d3dbc, enum vkd3d_shader_opcode vkd3d_opcode)
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{
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{
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@ -2402,29 +2296,6 @@ static void d3dbc_write_semantic_dcls(struct d3dbc_compiler *d3dbc)
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}
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}
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}
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}
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static void d3dbc_write_expr(struct d3dbc_compiler *d3dbc, const struct hlsl_ir_node *instr)
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{
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struct hlsl_ir_expr *expr = hlsl_ir_expr(instr);
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struct hlsl_ctx *ctx = d3dbc->ctx;
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VKD3D_ASSERT(instr->reg.allocated);
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if (expr->op == HLSL_OP1_CAST)
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{
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d3dbc_write_cast(d3dbc, instr);
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return;
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}
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if (instr->data_type->e.numeric.type != HLSL_TYPE_FLOAT)
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{
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/* These need to be lowered. */
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hlsl_fixme(ctx, &instr->loc, "SM1 non-float expression.");
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return;
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}
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hlsl_fixme(ctx, &instr->loc, "SM1 \"%s\" expression.", debug_hlsl_expr_op(expr->op));
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}
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static void d3dbc_write_block(struct d3dbc_compiler *d3dbc, const struct hlsl_block *block);
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static void d3dbc_write_block(struct d3dbc_compiler *d3dbc, const struct hlsl_block *block);
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static void d3dbc_write_if(struct d3dbc_compiler *d3dbc, const struct hlsl_ir_node *instr)
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static void d3dbc_write_if(struct d3dbc_compiler *d3dbc, const struct hlsl_ir_node *instr)
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@ -2590,10 +2461,6 @@ static void d3dbc_write_block(struct d3dbc_compiler *d3dbc, const struct hlsl_bl
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case HLSL_IR_CALL:
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case HLSL_IR_CALL:
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vkd3d_unreachable();
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vkd3d_unreachable();
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case HLSL_IR_EXPR:
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d3dbc_write_expr(d3dbc, instr);
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break;
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case HLSL_IR_IF:
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case HLSL_IR_IF:
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if (hlsl_version_ge(ctx, 2, 1))
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if (hlsl_version_ge(ctx, 2, 1))
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d3dbc_write_if(d3dbc, instr);
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d3dbc_write_if(d3dbc, instr);
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@ -6684,15 +6684,110 @@ static void sm1_generate_vsir_instr_expr_sincos(struct hlsl_ctx *ctx, struct vsi
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hlsl_replace_node(instr, vsir_instr);
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hlsl_replace_node(instr, vsir_instr);
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}
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}
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static bool sm1_generate_vsir_instr_expr_cast(struct hlsl_ctx *ctx,
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struct vsir_program *program, struct hlsl_ir_expr *expr)
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{
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const struct hlsl_type *src_type, *dst_type;
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const struct hlsl_ir_node *arg1, *instr;
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arg1 = expr->operands[0].node;
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src_type = arg1->data_type;
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instr = &expr->node;
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dst_type = instr->data_type;
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/* Narrowing casts were already lowered. */
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VKD3D_ASSERT(src_type->dimx == dst_type->dimx);
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switch (dst_type->e.numeric.type)
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{
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case HLSL_TYPE_HALF:
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case HLSL_TYPE_FLOAT:
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switch (src_type->e.numeric.type)
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{
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case HLSL_TYPE_INT:
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case HLSL_TYPE_UINT:
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case HLSL_TYPE_BOOL:
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/* Integrals are internally represented as floats, so no change is necessary.*/
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case HLSL_TYPE_HALF:
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case HLSL_TYPE_FLOAT:
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sm1_generate_vsir_instr_expr_single_instr_op(ctx, program, expr, VKD3DSIH_MOV, 0, 0, true);
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return true;
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case HLSL_TYPE_DOUBLE:
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hlsl_fixme(ctx, &instr->loc, "SM1 cast from double to float.");
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break;
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default:
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vkd3d_unreachable();
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}
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break;
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case HLSL_TYPE_INT:
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case HLSL_TYPE_UINT:
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switch(src_type->e.numeric.type)
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{
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case HLSL_TYPE_HALF:
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case HLSL_TYPE_FLOAT:
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/* A compilation pass turns these into FLOOR+REINTERPRET, so we should not
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* reach this case unless we are missing something. */
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hlsl_fixme(ctx, &instr->loc, "Unlowered SM1 cast from float to integer.");
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break;
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case HLSL_TYPE_INT:
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case HLSL_TYPE_UINT:
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sm1_generate_vsir_instr_expr_single_instr_op(ctx, program, expr, VKD3DSIH_MOV, 0, 0, true);
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return true;
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case HLSL_TYPE_BOOL:
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hlsl_fixme(ctx, &instr->loc, "SM1 cast from bool to integer.");
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break;
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case HLSL_TYPE_DOUBLE:
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hlsl_fixme(ctx, &instr->loc, "SM1 cast from double to integer.");
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break;
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default:
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vkd3d_unreachable();
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}
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break;
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case HLSL_TYPE_DOUBLE:
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hlsl_fixme(ctx, &instr->loc, "SM1 cast to double.");
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break;
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case HLSL_TYPE_BOOL:
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/* Casts to bool should have already been lowered. */
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default:
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hlsl_fixme(ctx, &expr->node.loc, "SM1 cast from %s to %s.",
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debug_hlsl_type(ctx, src_type), debug_hlsl_type(ctx, dst_type));
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break;
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}
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return false;
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}
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static bool sm1_generate_vsir_instr_expr(struct hlsl_ctx *ctx, struct vsir_program *program,
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static bool sm1_generate_vsir_instr_expr(struct hlsl_ctx *ctx, struct vsir_program *program,
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struct hlsl_ir_expr *expr)
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struct hlsl_ir_expr *expr)
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{
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{
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struct hlsl_ir_node *instr = &expr->node;
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if (expr->op != HLSL_OP1_REINTERPRET && expr->op != HLSL_OP1_CAST
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&& instr->data_type->e.numeric.type != HLSL_TYPE_FLOAT)
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{
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/* These need to be lowered. */
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hlsl_fixme(ctx, &instr->loc, "SM1 non-float expression.");
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return false;
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}
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switch (expr->op)
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switch (expr->op)
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{
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{
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case HLSL_OP1_ABS:
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case HLSL_OP1_ABS:
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sm1_generate_vsir_instr_expr_single_instr_op(ctx, program, expr, VKD3DSIH_ABS, 0, 0, true);
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sm1_generate_vsir_instr_expr_single_instr_op(ctx, program, expr, VKD3DSIH_ABS, 0, 0, true);
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break;
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break;
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case HLSL_OP1_CAST:
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return sm1_generate_vsir_instr_expr_cast(ctx, program, expr);
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case HLSL_OP1_COS_REDUCED:
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case HLSL_OP1_COS_REDUCED:
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VKD3D_ASSERT(expr->node.reg.writemask == VKD3DSP_WRITEMASK_0);
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VKD3D_ASSERT(expr->node.reg.writemask == VKD3DSP_WRITEMASK_0);
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sm1_generate_vsir_instr_expr_sincos(ctx, program, expr);
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sm1_generate_vsir_instr_expr_sincos(ctx, program, expr);
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