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vkd3d-shader/dxil: Implement DX intrinsic QuadOp.
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parent
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commit
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Notes:
Henri Verbeet
2024-06-11 17:09:28 +02:00
Approved-by: Giovanni Mascellani (@giomasce) Approved-by: Henri Verbeet (@hverbeet) Merge-Request: https://gitlab.winehq.org/wine/vkd3d/-/merge_requests/858
@ -254,6 +254,9 @@ static const char * const shader_opcode_names[] =
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[VKD3DSIH_PHASE ] = "phase",
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[VKD3DSIH_PHASE ] = "phase",
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[VKD3DSIH_PHI ] = "phi",
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[VKD3DSIH_PHI ] = "phi",
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[VKD3DSIH_POW ] = "pow",
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[VKD3DSIH_POW ] = "pow",
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[VKD3DSIH_QUAD_READ_ACROSS_D ] = "quad_read_across_d",
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[VKD3DSIH_QUAD_READ_ACROSS_X ] = "quad_read_across_x",
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[VKD3DSIH_QUAD_READ_ACROSS_Y ] = "quad_read_across_y",
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[VKD3DSIH_RCP ] = "rcp",
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[VKD3DSIH_RCP ] = "rcp",
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[VKD3DSIH_REP ] = "rep",
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[VKD3DSIH_REP ] = "rep",
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[VKD3DSIH_RESINFO ] = "resinfo",
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[VKD3DSIH_RESINFO ] = "resinfo",
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@ -458,6 +458,7 @@ enum dx_intrinsic_opcode
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DX_WAVE_ACTIVE_OP = 119,
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DX_WAVE_ACTIVE_OP = 119,
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DX_WAVE_ACTIVE_BIT = 120,
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DX_WAVE_ACTIVE_BIT = 120,
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DX_WAVE_PREFIX_OP = 121,
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DX_WAVE_PREFIX_OP = 121,
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DX_QUAD_OP = 123,
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DX_LEGACY_F32TOF16 = 130,
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DX_LEGACY_F32TOF16 = 130,
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DX_LEGACY_F16TOF32 = 131,
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DX_LEGACY_F16TOF32 = 131,
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DX_WAVE_ALL_BIT_COUNT = 135,
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DX_WAVE_ALL_BIT_COUNT = 135,
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@ -576,6 +577,13 @@ enum dxil_wave_op_kind
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WAVE_OP_MAX = 3,
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WAVE_OP_MAX = 3,
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};
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};
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enum dxil_quad_op_kind
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{
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QUAD_READ_ACROSS_X = 0,
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QUAD_READ_ACROSS_Y = 1,
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QUAD_READ_ACROSS_D = 2,
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};
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struct sm6_pointer_info
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struct sm6_pointer_info
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{
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{
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const struct sm6_type *type;
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const struct sm6_type *type;
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@ -5370,6 +5378,47 @@ static void sm6_parser_emit_dx_primitive_id(struct sm6_parser *sm6, enum dx_intr
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sm6_parser_emit_dx_input_register_mov(sm6, state->ins, VKD3DSPR_PRIMID, VKD3D_DATA_UINT);
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sm6_parser_emit_dx_input_register_mov(sm6, state->ins, VKD3DSPR_PRIMID, VKD3D_DATA_UINT);
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}
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}
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static enum vkd3d_shader_opcode dx_map_quad_op(enum dxil_quad_op_kind op)
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{
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switch (op)
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{
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case QUAD_READ_ACROSS_X:
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return VKD3DSIH_QUAD_READ_ACROSS_X;
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case QUAD_READ_ACROSS_Y:
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return VKD3DSIH_QUAD_READ_ACROSS_Y;
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case QUAD_READ_ACROSS_D:
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return VKD3DSIH_QUAD_READ_ACROSS_D;
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default:
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return VKD3DSIH_INVALID;
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}
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}
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static void sm6_parser_emit_dx_quad_op(struct sm6_parser *sm6, enum dx_intrinsic_opcode op,
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const struct sm6_value **operands, struct function_emission_state *state)
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{
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struct vkd3d_shader_instruction *ins = state->ins;
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struct vkd3d_shader_src_param *src_param;
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enum vkd3d_shader_opcode opcode;
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enum dxil_quad_op_kind quad_op;
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quad_op = sm6_value_get_constant_uint(operands[1]);
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if ((opcode = dx_map_quad_op(quad_op)) == VKD3DSIH_INVALID)
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{
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FIXME("Unhandled quad op kind %u.\n", quad_op);
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vkd3d_shader_parser_error(&sm6->p, VKD3D_SHADER_ERROR_DXIL_UNHANDLED_INTRINSIC,
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"Quad op kind %u is unhandled.", quad_op);
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return;
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}
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vsir_instruction_init(ins, &sm6->p.location, opcode);
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if (!(src_param = instruction_src_params_alloc(ins, 1, sm6)))
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return;
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src_param_init_from_value(src_param, operands[0]);
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instruction_dst_param_init_ssa_scalar(ins, sm6);
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}
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static void sm6_parser_emit_dx_raw_buffer_load(struct sm6_parser *sm6, enum dx_intrinsic_opcode op,
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static void sm6_parser_emit_dx_raw_buffer_load(struct sm6_parser *sm6, enum dx_intrinsic_opcode op,
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const struct sm6_value **operands, struct function_emission_state *state)
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const struct sm6_value **operands, struct function_emission_state *state)
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{
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{
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@ -6229,6 +6278,7 @@ static const struct sm6_dx_opcode_info sm6_dx_op_table[] =
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[DX_MAKE_DOUBLE ] = {"d", "ii", sm6_parser_emit_dx_make_double},
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[DX_MAKE_DOUBLE ] = {"d", "ii", sm6_parser_emit_dx_make_double},
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[DX_OUTPUT_CONTROL_POINT_ID ] = {"i", "", sm6_parser_emit_dx_output_control_point_id},
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[DX_OUTPUT_CONTROL_POINT_ID ] = {"i", "", sm6_parser_emit_dx_output_control_point_id},
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[DX_PRIMITIVE_ID ] = {"i", "", sm6_parser_emit_dx_primitive_id},
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[DX_PRIMITIVE_ID ] = {"i", "", sm6_parser_emit_dx_primitive_id},
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[DX_QUAD_OP ] = {"n", "Rc", sm6_parser_emit_dx_quad_op},
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[DX_RAW_BUFFER_LOAD ] = {"o", "Hii8i", sm6_parser_emit_dx_raw_buffer_load},
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[DX_RAW_BUFFER_LOAD ] = {"o", "Hii8i", sm6_parser_emit_dx_raw_buffer_load},
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[DX_RAW_BUFFER_STORE ] = {"v", "Hiioooocc", sm6_parser_emit_dx_raw_buffer_store},
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[DX_RAW_BUFFER_STORE ] = {"v", "Hiioooocc", sm6_parser_emit_dx_raw_buffer_store},
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[DX_ROUND_NE ] = {"g", "R", sm6_parser_emit_dx_unary},
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[DX_ROUND_NE ] = {"g", "R", sm6_parser_emit_dx_unary},
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@ -455,6 +455,9 @@ enum vkd3d_shader_opcode
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VKD3DSIH_PHASE,
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VKD3DSIH_PHASE,
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VKD3DSIH_PHI,
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VKD3DSIH_PHI,
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VKD3DSIH_POW,
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VKD3DSIH_POW,
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VKD3DSIH_QUAD_READ_ACROSS_D,
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VKD3DSIH_QUAD_READ_ACROSS_X,
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VKD3DSIH_QUAD_READ_ACROSS_Y,
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VKD3DSIH_RCP,
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VKD3DSIH_RCP,
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VKD3DSIH_REP,
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VKD3DSIH_REP,
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VKD3DSIH_RESINFO,
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VKD3DSIH_RESINFO,
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