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vkd3d-shader/hlsl: Allow prioritizing smaller writemasks when allocating signature elements.
For now this doesn't have effect yet, until semantic allocation is optimized.
This commit is contained in:
committed by
Henri Verbeet
parent
d562b03c43
commit
88dd082160
Notes:
Henri Verbeet
2024-10-22 20:54:15 +02:00
Approved-by: Elizabeth Figura (@zfigura) Approved-by: Henri Verbeet (@hverbeet) Merge-Request: https://gitlab.winehq.org/wine/vkd3d/-/merge_requests/1193
@ -4459,6 +4459,13 @@ struct register_allocator
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/* Total number of registers allocated so far. Used to declare sm4 temp count. */
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/* Total number of registers allocated so far. Used to declare sm4 temp count. */
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uint32_t reg_count;
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uint32_t reg_count;
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/* Special flag so allocations that can share registers prioritize those
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* that will result in smaller writemasks.
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* For instance, a single-register allocation would prefer to share a register
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* whose .xy components are already allocated (becoming .z) instead of a
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* register whose .xyz components are already allocated (becoming .w). */
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bool prioritize_smaller_writemasks;
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};
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};
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static unsigned int get_available_writemask(const struct register_allocator *allocator,
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static unsigned int get_available_writemask(const struct register_allocator *allocator,
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@ -4517,23 +4524,31 @@ static struct hlsl_reg allocate_register(struct hlsl_ctx *ctx, struct register_a
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unsigned int component_count, int mode, bool force_align)
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unsigned int component_count, int mode, bool force_align)
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{
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{
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unsigned int required_size = force_align ? 4 : reg_size;
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unsigned int required_size = force_align ? 4 : reg_size;
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unsigned int writemask = 0, pref;
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struct hlsl_reg ret = {0};
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struct hlsl_reg ret = {0};
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unsigned int writemask;
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uint32_t reg_idx;
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uint32_t reg_idx;
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VKD3D_ASSERT(component_count <= reg_size);
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VKD3D_ASSERT(component_count <= reg_size);
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for (reg_idx = 0;; ++reg_idx)
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pref = allocator->prioritize_smaller_writemasks ? 4 : required_size;
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for (; pref >= required_size; --pref)
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{
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{
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writemask = get_available_writemask(allocator, first_write, last_read, reg_idx, mode);
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for (reg_idx = 0; pref == required_size || reg_idx < allocator->reg_count; ++reg_idx)
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if (vkd3d_popcount(writemask) >= required_size)
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{
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{
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writemask = hlsl_combine_writemasks(writemask, (1u << reg_size) - 1);
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unsigned int available_writemask = get_available_writemask(allocator,
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break;
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first_write, last_read, reg_idx, mode);
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if (vkd3d_popcount(available_writemask) >= pref)
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{
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writemask = hlsl_combine_writemasks(available_writemask, (1u << reg_size) - 1);
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break;
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}
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}
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}
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if (writemask)
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break;
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}
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}
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VKD3D_ASSERT(vkd3d_popcount(writemask) == reg_size);
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record_allocation(ctx, allocator, reg_idx, writemask, first_write, last_read, mode);
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record_allocation(ctx, allocator, reg_idx, writemask, first_write, last_read, mode);
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ret.id = reg_idx;
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ret.id = reg_idx;
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@ -5323,6 +5338,9 @@ static void allocate_semantic_registers(struct hlsl_ctx *ctx, struct hlsl_ir_fun
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bool is_patch_constant_func = entry_func == ctx->patch_constant_func;
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bool is_patch_constant_func = entry_func == ctx->patch_constant_func;
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struct hlsl_ir_var *var;
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struct hlsl_ir_var *var;
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input_allocator.prioritize_smaller_writemasks = true;
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output_allocator.prioritize_smaller_writemasks = true;
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LIST_FOR_EACH_ENTRY(var, &entry_func->extern_vars, struct hlsl_ir_var, extern_entry)
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LIST_FOR_EACH_ENTRY(var, &entry_func->extern_vars, struct hlsl_ir_var, extern_entry)
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{
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{
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if (var->is_input_semantic)
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if (var->is_input_semantic)
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