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vkd3d-shader/hlsl: Implement the InterlockedXor() intrinsic.
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Notes:
Henri Verbeet
2025-01-20 16:18:51 +01:00
Approved-by: Henri Verbeet (@hverbeet) Approved-by: Elizabeth Figura (@zfigura) Merge-Request: https://gitlab.winehq.org/wine/vkd3d/-/merge_requests/1330
@ -3513,6 +3513,7 @@ static void dump_ir_interlocked(struct vkd3d_string_buffer *buffer, const struct
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[HLSL_INTERLOCKED_MAX] = "max",
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[HLSL_INTERLOCKED_MAX] = "max",
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[HLSL_INTERLOCKED_MIN] = "min",
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[HLSL_INTERLOCKED_MIN] = "min",
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[HLSL_INTERLOCKED_OR] = "or",
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[HLSL_INTERLOCKED_OR] = "or",
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[HLSL_INTERLOCKED_XOR] = "xor",
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};
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};
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VKD3D_ASSERT(interlocked->op < ARRAY_SIZE(op_names));
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VKD3D_ASSERT(interlocked->op < ARRAY_SIZE(op_names));
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@ -960,6 +960,7 @@ enum hlsl_interlocked_op
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HLSL_INTERLOCKED_MAX,
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HLSL_INTERLOCKED_MAX,
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HLSL_INTERLOCKED_MIN,
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HLSL_INTERLOCKED_MIN,
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HLSL_INTERLOCKED_OR,
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HLSL_INTERLOCKED_OR,
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HLSL_INTERLOCKED_XOR,
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};
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};
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/* Represents an interlocked operation.
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/* Represents an interlocked operation.
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@ -5548,6 +5548,12 @@ static bool intrinsic_InterlockedOr(struct hlsl_ctx *ctx,
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return intrinsic_interlocked(ctx, HLSL_INTERLOCKED_OR, params, loc, "InterlockedOr");
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return intrinsic_interlocked(ctx, HLSL_INTERLOCKED_OR, params, loc, "InterlockedOr");
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}
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}
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static bool intrinsic_InterlockedXor(struct hlsl_ctx *ctx,
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const struct parse_initializer *params, const struct vkd3d_shader_location *loc)
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{
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return intrinsic_interlocked(ctx, HLSL_INTERLOCKED_XOR, params, loc, "InterlockedXor");
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}
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static const struct intrinsic_function
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static const struct intrinsic_function
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{
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{
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const char *name;
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const char *name;
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@ -5569,6 +5575,7 @@ intrinsic_functions[] =
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{"InterlockedMax", -1, true, intrinsic_InterlockedMax},
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{"InterlockedMax", -1, true, intrinsic_InterlockedMax},
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{"InterlockedMin", -1, true, intrinsic_InterlockedMin},
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{"InterlockedMin", -1, true, intrinsic_InterlockedMin},
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{"InterlockedOr", -1, true, intrinsic_InterlockedOr},
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{"InterlockedOr", -1, true, intrinsic_InterlockedOr},
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{"InterlockedXor", -1, true, intrinsic_InterlockedXor},
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{"abs", 1, true, intrinsic_abs},
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{"abs", 1, true, intrinsic_abs},
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{"acos", 1, true, intrinsic_acos},
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{"acos", 1, true, intrinsic_acos},
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{"all", 1, true, intrinsic_all},
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{"all", 1, true, intrinsic_all},
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@ -10006,6 +10006,7 @@ static bool sm4_generate_vsir_instr_interlocked(struct hlsl_ctx *ctx,
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[HLSL_INTERLOCKED_MAX] = VKD3DSIH_ATOMIC_UMAX,
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[HLSL_INTERLOCKED_MAX] = VKD3DSIH_ATOMIC_UMAX,
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[HLSL_INTERLOCKED_MIN] = VKD3DSIH_ATOMIC_UMIN,
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[HLSL_INTERLOCKED_MIN] = VKD3DSIH_ATOMIC_UMIN,
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[HLSL_INTERLOCKED_OR] = VKD3DSIH_ATOMIC_OR,
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[HLSL_INTERLOCKED_OR] = VKD3DSIH_ATOMIC_OR,
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[HLSL_INTERLOCKED_XOR] = VKD3DSIH_ATOMIC_XOR,
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};
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};
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static const enum vkd3d_shader_opcode imm_opcodes[] =
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static const enum vkd3d_shader_opcode imm_opcodes[] =
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@ -10017,6 +10018,7 @@ static bool sm4_generate_vsir_instr_interlocked(struct hlsl_ctx *ctx,
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[HLSL_INTERLOCKED_MAX] = VKD3DSIH_IMM_ATOMIC_UMAX,
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[HLSL_INTERLOCKED_MAX] = VKD3DSIH_IMM_ATOMIC_UMAX,
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[HLSL_INTERLOCKED_MIN] = VKD3DSIH_IMM_ATOMIC_UMIN,
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[HLSL_INTERLOCKED_MIN] = VKD3DSIH_IMM_ATOMIC_UMIN,
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[HLSL_INTERLOCKED_OR] = VKD3DSIH_IMM_ATOMIC_OR,
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[HLSL_INTERLOCKED_OR] = VKD3DSIH_IMM_ATOMIC_OR,
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[HLSL_INTERLOCKED_XOR] = VKD3DSIH_IMM_ATOMIC_XOR,
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};
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};
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struct hlsl_ir_node *cmp_value = interlocked->cmp_value.node, *value = interlocked->value.node;
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struct hlsl_ir_node *cmp_value = interlocked->cmp_value.node, *value = interlocked->value.node;
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@ -4034,6 +4034,7 @@ static void tpf_handle_instruction(struct tpf_compiler *tpf, const struct vkd3d_
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case VKD3DSIH_ATOMIC_UMAX:
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case VKD3DSIH_ATOMIC_UMAX:
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case VKD3DSIH_ATOMIC_UMIN:
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case VKD3DSIH_ATOMIC_UMIN:
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case VKD3DSIH_ATOMIC_OR:
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case VKD3DSIH_ATOMIC_OR:
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case VKD3DSIH_ATOMIC_XOR:
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case VKD3DSIH_AND:
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case VKD3DSIH_AND:
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case VKD3DSIH_BREAK:
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case VKD3DSIH_BREAK:
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case VKD3DSIH_CASE:
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case VKD3DSIH_CASE:
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@ -4085,6 +4086,7 @@ static void tpf_handle_instruction(struct tpf_compiler *tpf, const struct vkd3d_
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case VKD3DSIH_IMM_ATOMIC_UMAX:
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case VKD3DSIH_IMM_ATOMIC_UMAX:
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case VKD3DSIH_IMM_ATOMIC_UMIN:
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case VKD3DSIH_IMM_ATOMIC_UMIN:
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case VKD3DSIH_IMM_ATOMIC_OR:
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case VKD3DSIH_IMM_ATOMIC_OR:
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case VKD3DSIH_IMM_ATOMIC_XOR:
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case VKD3DSIH_IMUL:
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case VKD3DSIH_IMUL:
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case VKD3DSIH_INE:
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case VKD3DSIH_INE:
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case VKD3DSIH_INEG:
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case VKD3DSIH_INEG:
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@ -8,7 +8,7 @@ size (buffer, 11)
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0xd 5 6 0x10 4 4 7 2 0 5 0
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0xd 5 6 0x10 4 4 7 2 0 5 0
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[compute shader fail(sm<5) todo(sm>=5)]
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[compute shader fail(sm<5)]
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RWBuffer<uint> u : register(u1);
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RWBuffer<uint> u : register(u1);
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uniform uint4 v;
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uniform uint4 v;
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@ -32,7 +32,7 @@ void main()
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[test]
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[test]
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uniform 0 uint4 3 5 0 0
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uniform 0 uint4 3 5 0 0
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todo(sm<6) dispatch 1 1 1
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todo(glsl | msl) dispatch 1 1 1
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probe uav 1 (0) rui (1)
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probe uav 1 (0) rui (1)
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probe uav 1 (1) rui (3)
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probe uav 1 (1) rui (3)
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probe uav 1 (2) rui (15)
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probe uav 1 (2) rui (15)
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@ -46,7 +46,7 @@ probe uav 1 (9) rui (3)
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probe uav 1 (10) rui (1)
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probe uav 1 (10) rui (1)
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uniform 0 uint4 1 2 0 0
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uniform 0 uint4 1 2 0 0
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todo(sm<6) dispatch 2 1 1
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todo(glsl | msl) dispatch 2 1 1
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probe uav 1 (0) rui (1)
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probe uav 1 (0) rui (1)
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probe uav 1 (1) rui (3)
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probe uav 1 (1) rui (3)
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probe uav 1 (2) rui (21)
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probe uav 1 (2) rui (21)
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@ -96,7 +96,7 @@ size (2d, 11, 1)
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0xd 5 6 0x10 4 4 7 2 0 5 0
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0xd 5 6 0x10 4 4 7 2 0 5 0
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[compute shader fail(sm<5) todo(sm>=5)]
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[compute shader fail(sm<5)]
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RWTexture2D<uint> u : register(u1);
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RWTexture2D<uint> u : register(u1);
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uniform uint4 v;
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uniform uint4 v;
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@ -120,7 +120,7 @@ void main()
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[test]
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[test]
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uniform 0 uint4 3 5 0 0
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uniform 0 uint4 3 5 0 0
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todo(sm<6) dispatch 1 1 1
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todo(glsl | msl) dispatch 1 1 1
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probe uav 1 (0) rui (1)
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probe uav 1 (0) rui (1)
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probe uav 1 (1) rui (3)
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probe uav 1 (1) rui (3)
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probe uav 1 (2) rui (15)
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probe uav 1 (2) rui (15)
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