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vkd3d-shader/msl: Implement VSIR_OP_FIRSTBIT_HI.

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This commit is contained in:
Henri Verbeet
2025-10-22 00:50:27 +02:00
parent c576a09d57
commit 74ebd4621f
Notes: Henri Verbeet 2025-11-04 15:55:42 +01:00 
Approved-by: Giovanni Mascellani (@giomasce)
Approved-by: Henri Verbeet (@hverbeet)
Merge-Request: https://gitlab.winehq.org/wine/vkd3d/-/merge_requests/1808
2 changed files with 7 additions and 5 deletions
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10
libs/vkd3d-shader/msl.c
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@@ -700,6 +700,7 @@ static void msl_dot(struct msl_generator *gen, const struct vkd3d_shader_instruc
static void msl_firstbit(struct msl_generator *gen, const struct vkd3d_shader_instruction *ins) static void msl_firstbit(struct msl_generator *gen, const struct vkd3d_shader_instruction *ins)
{ {
const char *op = ins->opcode == VSIR_OP_FIRSTBIT_LO ? "ctz" : "clz";
unsigned int mask_size; unsigned int mask_size;
struct msl_src src; struct msl_src src;
struct msl_dst dst; struct msl_dst dst;
@@ -709,11 +710,11 @@ static void msl_firstbit(struct msl_generator *gen, const struct vkd3d_shader_in
msl_src_init(&src, gen, &ins->src[0], mask); msl_src_init(&src, gen, &ins->src[0], mask);
if ((mask_size = vsir_write_mask_component_count(mask)) > 1) if ((mask_size = vsir_write_mask_component_count(mask)) > 1)
msl_print_assignment(gen, &dst, "select(uint%u(0xffffffffu), ctz(%s), bool%u(%s))", msl_print_assignment(gen, &dst, "select(uint%u(0xffffffffu), %s(%s), bool%u(%s))",
mask_size, src.str->buffer, mask_size, src.str->buffer); mask_size, op, src.str->buffer, mask_size, src.str->buffer);
else else
msl_print_assignment(gen, &dst, "%s ? ctz(%s) : 0xffffffffu", msl_print_assignment(gen, &dst, "%s ? %s(%s) : 0xffffffffu",
src.str->buffer, src.str->buffer); src.str->buffer, op, src.str->buffer);
msl_src_cleanup(&src, &gen->string_buffers); msl_src_cleanup(&src, &gen->string_buffers);
msl_dst_cleanup(&dst, &gen->string_buffers); msl_dst_cleanup(&dst, &gen->string_buffers);
@@ -1520,6 +1521,7 @@ static void msl_handle_instruction(struct msl_generator *gen, const struct vkd3d
case VSIR_OP_EXP: case VSIR_OP_EXP:
msl_intrinsic(gen, ins, "exp2"); msl_intrinsic(gen, ins, "exp2");
break; break;
case VSIR_OP_FIRSTBIT_HI:
case VSIR_OP_FIRSTBIT_LO: case VSIR_OP_FIRSTBIT_LO:
msl_firstbit(gen, ins); msl_firstbit(gen, ins);
break; break;

2
tests/hlsl/bitwise.shader_test
View File

@@ -298,7 +298,7 @@ uint4 main() : sv_target
[test] [test]
uniform 0 uint4 0 0xffffffff 0x00001000 0x00760400 uniform 0 uint4 0 0xffffffff 0x00001000 0x00760400
todo(msl & sm>=6) draw quad draw quad
probe (0, 0) u32(0xffffffff, 31, 12, 22) probe (0, 0) u32(0xffffffff, 31, 12, 22)
[pixel shader] [pixel shader]