From 59c8c1b8fadfc912407deec33f55359db62d8cfb Mon Sep 17 00:00:00 2001 From: Henri Verbeet Date: Thu, 27 Nov 2025 21:54:02 +0100 Subject: [PATCH] vkd3d-shader/ir: Rename struct vkd3d_shader_dst_param to struct vsir_dst_operand. --- libs/vkd3d-shader/d3d_asm.c | 44 ++-- libs/vkd3d-shader/d3dbc.c | 72 +++--- libs/vkd3d-shader/dxil.c | 84 +++---- libs/vkd3d-shader/glsl.c | 4 +- libs/vkd3d-shader/hlsl_codegen.c | 192 +++++++-------- libs/vkd3d-shader/ir.c | 299 ++++++++++++----------- libs/vkd3d-shader/msl.c | 4 +- libs/vkd3d-shader/spirv.c | 124 +++++----- libs/vkd3d-shader/tpf.c | 160 ++++++------ libs/vkd3d-shader/vkd3d_shader_private.h | 31 +-- 10 files changed, 501 insertions(+), 513 deletions(-) diff --git a/libs/vkd3d-shader/d3d_asm.c b/libs/vkd3d-shader/d3d_asm.c index b316f6c88..c481be9b1 100644 --- a/libs/vkd3d-shader/d3d_asm.c +++ b/libs/vkd3d-shader/d3d_asm.c @@ -1041,24 +1041,24 @@ static void shader_print_write_mask(struct vkd3d_d3d_asm_compiler *compiler, compiler->colours.write_mask, buffer, compiler->colours.reset, suffix); } -static void shader_print_dst_param(struct vkd3d_d3d_asm_compiler *compiler, - const char *prefix, const struct vkd3d_shader_dst_param *param, bool is_declaration, const char *suffix) +static void shader_print_dst_operand(struct vkd3d_d3d_asm_compiler *compiler, + const char *prefix, const struct vsir_dst_operand *dst, bool is_declaration, const char *suffix) { - uint32_t write_mask = param->write_mask; + uint32_t write_mask = dst->write_mask; - shader_print_register(compiler, prefix, ¶m->reg, is_declaration, ""); + shader_print_register(compiler, prefix, &dst->reg, is_declaration, ""); - if (write_mask && param->reg.dimension == VSIR_DIMENSION_VEC4) + if (write_mask && dst->reg.dimension == VSIR_DIMENSION_VEC4) { - if (data_type_is_64_bit(param->reg.data_type)) + if (data_type_is_64_bit(dst->reg.data_type)) write_mask = vsir_write_mask_32_from_64(write_mask); shader_print_write_mask(compiler, "", write_mask, ""); } - shader_print_precision(compiler, ¶m->reg); - shader_print_non_uniform(compiler, ¶m->reg); - shader_print_reg_type(compiler, "", ¶m->reg, suffix); + shader_print_precision(compiler, &dst->reg); + shader_print_non_uniform(compiler, &dst->reg); + shader_print_reg_type(compiler, "", &dst->reg, suffix); } static void shader_print_src_param(struct vkd3d_d3d_asm_compiler *compiler, @@ -1153,7 +1153,7 @@ static void shader_print_src_param(struct vkd3d_d3d_asm_compiler *compiler, } static void shader_dump_ins_modifiers(struct vkd3d_d3d_asm_compiler *compiler, - const struct vkd3d_shader_dst_param *dst) + const struct vsir_dst_operand *dst) { struct vkd3d_string_buffer *buffer = &compiler->buffer; uint32_t mmask = dst->modifiers; @@ -1561,7 +1561,7 @@ static void shader_dump_instruction(struct vkd3d_d3d_asm_compiler *compiler, break; case VSIR_OP_DCL_INDEX_RANGE: - shader_print_dst_param(compiler, " ", &ins->declaration.index_range.dst, true, ""); + shader_print_dst_operand(compiler, " ", &ins->declaration.index_range.dst, true, ""); shader_print_uint_literal(compiler, " ", ins->declaration.index_range.register_count, ""); break; @@ -1579,7 +1579,7 @@ static void shader_dump_instruction(struct vkd3d_d3d_asm_compiler *compiler, case VSIR_OP_DCL_INPUT_PS: shader_print_interpolation_mode(compiler, " ", ins->flags, ""); - shader_print_dst_param(compiler, " ", &ins->declaration.dst, true, ""); + shader_print_dst_operand(compiler, " ", &ins->declaration.dst, true, ""); break; case VSIR_OP_DCL_INPUT_PS_SGV: @@ -1587,19 +1587,19 @@ static void shader_dump_instruction(struct vkd3d_d3d_asm_compiler *compiler, case VSIR_OP_DCL_INPUT_SIV: case VSIR_OP_DCL_OUTPUT_SGV: case VSIR_OP_DCL_OUTPUT_SIV: - shader_print_dst_param(compiler, " ", &ins->declaration.register_semantic.reg, true, ""); + shader_print_dst_operand(compiler, " ", &ins->declaration.register_semantic.reg, true, ""); shader_print_input_sysval_semantic(compiler, ", ", ins->declaration.register_semantic.sysval_semantic, ""); break; case VSIR_OP_DCL_INPUT_PS_SIV: shader_print_interpolation_mode(compiler, " ", ins->flags, ""); - shader_print_dst_param(compiler, " ", &ins->declaration.register_semantic.reg, true, ""); + shader_print_dst_operand(compiler, " ", &ins->declaration.register_semantic.reg, true, ""); shader_print_input_sysval_semantic(compiler, ", ", ins->declaration.register_semantic.sysval_semantic, ""); break; case VSIR_OP_DCL_INPUT: case VSIR_OP_DCL_OUTPUT: - shader_print_dst_param(compiler, " ", &ins->declaration.dst, true, ""); + shader_print_dst_operand(compiler, " ", &ins->declaration.dst, true, ""); break; case VSIR_OP_DCL_INPUT_PRIMITIVE: @@ -1615,12 +1615,12 @@ static void shader_dump_instruction(struct vkd3d_d3d_asm_compiler *compiler, break; case VSIR_OP_DCL_RESOURCE_RAW: - shader_print_dst_param(compiler, " ", &ins->declaration.raw_resource.resource.reg, true, ""); + shader_print_dst_operand(compiler, " ", &ins->declaration.raw_resource.resource.reg, true, ""); shader_dump_register_space(compiler, ins->declaration.raw_resource.resource.range.space); break; case VSIR_OP_DCL_RESOURCE_STRUCTURED: - shader_print_dst_param(compiler, " ", &ins->declaration.structured_resource.resource.reg, true, ""); + shader_print_dst_operand(compiler, " ", &ins->declaration.structured_resource.resource.reg, true, ""); shader_print_uint_literal(compiler, ", ", ins->declaration.structured_resource.byte_stride, ""); shader_dump_register_space(compiler, ins->declaration.structured_resource.resource.range.space); break; @@ -1654,12 +1654,12 @@ static void shader_dump_instruction(struct vkd3d_d3d_asm_compiler *compiler, break; case VSIR_OP_DCL_TGSM_RAW: - shader_print_dst_param(compiler, " ", &ins->declaration.tgsm_raw.reg, true, ""); + shader_print_dst_operand(compiler, " ", &ins->declaration.tgsm_raw.reg, true, ""); shader_print_uint_literal(compiler, ", ", ins->declaration.tgsm_raw.byte_count, ""); break; case VSIR_OP_DCL_TGSM_STRUCTURED: - shader_print_dst_param(compiler, " ", &ins->declaration.tgsm_structured.reg, true, ""); + shader_print_dst_operand(compiler, " ", &ins->declaration.tgsm_structured.reg, true, ""); shader_print_uint_literal(compiler, ", ", ins->declaration.tgsm_structured.byte_stride, ""); shader_print_uint_literal(compiler, ", ", ins->declaration.tgsm_structured.structure_count, ""); break; @@ -1672,13 +1672,13 @@ static void shader_dump_instruction(struct vkd3d_d3d_asm_compiler *compiler, case VSIR_OP_DCL_UAV_RAW: shader_dump_uav_flags(compiler, ins->flags); - shader_print_dst_param(compiler, " ", &ins->declaration.raw_resource.resource.reg, true, ""); + shader_print_dst_operand(compiler, " ", &ins->declaration.raw_resource.resource.reg, true, ""); shader_dump_register_space(compiler, ins->declaration.raw_resource.resource.range.space); break; case VSIR_OP_DCL_UAV_STRUCTURED: shader_dump_uav_flags(compiler, ins->flags); - shader_print_dst_param(compiler, " ", &ins->declaration.structured_resource.resource.reg, true, ""); + shader_print_dst_operand(compiler, " ", &ins->declaration.structured_resource.resource.reg, true, ""); shader_print_uint_literal(compiler, ", ", ins->declaration.structured_resource.byte_stride, ""); shader_dump_register_space(compiler, ins->declaration.structured_resource.resource.range.space); break; @@ -1744,7 +1744,7 @@ static void shader_dump_instruction(struct vkd3d_d3d_asm_compiler *compiler, for (i = 0; i < ins->dst_count; ++i) { shader_dump_ins_modifiers(compiler, &ins->dst[i]); - shader_print_dst_param(compiler, !i ? " " : ", ", &ins->dst[i], false, ""); + shader_print_dst_operand(compiler, !i ? " " : ", ", &ins->dst[i], false, ""); } /* Other source tokens */ diff --git a/libs/vkd3d-shader/d3dbc.c b/libs/vkd3d-shader/d3dbc.c index 18a1cc5dc..79e042ca0 100644 --- a/libs/vkd3d-shader/d3dbc.c +++ b/libs/vkd3d-shader/d3dbc.c @@ -592,10 +592,10 @@ static void shader_sm1_parse_src_param(struct vkd3d_shader_sm1_parser *sm1, uint src->modifiers = (param & VKD3D_SM1_SRC_MODIFIER_MASK) >> VKD3D_SM1_SRC_MODIFIER_SHIFT; } -static void shader_sm1_parse_dst_param(struct vkd3d_shader_sm1_parser *sm1, uint32_t param, - struct vkd3d_shader_src_param *rel_addr, struct vkd3d_shader_dst_param *dst) +static void d3dbc_parse_dst_operand(struct vkd3d_shader_sm1_parser *d3dbc, uint32_t param, + struct vkd3d_shader_src_param *rel_addr, struct vsir_dst_operand *dst) { - d3dbc_parse_register(sm1, &dst->reg, param, rel_addr); + d3dbc_parse_register(d3dbc, &dst->reg, param, rel_addr); dst->modifiers = (param & VKD3D_SM1_DST_MODIFIER_MASK) >> VKD3D_SM1_DST_MODIFIER_SHIFT; dst->shift = (param & VKD3D_SM1_DSTSHIFT_MASK) >> VKD3D_SM1_DSTSHIFT_SHIFT; @@ -1060,30 +1060,30 @@ static void shader_sm1_read_src_param(struct vkd3d_shader_sm1_parser *sm1, const shader_sm1_parse_src_param(sm1, token, src_rel_addr, src_param); } -static void shader_sm1_read_dst_param(struct vkd3d_shader_sm1_parser *sm1, const uint32_t **ptr, - struct vkd3d_shader_dst_param *dst_param) +static void d3dbc_read_dst_operand(struct vkd3d_shader_sm1_parser *d3dbc, + const uint32_t **ptr, struct vsir_dst_operand *dst) { struct vkd3d_shader_src_param *dst_rel_addr = NULL; uint32_t token, addr_token; - shader_sm1_read_param(sm1, ptr, &token, &addr_token); + shader_sm1_read_param(d3dbc, ptr, &token, &addr_token); if (has_relative_address(token)) { - if (!(dst_rel_addr = vsir_program_get_src_params(sm1->program, 1))) + if (!(dst_rel_addr = vsir_program_get_src_params(d3dbc->program, 1))) { - vkd3d_shader_parser_error(&sm1->p, VKD3D_SHADER_ERROR_D3DBC_OUT_OF_MEMORY, + vkd3d_shader_parser_error(&d3dbc->p, VKD3D_SHADER_ERROR_D3DBC_OUT_OF_MEMORY, "Out of memory."); - sm1->abort = true; + d3dbc->abort = true; return; } - shader_sm1_parse_src_param(sm1, addr_token, NULL, dst_rel_addr); + shader_sm1_parse_src_param(d3dbc, addr_token, NULL, dst_rel_addr); } - shader_sm1_parse_dst_param(sm1, token, dst_rel_addr, dst_param); + d3dbc_parse_dst_operand(d3dbc, token, dst_rel_addr, dst); - if (dst_param->reg.type == VKD3DSPR_RASTOUT && dst_param->reg.idx[0].offset == VSIR_RASTOUT_POINT_SIZE) - sm1->program->has_point_size = true; - if (dst_param->reg.type == VKD3DSPR_RASTOUT && dst_param->reg.idx[0].offset == VSIR_RASTOUT_FOG) - sm1->program->has_fog = true; + if (dst->reg.type == VKD3DSPR_RASTOUT && dst->reg.idx[0].offset == VSIR_RASTOUT_POINT_SIZE) + d3dbc->program->has_point_size = true; + if (dst->reg.type == VKD3DSPR_RASTOUT && dst->reg.idx[0].offset == VSIR_RASTOUT_FOG) + d3dbc->program->has_fog = true; } static void shader_sm1_read_semantic(struct vkd3d_shader_sm1_parser *sm1, @@ -1121,7 +1121,7 @@ static void shader_sm1_read_semantic(struct vkd3d_shader_sm1_parser *sm1, semantic->resource_data_type[1] = VSIR_DATA_F32; semantic->resource_data_type[2] = VSIR_DATA_F32; semantic->resource_data_type[3] = VSIR_DATA_F32; - shader_sm1_parse_dst_param(sm1, dst_token, NULL, &semantic->resource.reg); + d3dbc_parse_dst_operand(sm1, dst_token, NULL, &semantic->resource.reg); range = &semantic->resource.range; range->space = 0; range->first = range->last = semantic->resource.reg.reg.idx[0].offset; @@ -1287,8 +1287,8 @@ static void shader_sm1_read_instruction(struct vkd3d_shader_sm1_parser *sm1, str const struct vkd3d_sm1_opcode_info *opcode_info; struct vsir_program *program = sm1->program; unsigned int vsir_dst_count, vsir_src_count; - struct vkd3d_shader_dst_param *dst_param; const uint32_t **ptr = &sm1->ptr; + struct vsir_dst_operand *dst; uint32_t opcode_token; const uint32_t *p; bool predicated; @@ -1332,10 +1332,10 @@ static void shader_sm1_read_instruction(struct vkd3d_shader_sm1_parser *sm1, str predicated = !!(opcode_token & VKD3D_SM1_INSTRUCTION_PREDICATED); ins->predicate = predicate = predicated ? vsir_program_get_src_params(program, 1) : NULL; ins->dst_count = vsir_dst_count; - ins->dst = dst_param = vsir_program_get_dst_params(program, ins->dst_count); + ins->dst = dst = vsir_program_get_dst_operands(program, ins->dst_count); ins->src_count = vsir_src_count; ins->src = src_params = vsir_program_get_src_params(program, ins->src_count); - if ((!predicate && predicated) || (!src_params && ins->src_count) || (!dst_param && ins->dst_count)) + if ((!predicate && predicated) || (!src_params && ins->src_count) || (!dst && ins->dst_count)) { vkd3d_shader_parser_error(&sm1->p, VKD3D_SHADER_ERROR_D3DBC_OUT_OF_MEMORY, "Out of memory."); goto fail; @@ -1365,21 +1365,21 @@ static void shader_sm1_read_instruction(struct vkd3d_shader_sm1_parser *sm1, str } else if (ins->opcode == VSIR_OP_DEF) { - shader_sm1_read_dst_param(sm1, &p, dst_param); + d3dbc_read_dst_operand(sm1, &p, dst); shader_sm1_read_immconst(sm1, &p, &src_params[0], VSIR_DIMENSION_VEC4, VSIR_DATA_F32); - shader_sm1_scan_register(sm1, &dst_param->reg, dst_param->write_mask, true); + shader_sm1_scan_register(sm1, &dst->reg, dst->write_mask, true); } else if (ins->opcode == VSIR_OP_DEFB) { - shader_sm1_read_dst_param(sm1, &p, dst_param); + d3dbc_read_dst_operand(sm1, &p, dst); shader_sm1_read_immconst(sm1, &p, &src_params[0], VSIR_DIMENSION_SCALAR, VSIR_DATA_U32); - shader_sm1_scan_register(sm1, &dst_param->reg, dst_param->write_mask, true); + shader_sm1_scan_register(sm1, &dst->reg, dst->write_mask, true); } else if (ins->opcode == VSIR_OP_DEFI) { - shader_sm1_read_dst_param(sm1, &p, dst_param); + d3dbc_read_dst_operand(sm1, &p, dst); shader_sm1_read_immconst(sm1, &p, &src_params[0], VSIR_DIMENSION_VEC4, VSIR_DATA_I32); - shader_sm1_scan_register(sm1, &dst_param->reg, dst_param->write_mask, true); + shader_sm1_scan_register(sm1, &dst->reg, dst->write_mask, true); } else if (ins->opcode == VSIR_OP_TEXKILL) { @@ -1387,10 +1387,10 @@ static void shader_sm1_read_instruction(struct vkd3d_shader_sm1_parser *sm1, str * semantically a source. Since we have multiple passes which operate * generically on sources or destinations, normalize that. */ const struct vkd3d_shader_register *reg; - struct vkd3d_shader_dst_param tmp_dst; + struct vsir_dst_operand tmp_dst; reg = &tmp_dst.reg; - shader_sm1_read_dst_param(sm1, &p, &tmp_dst); + d3dbc_read_dst_operand(sm1, &p, &tmp_dst); shader_sm1_scan_register(sm1, reg, tmp_dst.write_mask, false); vsir_src_param_init(&src_params[0], reg->type, reg->data_type, reg->idx_count); @@ -1405,8 +1405,8 @@ static void shader_sm1_read_instruction(struct vkd3d_shader_sm1_parser *sm1, str /* Destination token */ if (ins->dst_count) { - shader_sm1_read_dst_param(sm1, &p, dst_param); - shader_sm1_scan_register(sm1, &dst_param->reg, dst_param->write_mask, false); + d3dbc_read_dst_operand(sm1, &p, dst); + shader_sm1_scan_register(sm1, &dst->reg, dst->write_mask, false); } /* Predication token */ @@ -1865,8 +1865,8 @@ static uint32_t swizzle_from_vsir(uint32_t swizzle) static bool is_inconsequential_instr(const struct vkd3d_shader_instruction *ins) { - const struct vkd3d_shader_dst_param *dst = &ins->dst[0]; const struct vkd3d_shader_src_param *src = &ins->src[0]; + const struct vsir_dst_operand *dst = &ins->dst[0]; unsigned int i; if (ins->opcode != VSIR_OP_MOV) @@ -1889,7 +1889,7 @@ static bool is_inconsequential_instr(const struct vkd3d_shader_instruction *ins) return true; } -static void write_sm1_dst_register(struct vkd3d_bytecode_buffer *buffer, const struct vkd3d_shader_dst_param *reg) +static void write_sm1_dst_register(struct vkd3d_bytecode_buffer *buffer, const struct vsir_dst_operand *reg) { uint32_t offset = reg->reg.idx_count ? reg->reg.idx[0].offset : 0; @@ -1973,12 +1973,12 @@ static void d3dbc_write_texkill(struct d3dbc_compiler *d3dbc, const struct vkd3d { const struct vkd3d_shader_register *reg = &ins->src[0].reg; struct vkd3d_shader_instruction tmp; - struct vkd3d_shader_dst_param dst; + struct vsir_dst_operand dst; /* TEXKILL, uniquely, encodes its argument as a destination, when it is * semantically a source. We store it as a source in vsir, so convert it. */ - vsir_dst_param_init(&dst, reg->type, reg->data_type, reg->idx_count); + vsir_dst_operand_init(&dst, reg->type, reg->data_type, reg->idx_count); dst.reg = *reg; dst.write_mask = mask_from_swizzle(ins->src[0].swizzle); @@ -1996,7 +1996,7 @@ static void d3dbc_write_vsir_def(struct d3dbc_compiler *d3dbc, const struct vkd3 struct vkd3d_bytecode_buffer *buffer = &d3dbc->buffer; uint32_t token; - const struct vkd3d_shader_dst_param reg = + const struct vsir_dst_operand reg = { .reg.type = VKD3DSPR_CONST, .write_mask = VKD3DSP_WRITEMASK_ALL, @@ -2019,7 +2019,7 @@ static void d3dbc_write_vsir_sampler_dcl(struct d3dbc_compiler *d3dbc, { const struct vkd3d_shader_version *version = &d3dbc->program->shader_version; struct vkd3d_bytecode_buffer *buffer = &d3dbc->buffer; - struct vkd3d_shader_dst_param reg = {0}; + struct vsir_dst_operand reg = {0}; uint32_t token; token = VKD3D_SM1_OP_DCL; @@ -2158,7 +2158,7 @@ static void d3dbc_write_semantic_dcl(struct d3dbc_compiler *d3dbc, { const struct vkd3d_shader_version *version = &d3dbc->program->shader_version; struct vkd3d_bytecode_buffer *buffer = &d3dbc->buffer; - struct vkd3d_shader_dst_param reg = {0}; + struct vsir_dst_operand reg = {0}; enum vkd3d_decl_usage usage; uint32_t token, usage_idx; bool ret; diff --git a/libs/vkd3d-shader/dxil.c b/libs/vkd3d-shader/dxil.c index 497c03509..16e0814a8 100644 --- a/libs/vkd3d-shader/dxil.c +++ b/libs/vkd3d-shader/dxil.c @@ -927,9 +927,9 @@ struct sm6_parser const char *entry_point; const char *patch_constant_function; - struct vkd3d_shader_dst_param *output_params; - struct vkd3d_shader_dst_param *input_params; - struct vkd3d_shader_dst_param *patch_constant_params; + struct vsir_dst_operand *output_params; + struct vsir_dst_operand *input_params; + struct vsir_dst_operand *patch_constant_params; uint32_t io_regs_declared[VKD3D_BITMAP_SIZE(VKD3DSPR_COUNT)]; struct vkd3d_shader_src_param *outpointid_param; @@ -2595,21 +2595,21 @@ static struct vkd3d_shader_src_param *instruction_src_params_alloc(struct vkd3d_ return params; } -static struct vkd3d_shader_dst_param *instruction_dst_params_alloc(struct vkd3d_shader_instruction *ins, +static struct vsir_dst_operand *instruction_dst_params_alloc(struct vkd3d_shader_instruction *ins, unsigned int count, struct sm6_parser *sm6) { - struct vkd3d_shader_dst_param *params; + struct vsir_dst_operand *dst; - if (!(params = vsir_program_get_dst_params(sm6->program, count))) + if (!(dst = vsir_program_get_dst_operands(sm6->program, count))) { - ERR("Failed to allocate dst params.\n"); vkd3d_shader_parser_error(&sm6->p, VKD3D_SHADER_ERROR_DXIL_OUT_OF_MEMORY, - "Out of memory allocating instruction dst parameters."); + "Out of memory allocating instruction destination operands."); return NULL; } - ins->dst = params; + ins->dst = dst; ins->dst_count = count; - return params; + + return dst; } static void register_init_with_id(struct vkd3d_shader_register *reg, @@ -2834,28 +2834,28 @@ static void register_make_constant_uint(struct vkd3d_shader_register *reg, unsig reg->u.immconst_u32[0] = value; } -static void dst_param_init(struct vkd3d_shader_dst_param *param) +static void dst_param_init(struct vsir_dst_operand *param) { param->write_mask = VKD3DSP_WRITEMASK_0; param->modifiers = 0; param->shift = 0; } -static void dst_param_init_with_mask(struct vkd3d_shader_dst_param *param, unsigned int mask) +static void dst_param_init_with_mask(struct vsir_dst_operand *param, unsigned int mask) { param->write_mask = mask; param->modifiers = 0; param->shift = 0; } -static inline void dst_param_init_scalar(struct vkd3d_shader_dst_param *param, unsigned int component_idx) +static inline void dst_param_init_scalar(struct vsir_dst_operand *param, unsigned int component_idx) { param->write_mask = 1u << component_idx; param->modifiers = 0; param->shift = 0; } -static void dst_param_init_vector(struct vkd3d_shader_dst_param *param, unsigned int component_count) +static void dst_param_init_vector(struct vsir_dst_operand *param, unsigned int component_count) { param->write_mask = (1u << component_count) - 1; param->modifiers = 0; @@ -2949,7 +2949,7 @@ static bool instruction_dst_param_init_ssa_scalar(struct vkd3d_shader_instructio uint32_t type_flags, struct sm6_parser *dxil) { struct sm6_value *dst = sm6_parser_get_current_value(dxil); - struct vkd3d_shader_dst_param *param; + struct vsir_dst_operand *param; if (!(param = instruction_dst_params_alloc(ins, 1, dxil))) return false; @@ -2964,7 +2964,7 @@ static bool instruction_dst_param_init_ssa_scalar(struct vkd3d_shader_instructio static void instruction_dst_param_init_ssa_vector(struct vkd3d_shader_instruction *ins, unsigned int component_count, struct sm6_parser *sm6) { - struct vkd3d_shader_dst_param *param = instruction_dst_params_alloc(ins, 1, sm6); + struct vsir_dst_operand *param = instruction_dst_params_alloc(ins, 1, sm6); struct sm6_value *dst = sm6_parser_get_current_value(sm6); dst_param_init_vector(param, component_count); @@ -2974,15 +2974,15 @@ static void instruction_dst_param_init_ssa_vector(struct vkd3d_shader_instructio static bool instruction_dst_param_init_uint_temp_vector(struct vkd3d_shader_instruction *ins, struct sm6_parser *sm6) { - struct vkd3d_shader_dst_param *param; + struct vsir_dst_operand *dst; - if (!(param = instruction_dst_params_alloc(ins, 1, sm6))) + if (!(dst = instruction_dst_params_alloc(ins, 1, sm6))) return false; - vsir_dst_param_init(param, VKD3DSPR_TEMP, VSIR_DATA_U32, 1); - param->write_mask = VKD3DSP_WRITEMASK_ALL; - param->reg.idx[0].offset = 0; - param->reg.dimension = VSIR_DIMENSION_VEC4; + vsir_dst_operand_init(dst, VKD3DSPR_TEMP, VSIR_DATA_U32, 1); + dst->write_mask = VKD3DSP_WRITEMASK_ALL; + dst->reg.idx[0].offset = 0; + dst->reg.dimension = VSIR_DIMENSION_VEC4; return true; } @@ -4269,7 +4269,7 @@ static enum vkd3d_result sm6_parser_globals_init(struct sm6_parser *sm6) return VKD3D_OK; } -static void dst_param_io_init(struct vkd3d_shader_dst_param *param, const struct signature_element *e, +static void dst_param_io_init(struct vsir_dst_operand *param, const struct signature_element *e, enum vkd3d_shader_register_type reg_type, enum vsir_dimension dimension) { enum vkd3d_shader_component_type component_type; @@ -4326,13 +4326,13 @@ static enum vkd3d_shader_register_type register_type_from_dxil_semantic_kind( } static void sm6_parser_init_signature(struct sm6_parser *sm6, const struct shader_signature *s, - bool is_input, enum vkd3d_shader_register_type reg_type, struct vkd3d_shader_dst_param *params) + bool is_input, enum vkd3d_shader_register_type reg_type, struct vsir_dst_operand *params) { enum vkd3d_shader_type shader_type = sm6->program->shader_version.type; enum vkd3d_shader_register_type io_reg_type; bool is_patch_constant, is_control_point; - struct vkd3d_shader_dst_param *param; const struct signature_element *e; + struct vsir_dst_operand *param; unsigned int i, count; is_patch_constant = reg_type == VKD3DSPR_PATCHCONST; @@ -4396,7 +4396,7 @@ static void sm6_parser_init_signature(struct sm6_parser *sm6, const struct shade static int sm6_parser_init_output_signature(struct sm6_parser *sm6, const struct shader_signature *output_signature) { - if (!(sm6->output_params = vsir_program_get_dst_params(sm6->program, output_signature->element_count))) + if (!(sm6->output_params = vsir_program_get_dst_operands(sm6->program, output_signature->element_count))) { vkd3d_shader_parser_error(&sm6->p, VKD3D_SHADER_ERROR_DXIL_OUT_OF_MEMORY, "Failed to allocate output parameters."); @@ -4410,7 +4410,7 @@ static int sm6_parser_init_output_signature(struct sm6_parser *sm6, const struct static int sm6_parser_init_input_signature(struct sm6_parser *sm6, const struct shader_signature *input_signature) { - if (!(sm6->input_params = vsir_program_get_dst_params(sm6->program, input_signature->element_count))) + if (!(sm6->input_params = vsir_program_get_dst_operands(sm6->program, input_signature->element_count))) { vkd3d_shader_parser_error(&sm6->p, VKD3D_SHADER_ERROR_DXIL_OUT_OF_MEMORY, "Failed to allocate input parameters."); @@ -4427,7 +4427,7 @@ static int sm6_parser_init_patch_constant_signature(struct sm6_parser *sm6, { bool is_input = sm6->program->shader_version.type == VKD3D_SHADER_TYPE_DOMAIN; - if (!(sm6->patch_constant_params = vsir_program_get_dst_params(sm6->program, + if (!(sm6->patch_constant_params = vsir_program_get_dst_operands(sm6->program, patch_constant_signature->element_count))) { vkd3d_shader_parser_error(&sm6->p, VKD3D_SHADER_ERROR_DXIL_OUT_OF_MEMORY, @@ -4598,10 +4598,10 @@ static void sm6_parser_emit_atomicrmw(struct sm6_parser *sm6, struct function_em { struct sm6_value *dst = sm6_parser_get_current_value(sm6); const struct dxil_record *record = state->record; - struct vkd3d_shader_dst_param *dst_params; struct vkd3d_shader_src_param *src_params; struct vkd3d_shader_register regs[2], reg; struct vkd3d_shader_instruction *ins; + struct vsir_dst_operand *dst_params; struct vkd3d_shader_register coord; const struct sm6_value *ptr, *src; enum vkd3d_shader_opcode op; @@ -4800,8 +4800,8 @@ static void sm6_parser_emit_binop(struct sm6_parser *sm6, struct function_emissi const struct dxil_record *record = state->record; enum vkd3d_shader_opcode opcode, aux_opcode; struct vkd3d_shader_src_param *src_params; - struct vkd3d_shader_dst_param *dst_params; struct vkd3d_shader_instruction *ins; + struct vsir_dst_operand *dst_params; uint32_t type_flags = 0, aux_id = 0; const struct sm6_value *a, *b; uint64_t code, flags; @@ -5017,7 +5017,7 @@ static bool sm6_parser_emit_reg_composite_construct(struct sm6_parser *sm6, { struct vkd3d_shader_instruction *ins = state->ins; struct vkd3d_shader_src_param *src_params; - struct vkd3d_shader_dst_param *dst_param; + struct vsir_dst_operand *dst_param; bool all_constant = true; unsigned int i; @@ -5304,9 +5304,9 @@ static void sm6_parser_emit_dx_atomic_binop(struct sm6_parser *sm6, enum dx_intr enum vkd3d_shader_resource_type resource_type; bool is_cmp_xchg = op == DX_ATOMIC_CMP_XCHG; unsigned int i, coord_idx, coord_count = 1; - struct vkd3d_shader_dst_param *dst_params; struct vkd3d_shader_src_param *src_params; struct vkd3d_shader_instruction *ins; + struct vsir_dst_operand *dst_params; const struct sm6_value *resource; struct vkd3d_shader_register reg; enum vkd3d_shader_opcode opcode; @@ -5491,8 +5491,8 @@ static void sm6_parser_emit_dx_cbuffer_load(struct sm6_parser *sm6, enum dx_intr static void sm6_parser_dcl_register_builtin(struct sm6_parser *dxil, enum vkd3d_shader_opcode opcode, enum vkd3d_shader_register_type reg_type, enum vsir_data_type data_type, unsigned int component_count) { - struct vkd3d_shader_dst_param *dst_param; struct vkd3d_shader_instruction *ins; + struct vsir_dst_operand *dst_param; if (!bitmap_is_set(dxil->io_regs_declared, reg_type)) { @@ -5837,8 +5837,8 @@ static void sm6_parser_emit_dx_get_dimensions(struct sm6_parser *sm6, enum dx_in struct vkd3d_shader_src_param *src_params; unsigned int is_texture, component_count; enum dxil_resource_kind resource_kind; - struct vkd3d_shader_dst_param *dst; const struct sm6_value *resource; + struct vsir_dst_operand *dst; resource = operands[0]; if (!sm6_value_validate_is_handle(resource, sm6)) @@ -5943,9 +5943,9 @@ static void sm6_parser_emit_dx_load_input(struct sm6_parser *sm6, enum dx_intrin struct vkd3d_shader_instruction *ins = state->ins; struct vsir_program *program = sm6->program; unsigned int count, row_index, column_index; - const struct vkd3d_shader_dst_param *params; struct vkd3d_shader_src_param *src_param; const struct shader_signature *signature; + const struct vsir_dst_operand *params; const struct signature_element *e; row_index = sm6_value_get_constant_uint(operands[0], sm6); @@ -6124,8 +6124,8 @@ static void sm6_parser_emit_dx_raw_buffer_store(struct sm6_parser *sm6, enum dx_ { unsigned int write_mask, component_count, alignment = 0, operand_count; struct vkd3d_shader_src_param *src_params; - struct vkd3d_shader_dst_param *dst_param; struct vkd3d_shader_instruction *ins; + struct vsir_dst_operand *dst_param; struct vkd3d_shader_register data; const struct sm6_value *resource; bool raw; @@ -6235,10 +6235,10 @@ static void sm6_parser_emit_dx_buffer_store(struct sm6_parser *sm6, enum dx_intr const struct sm6_value **operands, struct function_emission_state *state) { struct vkd3d_shader_src_param *src_params; - struct vkd3d_shader_dst_param *dst_param; unsigned int write_mask, component_count; struct vkd3d_shader_instruction *ins; struct vkd3d_shader_register texel; + struct vsir_dst_operand *dst_param; const struct sm6_value *resource; resource = operands[0]; @@ -6514,9 +6514,9 @@ static void sm6_parser_emit_dx_store_output(struct sm6_parser *sm6, enum dx_intr struct vkd3d_shader_instruction *ins = state->ins; struct vsir_program *program = sm6->program; struct vkd3d_shader_src_param *src_param; - struct vkd3d_shader_dst_param *dst_param; const struct shader_signature *signature; unsigned int row_index, column_index; + struct vsir_dst_operand *dst_param; const struct signature_element *e; const struct sm6_value *value; @@ -6686,9 +6686,9 @@ static void sm6_parser_emit_dx_texture_store(struct sm6_parser *sm6, enum dx_int { struct vkd3d_shader_register coord, texel; struct vkd3d_shader_src_param *src_params; - struct vkd3d_shader_dst_param *dst_param; unsigned int write_mask, component_count; struct vkd3d_shader_instruction *ins; + struct vsir_dst_operand *dst_param; const struct sm6_value *resource; resource = operands[0]; @@ -7521,9 +7521,9 @@ static void sm6_parser_emit_cmpxchg(struct sm6_parser *sm6, const struct dxil_re struct vkd3d_shader_instruction *ins, struct sm6_value *dst) { uint64_t success_ordering, failure_ordering; - struct vkd3d_shader_dst_param *dst_params; struct vkd3d_shader_src_param *src_params; const struct sm6_value *ptr, *cmp, *new; + struct vsir_dst_operand *dst_params; struct vkd3d_shader_register reg; unsigned int i = 0; bool is_volatile; @@ -7965,7 +7965,7 @@ static void sm6_parser_emit_store(struct sm6_parser *sm6, const struct dxil_reco { unsigned int i = 0, alignment, operand_count; struct vkd3d_shader_src_param *src_params; - struct vkd3d_shader_dst_param *dst_param; + struct vsir_dst_operand *dst_param; const struct sm6_value *ptr, *src; struct vkd3d_shader_register reg; uint64_t alignment_code; @@ -9534,7 +9534,7 @@ static void init_resource_declaration(struct vkd3d_shader_resource *resource, enum vkd3d_shader_register_type reg_type, enum vsir_data_type data_type, unsigned int id, const struct vkd3d_shader_register_range *range) { - struct vkd3d_shader_dst_param *param = &resource->reg; + struct vsir_dst_operand *param = &resource->reg; param->modifiers = 0; param->shift = 0; diff --git a/libs/vkd3d-shader/glsl.c b/libs/vkd3d-shader/glsl.c index 2e41a8609..0eee3e5bd 100644 --- a/libs/vkd3d-shader/glsl.c +++ b/libs/vkd3d-shader/glsl.c @@ -38,7 +38,7 @@ struct glsl_src struct glsl_dst { - const struct vkd3d_shader_dst_param *vsir; + const struct vsir_dst_operand *vsir; struct vkd3d_string_buffer *register_name; struct vkd3d_string_buffer *mask; }; @@ -431,7 +431,7 @@ static void glsl_dst_cleanup(struct glsl_dst *dst, struct vkd3d_string_buffer_ca } static uint32_t glsl_dst_init(struct glsl_dst *glsl_dst, struct vkd3d_glsl_generator *gen, - const struct vkd3d_shader_instruction *ins, const struct vkd3d_shader_dst_param *vsir_dst) + const struct vkd3d_shader_instruction *ins, const struct vsir_dst_operand *vsir_dst) { uint32_t write_mask = vsir_dst->write_mask; diff --git a/libs/vkd3d-shader/hlsl_codegen.c b/libs/vkd3d-shader/hlsl_codegen.c index 5f7760b2a..4141c74f3 100644 --- a/libs/vkd3d-shader/hlsl_codegen.c +++ b/libs/vkd3d-shader/hlsl_codegen.c @@ -9205,9 +9205,9 @@ static uint32_t generate_vsir_get_src_swizzle(uint32_t src_writemask, uint32_t d static void sm1_generate_vsir_constant_defs(struct hlsl_ctx *ctx, struct vsir_program *program, struct hlsl_block *block) { - struct vkd3d_shader_dst_param *dst_param; struct vkd3d_shader_src_param *src_param; struct vkd3d_shader_instruction *ins; + struct vsir_dst_operand *dst; unsigned int i, x; for (i = 0; i < ctx->constant_defs.count; ++i) @@ -9226,8 +9226,8 @@ static void sm1_generate_vsir_constant_defs(struct hlsl_ctx *ctx, struct vsir_pr return; } - dst_param = &ins->dst[0]; - vsir_register_init(&dst_param->reg, VKD3DSPR_CONST, VSIR_DATA_F32, 1); + dst = &ins->dst[0]; + vsir_register_init(&dst->reg, VKD3DSPR_CONST, VSIR_DATA_F32, 1); ins->dst[0].reg.dimension = VSIR_DIMENSION_VEC4; ins->dst[0].reg.idx[0].offset = constant_reg->index; ins->dst[0].write_mask = VKD3DSP_WRITEMASK_ALL; @@ -9250,10 +9250,10 @@ static void sm1_generate_vsir_sampler_dcls(struct hlsl_ctx *ctx, { enum vkd3d_shader_resource_type resource_type; struct vkd3d_shader_register_range *range; - struct vkd3d_shader_dst_param *dst_param; struct vkd3d_shader_semantic *semantic; struct vkd3d_shader_instruction *ins; enum hlsl_sampler_dim sampler_dim; + struct vsir_dst_operand *dst; struct hlsl_ir_var *var; unsigned int i, count; @@ -9304,14 +9304,14 @@ static void sm1_generate_vsir_sampler_dcls(struct hlsl_ctx *ctx, semantic = &ins->declaration.semantic; semantic->resource_type = resource_type; - dst_param = &semantic->resource.reg; - vsir_register_init(&dst_param->reg, VKD3DSPR_COMBINED_SAMPLER, VSIR_DATA_F32, 1); - dst_param->reg.dimension = VSIR_DIMENSION_NONE; - dst_param->reg.idx[0].offset = var->regs[HLSL_REGSET_SAMPLERS].index + i; - dst_param->write_mask = 0; + dst = &semantic->resource.reg; + vsir_register_init(&dst->reg, VKD3DSPR_COMBINED_SAMPLER, VSIR_DATA_F32, 1); + dst->reg.dimension = VSIR_DIMENSION_NONE; + dst->reg.idx[0].offset = var->regs[HLSL_REGSET_SAMPLERS].index + i; + dst->write_mask = 0; range = &semantic->resource.range; range->space = 0; - range->first = range->last = dst_param->reg.idx[0].offset; + range->first = range->last = dst->reg.idx[0].offset; } } } @@ -9659,23 +9659,24 @@ static bool sm4_generate_vsir_init_src_param_from_deref(struct hlsl_ctx *ctx, st return true; } -static bool sm4_generate_vsir_init_dst_param_from_deref(struct hlsl_ctx *ctx, struct vsir_program *program, - struct vkd3d_shader_dst_param *dst_param, const struct hlsl_deref *deref, +static bool sm4_generate_vsir_init_dst_operand_from_deref(struct hlsl_ctx *ctx, + struct vsir_program *program, struct vsir_dst_operand *dst, const struct hlsl_deref *deref, const struct vkd3d_shader_location *loc, unsigned int writemask) { uint32_t reg_writemask; - if (!sm4_generate_vsir_reg_from_deref(ctx, program, &dst_param->reg, ®_writemask, deref)) + if (!sm4_generate_vsir_reg_from_deref(ctx, program, &dst->reg, ®_writemask, deref)) return false; - dst_param->write_mask = hlsl_combine_writemasks(reg_writemask, writemask); + dst->write_mask = hlsl_combine_writemasks(reg_writemask, writemask); + return true; } -static void vsir_dst_from_hlsl_node(struct vkd3d_shader_dst_param *dst, +static void vsir_dst_from_hlsl_node(struct vsir_dst_operand *dst, struct hlsl_ctx *ctx, const struct hlsl_ir_node *instr) { VKD3D_ASSERT(instr->reg.allocated); - vsir_dst_param_init(dst, instr->reg.type, vsir_data_type_from_hlsl_instruction(ctx, instr), 1); + vsir_dst_operand_init(dst, instr->reg.type, vsir_data_type_from_hlsl_instruction(ctx, instr), 1); dst->reg.idx[0].offset = instr->reg.id; dst->reg.dimension = VSIR_DIMENSION_VEC4; dst->write_mask = instr->reg.writemask; @@ -9728,10 +9729,10 @@ static void generate_vsir_instr_expr_single_instr_op(struct hlsl_ctx *ctx, uint32_t src_mod, uint32_t dst_mod, bool map_src_swizzles) { struct hlsl_ir_node *instr = &expr->node; - struct vkd3d_shader_dst_param *dst_param; struct vkd3d_shader_src_param *src_param; struct vkd3d_shader_instruction *ins; unsigned int i, src_count = 0; + struct vsir_dst_operand *dst; VKD3D_ASSERT(instr->reg.allocated); @@ -9745,9 +9746,9 @@ static void generate_vsir_instr_expr_single_instr_op(struct hlsl_ctx *ctx, if (!(ins = generate_vsir_add_program_instruction(ctx, program, &instr->loc, opcode, 1, src_count))) return; - dst_param = &ins->dst[0]; - vsir_dst_from_hlsl_node(dst_param, ctx, instr); - dst_param->modifiers = dst_mod; + dst = &ins->dst[0]; + vsir_dst_from_hlsl_node(dst, ctx, instr); + dst->modifiers = dst_mod; for (i = 0; i < src_count; ++i) { @@ -9755,7 +9756,7 @@ static void generate_vsir_instr_expr_single_instr_op(struct hlsl_ctx *ctx, src_param = &ins->src[i]; vsir_src_from_hlsl_node(src_param, ctx, operand, - map_src_swizzles ? dst_param->write_mask : VKD3DSP_WRITEMASK_ALL); + map_src_swizzles ? dst->write_mask : VKD3DSP_WRITEMASK_ALL); src_param->modifiers = src_mod; } } @@ -9767,9 +9768,9 @@ static void sm1_generate_vsir_instr_expr_per_component_instr_op(struct hlsl_ctx { struct hlsl_ir_node *operand = expr->operands[0].node; struct hlsl_ir_node *instr = &expr->node; - struct vkd3d_shader_dst_param *dst_param; struct vkd3d_shader_src_param *src_param; struct vkd3d_shader_instruction *ins; + struct vsir_dst_operand *dst; uint32_t src_swizzle; unsigned int i, c; @@ -9784,11 +9785,11 @@ static void sm1_generate_vsir_instr_expr_per_component_instr_op(struct hlsl_ctx if (!(ins = generate_vsir_add_program_instruction(ctx, program, &instr->loc, opcode, 1, 1))) return; - dst_param = &ins->dst[0]; - vsir_register_init(&dst_param->reg, instr->reg.type, VSIR_DATA_F32, 1); - dst_param->reg.idx[0].offset = instr->reg.id; - dst_param->reg.dimension = VSIR_DIMENSION_VEC4; - dst_param->write_mask = 1u << i; + dst = &ins->dst[0]; + vsir_register_init(&dst->reg, instr->reg.type, VSIR_DATA_F32, 1); + dst->reg.idx[0].offset = instr->reg.id; + dst->reg.dimension = VSIR_DIMENSION_VEC4; + dst->write_mask = 1u << i; src_param = &ins->src[0]; vsir_register_init(&src_param->reg, operand->reg.type, VSIR_DATA_F32, 1); @@ -10101,9 +10102,8 @@ err: return false; } -static void sm1_generate_vsir_init_dst_param_from_deref(struct hlsl_ctx *ctx, - struct vkd3d_shader_dst_param *dst_param, struct hlsl_deref *deref, - const struct vkd3d_shader_location *loc, unsigned int writemask) +static void sm1_generate_vsir_init_dst_operand_from_deref(struct hlsl_ctx *ctx, struct vsir_dst_operand *dst, + struct hlsl_deref *deref, const struct vkd3d_shader_location *loc, unsigned int writemask) { enum vkd3d_shader_register_type type = VKD3DSPR_TEMP; struct vkd3d_shader_version version; @@ -10150,16 +10150,16 @@ static void sm1_generate_vsir_init_dst_param_from_deref(struct hlsl_ctx *ctx, if (type == VKD3DSPR_DEPTHOUT) { - vsir_register_init(&dst_param->reg, type, VSIR_DATA_F32, 0); - dst_param->reg.dimension = VSIR_DIMENSION_SCALAR; + vsir_register_init(&dst->reg, type, VSIR_DATA_F32, 0); + dst->reg.dimension = VSIR_DIMENSION_SCALAR; } else { - vsir_register_init(&dst_param->reg, type, VSIR_DATA_F32, 1); - dst_param->reg.idx[0].offset = register_index; - dst_param->reg.dimension = VSIR_DIMENSION_VEC4; + vsir_register_init(&dst->reg, type, VSIR_DATA_F32, 1); + dst->reg.idx[0].offset = register_index; + dst->reg.dimension = VSIR_DIMENSION_VEC4; } - dst_param->write_mask = writemask; + dst->write_mask = writemask; if (deref->rel_offset.node) hlsl_fixme(ctx, loc, "Translate relative addressing on dst register for vsir."); @@ -10169,17 +10169,17 @@ static void sm1_generate_vsir_instr_mova(struct hlsl_ctx *ctx, struct vsir_program *program, struct hlsl_ir_node *instr) { enum vkd3d_shader_opcode opcode = hlsl_version_ge(ctx, 2, 0) ? VSIR_OP_MOVA : VSIR_OP_MOV; - struct vkd3d_shader_dst_param *dst_param; struct vkd3d_shader_instruction *ins; + struct vsir_dst_operand *dst; VKD3D_ASSERT(instr->reg.allocated); if (!(ins = generate_vsir_add_program_instruction(ctx, program, &instr->loc, opcode, 1, 1))) return; - dst_param = &ins->dst[0]; - vsir_register_init(&dst_param->reg, VKD3DSPR_ADDR, VSIR_DATA_F32, 0); - dst_param->write_mask = VKD3DSP_WRITEMASK_0; + dst = &ins->dst[0]; + vsir_register_init(&dst->reg, VKD3DSPR_ADDR, VSIR_DATA_F32, 0); + dst->write_mask = VKD3DSP_WRITEMASK_0; VKD3D_ASSERT(instr->data_type->class <= HLSL_CLASS_VECTOR); VKD3D_ASSERT(instr->data_type->e.numeric.dimx == 1); @@ -10409,7 +10409,7 @@ static void sm1_generate_vsir_instr_store(struct hlsl_ctx *ctx, struct vsir_prog if (!(ins = generate_vsir_add_program_instruction(ctx, program, &instr->loc, VSIR_OP_MOV, 1, 1))) return; - sm1_generate_vsir_init_dst_param_from_deref(ctx, &ins->dst[0], &store->lhs, &ins->location, store->writemask); + sm1_generate_vsir_init_dst_operand_from_deref(ctx, &ins->dst[0], &store->lhs, &ins->location, store->writemask); src_param = &ins->src[0]; vsir_src_from_hlsl_node(src_param, ctx, rhs, ins->dst[0].write_mask); @@ -11051,10 +11051,10 @@ static void sm4_generate_vsir_instr_dcl_semantic(struct hlsl_ctx *ctx, struct vs const bool is_primitive = hlsl_type_is_primitive_array(var->data_type); const bool output = var->is_output_semantic; enum vkd3d_shader_sysval_semantic semantic; - struct vkd3d_shader_dst_param *dst_param; struct vkd3d_shader_instruction *ins; enum vkd3d_shader_register_type type; enum vkd3d_shader_opcode opcode; + struct vsir_dst_operand *dst; unsigned int idx = 0; uint32_t write_mask; bool has_idx; @@ -11133,44 +11133,44 @@ static void sm4_generate_vsir_instr_dcl_semantic(struct hlsl_ctx *ctx, struct vs { VKD3D_ASSERT(semantic == VKD3D_SHADER_SV_NONE || semantic == VKD3D_SHADER_SV_TARGET || version->type == VKD3D_SHADER_TYPE_HULL || type != VKD3DSPR_OUTPUT); - dst_param = &ins->declaration.dst; + dst = &ins->declaration.dst; } else if (opcode == VSIR_OP_DCL_INPUT || opcode == VSIR_OP_DCL_INPUT_PS) { VKD3D_ASSERT(semantic == VKD3D_SHADER_SV_NONE || is_primitive || version->type == VKD3D_SHADER_TYPE_GEOMETRY); - dst_param = &ins->declaration.dst; + dst = &ins->declaration.dst; } else { VKD3D_ASSERT(semantic != VKD3D_SHADER_SV_NONE); ins->declaration.register_semantic.sysval_semantic = vkd3d_siv_from_sysval_indexed(semantic, var->semantic.index); - dst_param = &ins->declaration.register_semantic.reg; + dst = &ins->declaration.register_semantic.reg; } if (is_primitive) { VKD3D_ASSERT(has_idx); - vsir_register_init(&dst_param->reg, type, VSIR_DATA_F32, 2); - dst_param->reg.idx[0].offset = var->data_type->e.array.elements_count; - dst_param->reg.idx[1].offset = idx; + vsir_register_init(&dst->reg, type, VSIR_DATA_F32, 2); + dst->reg.idx[0].offset = var->data_type->e.array.elements_count; + dst->reg.idx[1].offset = idx; } else if (has_idx) { - vsir_register_init(&dst_param->reg, type, VSIR_DATA_F32, 1); - dst_param->reg.idx[0].offset = idx; + vsir_register_init(&dst->reg, type, VSIR_DATA_F32, 1); + dst->reg.idx[0].offset = idx; } else { - vsir_register_init(&dst_param->reg, type, VSIR_DATA_F32, 0); + vsir_register_init(&dst->reg, type, VSIR_DATA_F32, 0); } - if (shader_sm4_is_scalar_register(&dst_param->reg)) - dst_param->reg.dimension = VSIR_DIMENSION_SCALAR; + if (shader_sm4_is_scalar_register(&dst->reg)) + dst->reg.dimension = VSIR_DIMENSION_SCALAR; else - dst_param->reg.dimension = VSIR_DIMENSION_VEC4; + dst->reg.dimension = VSIR_DIMENSION_VEC4; - dst_param->write_mask = write_mask; + dst->write_mask = write_mask; if (var->is_input_semantic && version->type == VKD3D_SHADER_TYPE_PIXEL) ins->flags = get_interpolation_mode(version, var->data_type, var->storage_modifiers); @@ -11214,20 +11214,20 @@ static void sm4_generate_vsir_cast_from_bool(struct hlsl_ctx *ctx, struct vsir_p { struct hlsl_ir_node *operand = expr->operands[0].node; const struct hlsl_ir_node *instr = &expr->node; - struct vkd3d_shader_dst_param *dst_param; struct hlsl_constant_value value = {0}; struct vkd3d_shader_instruction *ins; + struct vsir_dst_operand *dst; VKD3D_ASSERT(instr->reg.allocated); if (!(ins = generate_vsir_add_program_instruction(ctx, program, &instr->loc, VSIR_OP_AND, 1, 2))) return; - dst_param = &ins->dst[0]; - vsir_dst_from_hlsl_node(dst_param, ctx, instr); + dst = &ins->dst[0]; + vsir_dst_from_hlsl_node(dst, ctx, instr); ins->dst[0].reg.data_type = VSIR_DATA_U32; - vsir_src_from_hlsl_node(&ins->src[0], ctx, operand, dst_param->write_mask); + vsir_src_from_hlsl_node(&ins->src[0], ctx, operand, dst->write_mask); value.u[0].u = bits; vsir_src_from_hlsl_constant_value(&ins->src[1], ctx, &value, VSIR_DATA_U32, 1, 0); @@ -11344,8 +11344,8 @@ static void sm4_generate_vsir_expr_with_two_destinations(struct hlsl_ctx *ctx, s enum vkd3d_shader_opcode opcode, const struct hlsl_ir_expr *expr, unsigned int dst_idx) { const struct hlsl_ir_node *instr = &expr->node; - struct vkd3d_shader_dst_param *dst_param; struct vkd3d_shader_instruction *ins; + struct vsir_dst_operand *dst; unsigned int i, src_count; VKD3D_ASSERT(instr->reg.allocated); @@ -11359,13 +11359,13 @@ static void sm4_generate_vsir_expr_with_two_destinations(struct hlsl_ctx *ctx, s if (!(ins = generate_vsir_add_program_instruction(ctx, program, &instr->loc, opcode, 2, src_count))) return; - dst_param = &ins->dst[dst_idx]; - vsir_dst_from_hlsl_node(dst_param, ctx, instr); + dst = &ins->dst[dst_idx]; + vsir_dst_from_hlsl_node(dst, ctx, instr); - vsir_dst_param_init_null(&ins->dst[1 - dst_idx]); + vsir_dst_operand_init_null(&ins->dst[1 - dst_idx]); for (i = 0; i < src_count; ++i) - vsir_src_from_hlsl_node(&ins->src[i], ctx, expr->operands[i].node, dst_param->write_mask); + vsir_src_from_hlsl_node(&ins->src[i], ctx, expr->operands[i].node, dst->write_mask); } static void sm4_generate_vsir_rcp_using_div(struct hlsl_ctx *ctx, @@ -11373,26 +11373,26 @@ static void sm4_generate_vsir_rcp_using_div(struct hlsl_ctx *ctx, { struct hlsl_ir_node *operand = expr->operands[0].node; const struct hlsl_ir_node *instr = &expr->node; - struct vkd3d_shader_dst_param *dst_param; struct hlsl_constant_value value = {0}; struct vkd3d_shader_instruction *ins; + struct vsir_dst_operand *dst; VKD3D_ASSERT(type_is_float(expr->node.data_type)); if (!(ins = generate_vsir_add_program_instruction(ctx, program, &instr->loc, VSIR_OP_DIV, 1, 2))) return; - dst_param = &ins->dst[0]; - vsir_dst_from_hlsl_node(dst_param, ctx, instr); + dst = &ins->dst[0]; + vsir_dst_from_hlsl_node(dst, ctx, instr); value.u[0].f = 1.0f; value.u[1].f = 1.0f; value.u[2].f = 1.0f; value.u[3].f = 1.0f; vsir_src_from_hlsl_constant_value(&ins->src[0], ctx, &value, - VSIR_DATA_F32, instr->data_type->e.numeric.dimx, dst_param->write_mask); + VSIR_DATA_F32, instr->data_type->e.numeric.dimx, dst->write_mask); - vsir_src_from_hlsl_node(&ins->src[1], ctx, operand, dst_param->write_mask); + vsir_src_from_hlsl_node(&ins->src[1], ctx, operand, dst->write_mask); } static bool sm4_generate_vsir_instr_expr(struct hlsl_ctx *ctx, @@ -11892,22 +11892,22 @@ static bool sm4_generate_vsir_instr_store(struct hlsl_ctx *ctx, struct vsir_program *program, struct hlsl_ir_store *store) { struct hlsl_ir_node *instr = &store->node; - struct vkd3d_shader_dst_param *dst_param; struct vkd3d_shader_src_param *src_param; struct vkd3d_shader_instruction *ins; + struct vsir_dst_operand *dst; VKD3D_ASSERT(!store->lhs.var->is_tgsm); if (!(ins = generate_vsir_add_program_instruction(ctx, program, &instr->loc, VSIR_OP_MOV, 1, 1))) return false; - dst_param = &ins->dst[0]; - if (!sm4_generate_vsir_init_dst_param_from_deref(ctx, program, - dst_param, &store->lhs, &instr->loc, store->writemask)) + dst = &ins->dst[0]; + if (!sm4_generate_vsir_init_dst_operand_from_deref(ctx, program, + dst, &store->lhs, &instr->loc, store->writemask)) return false; src_param = &ins->src[0]; - vsir_src_from_hlsl_node(src_param, ctx, store->rhs.node, dst_param->write_mask); + vsir_src_from_hlsl_node(src_param, ctx, store->rhs.node, dst->write_mask); return true; } @@ -11927,10 +11927,10 @@ static bool sm4_generate_vsir_instr_load(struct hlsl_ctx *ctx, struct vsir_progr { const struct vkd3d_shader_version *version = &program->shader_version; const struct hlsl_type *type = load->node.data_type; - struct vkd3d_shader_dst_param *dst_param; struct hlsl_ir_node *instr = &load->node; struct vkd3d_shader_instruction *ins; struct hlsl_constant_value value; + struct vsir_dst_operand *dst; VKD3D_ASSERT(!load->src.var->is_tgsm); VKD3D_ASSERT(hlsl_is_numeric_type(type)); @@ -11942,30 +11942,30 @@ static bool sm4_generate_vsir_instr_load(struct hlsl_ctx *ctx, struct vsir_progr if (!(ins = generate_vsir_add_program_instruction(ctx, program, &instr->loc, VSIR_OP_MOVC, 1, 3))) return false; - dst_param = &ins->dst[0]; - vsir_dst_from_hlsl_node(dst_param, ctx, instr); + dst = &ins->dst[0]; + vsir_dst_from_hlsl_node(dst, ctx, instr); if (!sm4_generate_vsir_init_src_param_from_deref(ctx, program, - &ins->src[0], &load->src, dst_param->write_mask, &instr->loc)) + &ins->src[0], &load->src, dst->write_mask, &instr->loc)) return false; memset(&value, 0xff, sizeof(value)); vsir_src_from_hlsl_constant_value(&ins->src[1], ctx, &value, - VSIR_DATA_U32, type->e.numeric.dimx, dst_param->write_mask); + VSIR_DATA_U32, type->e.numeric.dimx, dst->write_mask); memset(&value, 0x00, sizeof(value)); vsir_src_from_hlsl_constant_value(&ins->src[2], ctx, &value, - VSIR_DATA_U32, type->e.numeric.dimx, dst_param->write_mask); + VSIR_DATA_U32, type->e.numeric.dimx, dst->write_mask); } else { if (!(ins = generate_vsir_add_program_instruction(ctx, program, &instr->loc, VSIR_OP_MOV, 1, 1))) return false; - dst_param = &ins->dst[0]; - vsir_dst_from_hlsl_node(dst_param, ctx, instr); + dst = &ins->dst[0]; + vsir_dst_from_hlsl_node(dst, ctx, instr); if (!sm4_generate_vsir_init_src_param_from_deref(ctx, program, - &ins->src[0], &load->src, dst_param->write_mask, &instr->loc)) + &ins->src[0], &load->src, dst->write_mask, &instr->loc)) return false; } return true; @@ -12028,8 +12028,8 @@ static bool sm4_generate_vsir_instr_resource_store(struct hlsl_ctx *ctx, if (!(ins = generate_vsir_add_program_instruction(ctx, program, &instr->loc, VSIR_OP_STORE_RAW, 1, 2))) return false; - if (!sm4_generate_vsir_init_dst_param_from_deref(ctx, program, &ins->dst[0], - &store->resource, &instr->loc, store->writemask)) + if (!sm4_generate_vsir_init_dst_operand_from_deref(ctx, program, + &ins->dst[0], &store->resource, &instr->loc, store->writemask)) return false; } else @@ -12037,7 +12037,7 @@ static bool sm4_generate_vsir_instr_resource_store(struct hlsl_ctx *ctx, if (!(ins = generate_vsir_add_program_instruction(ctx, program, &instr->loc, VSIR_OP_STORE_UAV_TYPED, 1, 2))) return false; - if (!sm4_generate_vsir_init_dst_param_from_deref(ctx, program, + if (!sm4_generate_vsir_init_dst_operand_from_deref(ctx, program, &ins->dst[0], &store->resource, &instr->loc, VKD3DSP_WRITEMASK_ALL)) return false; } @@ -12498,9 +12498,9 @@ static bool sm4_generate_vsir_instr_interlocked(struct hlsl_ctx *ctx, struct hlsl_ir_node *coords = interlocked->coords.node; struct hlsl_ir_node *instr = &interlocked->node; bool is_imm = interlocked->node.reg.allocated; - struct vkd3d_shader_dst_param *dst_param; struct vkd3d_shader_instruction *ins; enum vkd3d_shader_opcode opcode; + struct vsir_dst_operand *dst; opcode = is_imm ? imm_opcodes[interlocked->op] : opcodes[interlocked->op]; @@ -12523,10 +12523,10 @@ static bool sm4_generate_vsir_instr_interlocked(struct hlsl_ctx *ctx, if (is_imm) vsir_dst_from_hlsl_node(&ins->dst[0], ctx, instr); - dst_param = is_imm ? &ins->dst[1] : &ins->dst[0]; - if (!sm4_generate_vsir_init_dst_param_from_deref(ctx, program, dst_param, &interlocked->dst, &instr->loc, 0)) + dst = is_imm ? &ins->dst[1] : &ins->dst[0]; + if (!sm4_generate_vsir_init_dst_operand_from_deref(ctx, program, dst, &interlocked->dst, &instr->loc, 0)) return false; - dst_param->reg.dimension = VSIR_DIMENSION_NONE; + dst->reg.dimension = VSIR_DIMENSION_NONE; vsir_src_from_hlsl_node(&ins->src[0], ctx, coords, VKD3DSP_WRITEMASK_ALL); if (cmp_value) @@ -13276,7 +13276,7 @@ static void sm4_generate_vsir_add_dcl_texture(struct hlsl_ctx *ctx, else vsir_resource = &ins->declaration.semantic.resource; - vsir_dst_param_init(&vsir_resource->reg, uav ? VKD3DSPR_UAV : VKD3DSPR_RESOURCE, VSIR_DATA_UNUSED, 0); + vsir_dst_operand_init(&vsir_resource->reg, uav ? VKD3DSPR_UAV : VKD3DSPR_RESOURCE, VSIR_DATA_UNUSED, 0); if (uav && component_type->e.resource.rasteriser_ordered) ins->flags = VKD3DSUF_RASTERISER_ORDERED_VIEW; @@ -13326,8 +13326,8 @@ static void sm4_generate_vsir_add_dcl_texture(struct hlsl_ctx *ctx, static void sm4_generate_vsir_add_dcl_tgsm(struct hlsl_ctx *ctx, struct vsir_program *program, const struct hlsl_ir_var *var) { - struct vkd3d_shader_dst_param *dst_param; struct vkd3d_shader_instruction *ins; + struct vsir_dst_operand *dst; if (!hlsl_is_numeric_type(var->data_type)) { @@ -13341,11 +13341,11 @@ static void sm4_generate_vsir_add_dcl_tgsm(struct hlsl_ctx *ctx, return; } - dst_param = &ins->declaration.tgsm_raw.reg; + dst = &ins->declaration.tgsm_raw.reg; - vsir_dst_param_init(dst_param, VKD3DSPR_GROUPSHAREDMEM, VSIR_DATA_F32, 1); - dst_param->reg.dimension = VSIR_DIMENSION_NONE; - dst_param->reg.idx[0].offset = var->regs[HLSL_REGSET_NUMERIC].id; + vsir_dst_operand_init(dst, VKD3DSPR_GROUPSHAREDMEM, VSIR_DATA_F32, 1); + dst->reg.dimension = VSIR_DIMENSION_NONE; + dst->reg.idx[0].offset = var->regs[HLSL_REGSET_NUMERIC].id; ins->declaration.tgsm_raw.byte_count = var->data_type->reg_size[HLSL_REGSET_NUMERIC] * 4; ins->declaration.tgsm_raw.zero_init = false; diff --git a/libs/vkd3d-shader/ir.c b/libs/vkd3d-shader/ir.c index 9c3daf333..f1fdfc111 100644 --- a/libs/vkd3d-shader/ir.c +++ b/libs/vkd3d-shader/ir.c @@ -543,23 +543,23 @@ static bool shader_register_clone_relative_addresses(struct vkd3d_shader_registe return true; } -static struct vkd3d_shader_dst_param *vsir_program_clone_dst_params( - struct vsir_program *program, const struct vkd3d_shader_dst_param *params, size_t count) +static struct vsir_dst_operand *vsir_program_clone_dst_operands( + struct vsir_program *program, const struct vsir_dst_operand *operands, size_t count) { - struct vkd3d_shader_dst_param *dst_params; + struct vsir_dst_operand *ret; size_t i; - if (!(dst_params = vsir_program_get_dst_params(program, count))) + if (!(ret = vsir_program_get_dst_operands(program, count))) return NULL; - memcpy(dst_params, params, count * sizeof(*params)); + memcpy(ret, operands, count * sizeof(*operands)); for (i = 0; i < count; ++i) { - if (!shader_register_clone_relative_addresses(&dst_params[i].reg, program)) + if (!shader_register_clone_relative_addresses(&ret[i].reg, program)) return NULL; } - return dst_params; + return ret; } static struct vkd3d_shader_src_param *vsir_program_clone_src_params( @@ -667,7 +667,7 @@ bool vsir_program_init(struct vsir_program *program, const struct vkd3d_shader_c /* Size the parameter initial allocations so they are large enough for most shaders. The * code path for chained allocations will be tested if a few shaders need to use it. */ - shader_param_allocator_init(&program->dst_params, reserve - reserve / 8u, sizeof(struct vkd3d_shader_dst_param)); + shader_param_allocator_init(&program->dst_operands, reserve - reserve / 8u, sizeof(struct vsir_dst_operand)); shader_param_allocator_init(&program->src_params, reserve * 2u, sizeof(struct vkd3d_shader_src_param)); if (!shader_instruction_array_init(&program->instructions, reserve)) { @@ -697,7 +697,7 @@ void vsir_program_cleanup(struct vsir_program *program) shader_signature_cleanup(&program->patch_constant_signature); vkd3d_shader_free_scan_descriptor_info1(&program->descriptors); shader_param_allocator_destroy(&program->src_params); - shader_param_allocator_destroy(&program->dst_params); + shader_param_allocator_destroy(&program->dst_operands); for (i = 0; i < program->icb_count; ++i) { vkd3d_free(program->icbs[i]); @@ -989,34 +989,34 @@ static void src_param_init_temp_uint(struct vkd3d_shader_src_param *src, unsigne src->reg.idx[0].offset = idx; } -void vsir_dst_param_init(struct vkd3d_shader_dst_param *param, enum vkd3d_shader_register_type reg_type, +void vsir_dst_operand_init(struct vsir_dst_operand *dst, enum vkd3d_shader_register_type reg_type, enum vsir_data_type data_type, unsigned int idx_count) { - vsir_register_init(¶m->reg, reg_type, data_type, idx_count); - param->write_mask = VKD3DSP_WRITEMASK_0; - param->modifiers = VKD3DSPDM_NONE; - param->shift = 0; + vsir_register_init(&dst->reg, reg_type, data_type, idx_count); + dst->write_mask = VKD3DSP_WRITEMASK_0; + dst->modifiers = VKD3DSPDM_NONE; + dst->shift = 0; } -static void vsir_dst_param_init_io(struct vkd3d_shader_dst_param *dst, enum vkd3d_shader_register_type reg_type, +static void vsir_dst_operand_init_io(struct vsir_dst_operand *dst, enum vkd3d_shader_register_type reg_type, const struct signature_element *e, unsigned int idx_count) { - vsir_dst_param_init(dst, reg_type, vsir_data_type_from_component_type(e->component_type), idx_count); + vsir_dst_operand_init(dst, reg_type, vsir_data_type_from_component_type(e->component_type), idx_count); dst->reg.dimension = VSIR_DIMENSION_VEC4; dst->write_mask = e->mask; } -void vsir_dst_param_init_null(struct vkd3d_shader_dst_param *dst) +void vsir_dst_operand_init_null(struct vsir_dst_operand *dst) { - vsir_dst_param_init(dst, VKD3DSPR_NULL, VSIR_DATA_UNUSED, 0); + vsir_dst_operand_init(dst, VKD3DSPR_NULL, VSIR_DATA_UNUSED, 0); dst->reg.dimension = VSIR_DIMENSION_NONE; dst->write_mask = 0; } -static void dst_param_init_ssa(struct vkd3d_shader_dst_param *dst, unsigned int idx, +static void vsir_dst_operand_init_ssa(struct vsir_dst_operand *dst, unsigned int idx, enum vsir_data_type data_type, enum vsir_dimension dimension) { - vsir_dst_param_init(dst, VKD3DSPR_SSA, data_type, 1); + vsir_dst_operand_init(dst, VKD3DSPR_SSA, data_type, 1); dst->reg.idx[0].offset = idx; if (dimension == VSIR_DIMENSION_VEC4) @@ -1026,50 +1026,50 @@ static void dst_param_init_ssa(struct vkd3d_shader_dst_param *dst, unsigned int } } -static void dst_param_init_ssa_scalar(struct vkd3d_shader_dst_param *dst, +static void vsir_dst_operand_init_ssa_scalar(struct vsir_dst_operand *dst, unsigned int idx, enum vsir_data_type data_type) { - dst_param_init_ssa(dst, idx, data_type, VSIR_DIMENSION_SCALAR); + vsir_dst_operand_init_ssa(dst, idx, data_type, VSIR_DIMENSION_SCALAR); } -static void dst_param_init_ssa_bool(struct vkd3d_shader_dst_param *dst, unsigned int idx) +static void vsir_dst_operand_init_ssa_bool(struct vsir_dst_operand *dst, unsigned int idx) { - dst_param_init_ssa_scalar(dst, idx, VSIR_DATA_BOOL); + vsir_dst_operand_init_ssa_scalar(dst, idx, VSIR_DATA_BOOL); } -static void dst_param_init_ssa_float(struct vkd3d_shader_dst_param *dst, unsigned int idx) +static void vsir_dst_operand_init_ssa_f32(struct vsir_dst_operand *dst, unsigned int idx) { - dst_param_init_ssa_scalar(dst, idx, VSIR_DATA_F32); + vsir_dst_operand_init_ssa_scalar(dst, idx, VSIR_DATA_F32); } -static void dst_param_init_ssa_float4(struct vkd3d_shader_dst_param *dst, unsigned int idx) +static void vsir_dst_operand_init_ssa_f32v4(struct vsir_dst_operand *dst, unsigned int idx) { - dst_param_init_ssa(dst, idx, VSIR_DATA_F32, VSIR_DIMENSION_VEC4); + vsir_dst_operand_init_ssa(dst, idx, VSIR_DATA_F32, VSIR_DIMENSION_VEC4); } -static void dst_param_init_temp_bool(struct vkd3d_shader_dst_param *dst, unsigned int idx) +static void vsir_dst_operand_init_temp_bool(struct vsir_dst_operand *dst, unsigned int idx) { - vsir_dst_param_init(dst, VKD3DSPR_TEMP, VSIR_DATA_BOOL, 1); + vsir_dst_operand_init(dst, VKD3DSPR_TEMP, VSIR_DATA_BOOL, 1); dst->reg.idx[0].offset = idx; } -static void dst_param_init_temp_float4(struct vkd3d_shader_dst_param *dst, unsigned int idx) +static void vsir_dst_operand_init_temp_f32v4(struct vsir_dst_operand *dst, unsigned int idx) { - vsir_dst_param_init(dst, VKD3DSPR_TEMP, VSIR_DATA_F32, 1); + vsir_dst_operand_init(dst, VKD3DSPR_TEMP, VSIR_DATA_F32, 1); dst->reg.idx[0].offset = idx; dst->reg.dimension = VSIR_DIMENSION_VEC4; } -static void dst_param_init_temp_uint(struct vkd3d_shader_dst_param *dst, unsigned int idx) +static void vsir_dst_operand_init_temp_u32(struct vsir_dst_operand *dst, unsigned int idx) { - vsir_dst_param_init(dst, VKD3DSPR_TEMP, VSIR_DATA_U32, 1); + vsir_dst_operand_init(dst, VKD3DSPR_TEMP, VSIR_DATA_U32, 1); dst->reg.idx[0].offset = idx; } -static void dst_param_init_output(struct vkd3d_shader_dst_param *dst, +static void vsir_dst_operand_init_output(struct vsir_dst_operand *dst, enum vsir_data_type data_type, uint32_t idx, uint32_t write_mask) { - vsir_dst_param_init(dst, VKD3DSPR_OUTPUT, data_type, 1); + vsir_dst_operand_init(dst, VKD3DSPR_OUTPUT, data_type, 1); dst->reg.idx[0].offset = idx; dst->reg.dimension = VSIR_DIMENSION_VEC4; dst->write_mask = write_mask; @@ -1094,7 +1094,7 @@ bool vsir_instruction_init_with_params(struct vsir_program *program, ins->dst_count = dst_count; ins->src_count = src_count; - if (!(ins->dst = vsir_program_get_dst_params(program, ins->dst_count))) + if (!(ins->dst = vsir_program_get_dst_operands(program, ins->dst_count))) { ERR("Failed to allocate %u destination parameters.\n", dst_count); return false; @@ -1144,7 +1144,7 @@ static bool vsir_program_iterator_clone_instruction(struct vsir_program *program *dst = *src; - if (dst->dst_count && !(dst->dst = vsir_program_clone_dst_params(program, dst->dst, dst->dst_count))) + if (dst->dst_count && !(dst->dst = vsir_program_clone_dst_operands(program, dst->dst, dst->dst_count))) return false; return !dst->src_count || (dst->src = vsir_program_clone_src_params(program, dst->src, dst->src_count)); @@ -1328,7 +1328,7 @@ static enum vkd3d_result vsir_program_lower_lrp(struct vsir_program *program, st struct vkd3d_shader_instruction *ins = vsir_program_iterator_current(lrp); const struct vkd3d_shader_location location = ins->location; const struct vkd3d_shader_src_param *src = ins->src; - const struct vkd3d_shader_dst_param *dst = ins->dst; + const struct vsir_dst_operand *dst = ins->dst; struct vsir_program_iterator it; unsigned int neg_id, mad_id; @@ -1343,14 +1343,14 @@ static enum vkd3d_result vsir_program_lower_lrp(struct vsir_program *program, st if (!vsir_instruction_init_with_params(program, ins, &location, VSIR_OP_NEG, 1, 1)) goto fail; neg_id = program->ssa_count++; - dst_param_init_ssa(&ins->dst[0], neg_id, src[0].reg.data_type, src[0].reg.dimension); + vsir_dst_operand_init_ssa(&ins->dst[0], neg_id, src[0].reg.data_type, src[0].reg.dimension); ins->src[0] = src[0]; ins = vsir_program_iterator_next(&it); if (!vsir_instruction_init_with_params(program, ins, &location, VSIR_OP_MAD, 1, 3)) goto fail; mad_id = program->ssa_count++; - dst_param_init_ssa(&ins->dst[0], mad_id, src[2].reg.data_type, src[2].reg.dimension); + vsir_dst_operand_init_ssa(&ins->dst[0], mad_id, src[2].reg.data_type, src[2].reg.dimension); src_param_init_ssa(&ins->src[0], neg_id, src[0].reg.data_type, src[0].reg.dimension); ins->src[1] = src[2]; ins->src[2] = src[2]; @@ -1376,7 +1376,7 @@ static enum vkd3d_result vsir_program_lower_nrm(struct vsir_program *program, st struct vkd3d_shader_instruction *ins = vsir_program_iterator_current(nrm); const struct vkd3d_shader_location location = ins->location; const struct vkd3d_shader_src_param *src = ins->src; - const struct vkd3d_shader_dst_param *dst = ins->dst; + const struct vsir_dst_operand *dst = ins->dst; unsigned int dot_id, rsq_id, mul_id; struct vsir_program_iterator it; @@ -1392,7 +1392,7 @@ static enum vkd3d_result vsir_program_lower_nrm(struct vsir_program *program, st if (!vsir_instruction_init_with_params(program, ins, &location, VSIR_OP_DP3, 1, 2)) goto fail; dot_id = program->ssa_count++; - dst_param_init_ssa(&ins->dst[0], dot_id, src[0].reg.data_type, VSIR_DIMENSION_SCALAR); + vsir_dst_operand_init_ssa(&ins->dst[0], dot_id, src[0].reg.data_type, VSIR_DIMENSION_SCALAR); ins->src[0] = src[0]; ins->src[1] = src[0]; @@ -1400,14 +1400,14 @@ static enum vkd3d_result vsir_program_lower_nrm(struct vsir_program *program, st if (!vsir_instruction_init_with_params(program, ins, &location, VSIR_OP_RSQ, 1, 1)) goto fail; rsq_id = program->ssa_count++; - dst_param_init_ssa(&ins->dst[0], rsq_id, src[0].reg.data_type, VSIR_DIMENSION_SCALAR); + vsir_dst_operand_init_ssa(&ins->dst[0], rsq_id, src[0].reg.data_type, VSIR_DIMENSION_SCALAR); src_param_init_ssa(&ins->src[0], dot_id, src[0].reg.data_type, VSIR_DIMENSION_SCALAR); ins = vsir_program_iterator_next(&it); if (!vsir_instruction_init_with_params(program, ins, &location, VSIR_OP_MUL, 1, 2)) goto fail; mul_id = program->ssa_count++; - dst_param_init_ssa(&ins->dst[0], mul_id, src[0].reg.data_type, dst[0].reg.dimension); + vsir_dst_operand_init_ssa(&ins->dst[0], mul_id, src[0].reg.data_type, dst[0].reg.dimension); src_param_init_ssa(&ins->src[0], rsq_id, src[0].reg.data_type, VSIR_DIMENSION_SCALAR); ins->src[1] = src[0]; @@ -1515,7 +1515,7 @@ static enum vkd3d_result vsir_program_lower_precise_mad(struct vsir_program *pro struct vsir_program_iterator *it) { struct vkd3d_shader_instruction *mad, *mul_ins, *add_ins; - struct vkd3d_shader_dst_param *mul_dst; + struct vsir_dst_operand *mul_dst; mad = vsir_program_iterator_current(it); @@ -1539,7 +1539,7 @@ static enum vkd3d_result vsir_program_lower_precise_mad(struct vsir_program *pro mul_dst = mul_ins->dst; *add_ins->dst = *mul_dst; - dst_param_init_ssa(mul_dst, program->ssa_count, mul_ins->src[0].reg.data_type, VSIR_DIMENSION_VEC4); + vsir_dst_operand_init_ssa(mul_dst, program->ssa_count, mul_ins->src[0].reg.data_type, VSIR_DIMENSION_VEC4); src_param_init_ssa(&add_ins->src[0], program->ssa_count++, mul_ins->src[0].reg.data_type, VSIR_DIMENSION_VEC4); add_ins->src[1] = mul_ins->src[2]; @@ -1598,7 +1598,7 @@ static enum vkd3d_result vsir_program_lower_udiv(struct vsir_program *program, mov->src[0] = udiv->src[0]; src0_id = program->ssa_count++; - dst_param_init_ssa(&mov->dst[0], src0_id, udiv->src[0].reg.data_type, udiv->src[0].reg.dimension); + vsir_dst_operand_init_ssa(&mov->dst[0], src0_id, udiv->src[0].reg.data_type, udiv->src[0].reg.dimension); mov = vsir_program_iterator_next(it); if (!(vsir_instruction_init_with_params(program, mov, &udiv->location, VSIR_OP_MOV, 1, 1))) @@ -1606,7 +1606,7 @@ static enum vkd3d_result vsir_program_lower_udiv(struct vsir_program *program, mov->src[0] = udiv->src[1]; src1_id = program->ssa_count++; - dst_param_init_ssa(&mov->dst[0], src1_id, udiv->src[1].reg.data_type, udiv->src[1].reg.dimension); + vsir_dst_operand_init_ssa(&mov->dst[0], src1_id, udiv->src[1].reg.data_type, udiv->src[1].reg.dimension); mov = vsir_program_iterator_next(it); if (!(vsir_instruction_init_with_params(program, mov, &udiv->location, VSIR_OP_MOVC, 1, 3))) @@ -1623,7 +1623,7 @@ static enum vkd3d_result vsir_program_lower_udiv(struct vsir_program *program, if (mov->src[2].reg.dimension == VSIR_DIMENSION_VEC4) mov->src[2].swizzle = VKD3D_SHADER_NO_SWIZZLE; divisor_id = program->ssa_count++; - dst_param_init_ssa(&mov->dst[0], divisor_id, mov->src[1].reg.data_type, mov->src[1].reg.dimension); + vsir_dst_operand_init_ssa(&mov->dst[0], divisor_id, mov->src[1].reg.data_type, mov->src[1].reg.dimension); if (udiv->dst[0].reg.type != VKD3DSPR_NULL) { @@ -1636,7 +1636,8 @@ static enum vkd3d_result vsir_program_lower_udiv(struct vsir_program *program, src_param_init_ssa(&ins->src[0], src0_id, udiv->src[0].reg.data_type, udiv->src[0].reg.dimension); src_param_init_ssa(&ins->src[1], divisor_id, udiv->src[1].reg.data_type, udiv->src[1].reg.dimension); - dst_param_init_ssa(&ins->dst[0], program->ssa_count, udiv->src[1].reg.data_type, udiv->src[1].reg.dimension); + vsir_dst_operand_init_ssa(&ins->dst[0], program->ssa_count, + udiv->src[1].reg.data_type, udiv->src[1].reg.dimension); /* Like its TPF equivalent, division by zero is well-defined for * VSIR_OP_UDIV, and returns UINT_MAX. Division by zero is undefined @@ -1671,7 +1672,8 @@ static enum vkd3d_result vsir_program_lower_udiv(struct vsir_program *program, src_param_init_ssa(&ins->src[0], src0_id, udiv->src[0].reg.data_type, udiv->src[0].reg.dimension); src_param_init_ssa(&ins->src[1], divisor_id, udiv->src[1].reg.data_type, udiv->src[1].reg.dimension); - dst_param_init_ssa(&ins->dst[0], program->ssa_count, udiv->src[1].reg.data_type, udiv->src[1].reg.dimension); + vsir_dst_operand_init_ssa(&ins->dst[0], program->ssa_count, + udiv->src[1].reg.data_type, udiv->src[1].reg.dimension); ins = vsir_program_iterator_next(it); if (!(vsir_instruction_init_with_params(program, ins, &udiv->location, VSIR_OP_MOVC, 1, 3))) @@ -1721,7 +1723,7 @@ static enum vkd3d_result vsir_program_lower_sm1_sincos(struct vsir_program *prog s = vsir_swizzle_get_component(sincos->src->swizzle, 0); mov->src[0].swizzle = vkd3d_shader_create_swizzle(s, s, s, s); - dst_param_init_ssa_scalar(&mov->dst[0], program->ssa_count, sincos->src[0].reg.data_type); + vsir_dst_operand_init_ssa_scalar(&mov->dst[0], program->ssa_count, sincos->src[0].reg.data_type); if (sincos->dst->write_mask & VKD3DSP_WRITEMASK_1) { @@ -1791,7 +1793,8 @@ static enum vkd3d_result vsir_program_lower_sm4_sincos(struct vsir_program *prog return VKD3D_ERROR_OUT_OF_MEMORY; mov->src[0] = sincos->src[0]; - dst_param_init_ssa(&mov->dst[0], program->ssa_count, sincos->src[0].reg.data_type, sincos->src[0].reg.dimension); + vsir_dst_operand_init_ssa(&mov->dst[0], program->ssa_count, + sincos->src[0].reg.data_type, sincos->src[0].reg.dimension); if (sincos->dst[0].reg.type != VKD3DSPR_NULL) { @@ -1919,7 +1922,7 @@ static enum vkd3d_result vsir_program_lower_texldp(struct vsir_program *program, if (!vsir_instruction_init_with_params(program, div_ins, &tex->location, VSIR_OP_DIV, 1, 2)) return VKD3D_ERROR_OUT_OF_MEMORY; - vsir_dst_param_init(&div_ins->dst[0], VKD3DSPR_TEMP, VSIR_DATA_F32, 1); + vsir_dst_operand_init(&div_ins->dst[0], VKD3DSPR_TEMP, VSIR_DATA_F32, 1); div_ins->dst[0].reg.dimension = VSIR_DIMENSION_VEC4; div_ins->dst[0].reg.idx[0].offset = *tmp_idx; div_ins->dst[0].write_mask = VKD3DSP_WRITEMASK_ALL; @@ -2100,7 +2103,7 @@ static enum vkd3d_result vsir_program_lower_tex(struct vsir_program *program, if (is_texture_projected(program, message_context, idx)) { - struct vkd3d_shader_dst_param *dst = ins->dst; + struct vsir_dst_operand *dst = ins->dst; uint32_t coords = program->ssa_count++; /* div sr0, t#, t#.w */ @@ -2111,7 +2114,7 @@ static enum vkd3d_result vsir_program_lower_tex(struct vsir_program *program, ins = vsir_program_iterator_current(it); if (!vsir_instruction_init_with_params(program, ins, &location, VSIR_OP_DIV, 1, 2)) return VKD3D_ERROR_OUT_OF_MEMORY; - dst_param_init_ssa_float4(&ins->dst[0], coords); + vsir_dst_operand_init_ssa_f32v4(&ins->dst[0], coords); vsir_src_param_init(&ins->src[0], VKD3DSPR_TEXTURE, VSIR_DATA_F32, 1); ins->src[0].reg.idx[0].offset = idx; ins->src[0].reg.dimension = VSIR_DIMENSION_VEC4; @@ -2204,7 +2207,7 @@ static struct vkd3d_shader_instruction *generate_bump_coords(struct vsir_program ins = vsir_program_iterator_current(it); if (!vsir_instruction_init_with_params(program, ins, loc, VSIR_OP_MAD, 1, 3)) return false; - dst_param_init_ssa_float4(&ins->dst[0], ssa_temp); + vsir_dst_operand_init_ssa_f32v4(&ins->dst[0], ssa_temp); ins->dst[0].write_mask = VKD3DSP_WRITEMASK_0 | VKD3DSP_WRITEMASK_1; ins->src[0] = *perturbation; ins->src[0].swizzle = vsir_combine_swizzles(perturbation->swizzle, VKD3D_SHADER_SWIZZLE(X, X, X, X)); @@ -2214,7 +2217,7 @@ static struct vkd3d_shader_instruction *generate_bump_coords(struct vsir_program ins = vsir_program_iterator_next(it); if (!vsir_instruction_init_with_params(program, ins, loc, VSIR_OP_MAD, 1, 3)) return false; - dst_param_init_ssa_float4(&ins->dst[0], ssa_coords); + vsir_dst_operand_init_ssa_f32v4(&ins->dst[0], ssa_coords); ins->dst[0].write_mask = VKD3DSP_WRITEMASK_0 | VKD3DSP_WRITEMASK_1; ins->src[0] = *perturbation; ins->src[0].swizzle = vsir_combine_swizzles(perturbation->swizzle, VKD3D_SHADER_SWIZZLE(Y, Y, Y, Y)); @@ -2231,7 +2234,7 @@ static enum vkd3d_result vsir_program_lower_bem(struct vsir_program *program, st struct vkd3d_shader_instruction *ins = vsir_program_iterator_current(it); const struct vkd3d_shader_location location = ins->location; const struct vkd3d_shader_src_param *src = ins->src; - const struct vkd3d_shader_dst_param *dst = ins->dst; + const struct vsir_dst_operand *dst = ins->dst; /* bem DST.xy, SRC0, SRC1 * -> @@ -2314,7 +2317,7 @@ static enum vkd3d_result vsir_program_lower_texbem(struct vsir_program *program, ins = vsir_program_iterator_current(it); if (!vsir_instruction_init_with_params(program, ins, &location, VSIR_OP_DIV, 1, 2)) return VKD3D_ERROR_OUT_OF_MEMORY; - dst_param_init_ssa_float4(&ins->dst[0], ssa_proj); + vsir_dst_operand_init_ssa_f32v4(&ins->dst[0], ssa_proj); ins->src[0] = orig_coords; ins->src[1] = ins->src[0]; ins->src[1].swizzle = VKD3D_SHADER_SWIZZLE(W, W, W, W); @@ -2331,7 +2334,7 @@ static enum vkd3d_result vsir_program_lower_texbem(struct vsir_program *program, ins = vsir_program_iterator_next(it); if (!vsir_instruction_init_with_params(program, ins, &location, VSIR_OP_SAMPLE, 1, 3)) return VKD3D_ERROR_OUT_OF_MEMORY; - vsir_dst_param_init(&ins->dst[0], VKD3DSPR_TEXTURE, VSIR_DATA_F32, 1); + vsir_dst_operand_init(&ins->dst[0], VKD3DSPR_TEXTURE, VSIR_DATA_F32, 1); ins->dst[0].reg.idx[0].offset = idx; ins->dst[0].reg.dimension = VSIR_DIMENSION_VEC4; ins->dst[0].write_mask = VKD3DSP_WRITEMASK_ALL; @@ -2348,12 +2351,12 @@ static enum vkd3d_result vsir_program_lower_texbem(struct vsir_program *program, ssa_luminance = program->ssa_count++; /* Replace t# destination of the SAMPLE instruction with an SSA value. */ - dst_param_init_ssa_float4(&ins->dst[0], ssa_sample); + vsir_dst_operand_init_ssa_f32v4(&ins->dst[0], ssa_sample); ins = vsir_program_iterator_next(it); if (!vsir_instruction_init_with_params(program, ins, &location, VSIR_OP_MAD, 1, 3)) return VKD3D_ERROR_OUT_OF_MEMORY; - dst_param_init_ssa_float4(&ins->dst[0], ssa_luminance); + vsir_dst_operand_init_ssa_f32v4(&ins->dst[0], ssa_luminance); ins->dst[0].write_mask = VKD3DSP_WRITEMASK_0; ins->src[0] = src[0]; ins->src[0].swizzle = vkd3d_shader_create_swizzle(z, z, z, z); @@ -2365,7 +2368,7 @@ static enum vkd3d_result vsir_program_lower_texbem(struct vsir_program *program, ins = vsir_program_iterator_next(it); if (!vsir_instruction_init_with_params(program, ins, &location, VSIR_OP_MUL, 1, 2)) return VKD3D_ERROR_OUT_OF_MEMORY; - vsir_dst_param_init(&ins->dst[0], VKD3DSPR_TEXTURE, VSIR_DATA_F32, 1); + vsir_dst_operand_init(&ins->dst[0], VKD3DSPR_TEXTURE, VSIR_DATA_F32, 1); ins->dst[0].reg.idx[0].offset = idx; ins->dst[0].reg.dimension = VSIR_DIMENSION_VEC4; ins->dst[0].write_mask = VKD3DSP_WRITEMASK_ALL; @@ -2604,7 +2607,8 @@ static enum vkd3d_result vsir_program_lower_modifiers(struct vsir_program *progr new_ins->src[0] = *src; new_ins->src[0].modifiers = VKD3DSPSM_NONE; - dst_param_init_ssa(&new_ins->dst[0], program->ssa_count, src->reg.data_type, src->reg.dimension); + vsir_dst_operand_init_ssa(&new_ins->dst[0], program->ssa_count, + src->reg.data_type, src->reg.dimension); src_param_init_ssa(src, program->ssa_count, src->reg.data_type, src->reg.dimension); if (data_type_is_64_bit(src->reg.data_type)) @@ -2619,7 +2623,7 @@ static enum vkd3d_result vsir_program_lower_modifiers(struct vsir_program *progr for (i = 0; i < ins->dst_count; ++i) { - struct vkd3d_shader_dst_param *dst = &ins->dst[i]; + struct vsir_dst_operand *dst = &ins->dst[i]; /* It is always legitimate to ignore _pp. */ dst->modifiers &= ~VKD3DSPDM_PARTIALPRECISION; @@ -2648,7 +2652,7 @@ static enum vkd3d_result vsir_program_lower_modifiers(struct vsir_program *progr new_ins->dst[0] = *dst; new_ins->dst[0].modifiers &= ~VKD3DSPDM_SATURATE; - dst_param_init_ssa(dst, program->ssa_count, dst->reg.data_type, dst->reg.dimension); + vsir_dst_operand_init_ssa(dst, program->ssa_count, dst->reg.data_type, dst->reg.dimension); src_param_init_ssa(&new_ins->src[0], program->ssa_count, dst->reg.data_type, dst->reg.dimension); if (data_type_is_64_bit(dst->reg.data_type)) @@ -2776,7 +2780,7 @@ static enum vkd3d_result vsir_program_lower_texture_writes(struct vsir_program * for (unsigned int i = 0; i < ins->dst_count; ++i) { - struct vkd3d_shader_dst_param *dst = &ins->dst[i]; + struct vsir_dst_operand *dst = &ins->dst[i]; if (dst->reg.type == VKD3DSPR_TEXTURE) { @@ -2846,7 +2850,7 @@ static enum vkd3d_result vsir_program_normalise_ps1_output(struct vsir_program * src_param_init_temp_float4(&ins->src[0], 0); ins->src[0].swizzle = VKD3D_SHADER_NO_SWIZZLE; - vsir_dst_param_init(&ins->dst[0], VKD3DSPR_COLOROUT, VSIR_DATA_F32, 1); + vsir_dst_operand_init(&ins->dst[0], VKD3DSPR_COLOROUT, VSIR_DATA_F32, 1); ins->dst[0].reg.idx[0].offset = 0; ins->dst[0].reg.dimension = VSIR_DIMENSION_VEC4; ins->dst[0].write_mask = VKD3DSP_WRITEMASK_ALL; @@ -2931,7 +2935,7 @@ static enum vkd3d_result vsir_program_ensure_diffuse(struct vsir_program *progra return VKD3D_ERROR_OUT_OF_MEMORY; vsir_instruction_init_with_params(program, ins, &loc, VSIR_OP_MOV, 1, 1); - vsir_dst_param_init(&ins->dst[0], VKD3DSPR_ATTROUT, VSIR_DATA_F32, 1); + vsir_dst_operand_init(&ins->dst[0], VKD3DSPR_ATTROUT, VSIR_DATA_F32, 1); ins->dst[0].reg.idx[0].offset = 0; ins->dst[0].reg.dimension = VSIR_DIMENSION_VEC4; ins->dst[0].write_mask = VKD3DSP_WRITEMASK_ALL & ~program->diffuse_written_mask; @@ -2989,7 +2993,7 @@ static bool target_allows_subset_masks(const struct vkd3d_shader_compile_info *i } static void remove_unread_output_components(const struct shader_signature *signature, - struct vkd3d_shader_instruction *ins, struct vkd3d_shader_dst_param *dst) + struct vkd3d_shader_instruction *ins, struct vsir_dst_operand *dst) { const struct signature_element *e; @@ -3022,7 +3026,7 @@ static void remove_unread_output_components(const struct shader_signature *signa if (ins->dst_count == 1) vkd3d_shader_instruction_make_nop(ins); else - vsir_dst_param_init_null(dst); + vsir_dst_operand_init_null(dst); } } @@ -3156,7 +3160,7 @@ static enum vkd3d_result vsir_program_remap_output_signature(struct vsir_program e = &signature->elements[j]; vsir_instruction_init_with_params(program, ins, &loc, VSIR_OP_MOV, 1, 1); - dst_param_init_output(&ins->dst[0], VSIR_DATA_F32, e->register_index, e->mask); + vsir_dst_operand_init_output(&ins->dst[0], VSIR_DATA_F32, e->register_index, e->mask); vsir_src_param_init(&ins->src[0], VKD3DSPR_IMMCONST, VSIR_DATA_F32, 0); ins->src[0].reg.dimension = VSIR_DIMENSION_VEC4; ins->src[0].swizzle = VKD3D_SHADER_NO_SWIZZLE; @@ -3415,10 +3419,10 @@ struct vkd3d_shader_src_param *vsir_program_create_outpointid_param(struct vsir_ return rel_addr; } -static void shader_dst_param_normalise_outpointid(struct vkd3d_shader_dst_param *dst_param, +static void vsir_dst_operand_normalise_outpointid(struct vsir_dst_operand *dst, struct control_point_normaliser *normaliser) { - struct vkd3d_shader_register *reg = &dst_param->reg; + struct vkd3d_shader_register *reg = &dst->reg; if (vsir_opcode_is_control_point_phase(normaliser->phase) && reg->type == VKD3DSPR_OUTPUT) { @@ -3456,7 +3460,7 @@ static enum vkd3d_result control_point_normaliser_emit_hs_input(struct control_p continue; vsir_instruction_init(ins, location, VSIR_OP_MOV); - ins->dst = vsir_program_get_dst_params(normaliser->program, 1); + ins->dst = vsir_program_get_dst_operands(normaliser->program, 1); ins->dst_count = 1; ins->src = vsir_program_get_src_params(normaliser->program, 1); ins->src_count = 1; @@ -3469,7 +3473,7 @@ static enum vkd3d_result control_point_normaliser_emit_hs_input(struct control_p VKD3D_ASSERT(normaliser->outpointid_param); - vsir_dst_param_init_io(&ins->dst[0], VKD3DSPR_OUTPUT, e, 2); + vsir_dst_operand_init_io(&ins->dst[0], VKD3DSPR_OUTPUT, e, 2); ins->dst[0].reg.dimension = VSIR_DIMENSION_VEC4; ins->dst[0].reg.idx[0].offset = 0; ins->dst[0].reg.idx[0].rel_addr = normaliser->outpointid_param; @@ -3530,7 +3534,9 @@ static enum vkd3d_result instruction_array_normalise_hull_shader_control_point_i if (vsir_instruction_is_dcl(ins)) break; for (j = 0; j < ins->dst_count; ++j) - shader_dst_param_normalise_outpointid(&ins->dst[j], &normaliser); + { + vsir_dst_operand_normalise_outpointid(&ins->dst[j], &normaliser); + } break; } } @@ -3589,9 +3595,9 @@ struct io_normaliser enum vkd3d_shader_opcode phase; - struct vkd3d_shader_dst_param *input_dcl_params[MAX_REG_OUTPUT]; - struct vkd3d_shader_dst_param *output_dcl_params[MAX_REG_OUTPUT]; - struct vkd3d_shader_dst_param *pc_dcl_params[MAX_REG_OUTPUT]; + struct vsir_dst_operand *input_dcl_params[MAX_REG_OUTPUT]; + struct vsir_dst_operand *output_dcl_params[MAX_REG_OUTPUT]; + struct vsir_dst_operand *pc_dcl_params[MAX_REG_OUTPUT]; struct io_normaliser_register_data input_range_map[MAX_REG_OUTPUT]; struct io_normaliser_register_data output_range_map[MAX_REG_OUTPUT]; struct io_normaliser_register_data pc_range_map[MAX_REG_OUTPUT]; @@ -3988,15 +3994,14 @@ static unsigned int shader_register_normalise_arrayed_addressing(struct vkd3d_sh return id_idx; } -static bool shader_dst_param_io_normalise(struct vkd3d_shader_dst_param *dst_param, - struct io_normaliser *normaliser) - { +static bool vsir_dst_operand_io_normalise(struct vsir_dst_operand *dst, struct io_normaliser *normaliser) +{ unsigned int id_idx, reg_idx, write_mask, element_idx; - struct vkd3d_shader_register *reg = &dst_param->reg; + struct vkd3d_shader_register *reg = &dst->reg; const struct shader_signature *signature; const struct signature_element *e; - write_mask = dst_param->write_mask; + write_mask = dst->write_mask; switch (reg->type) { @@ -4046,7 +4051,7 @@ static bool shader_dst_param_io_normalise(struct vkd3d_shader_dst_param *dst_par if (reg->idx[0].offset > 0) { write_mask = VKD3DSP_WRITEMASK_0; - dst_param->write_mask = write_mask; + dst->write_mask = write_mask; } /* Leave point size as a system value for the backends to consume. */ if (reg->idx[0].offset == VSIR_RASTOUT_POINT_SIZE) @@ -4179,7 +4184,9 @@ static void shader_instruction_normalise_io_params(struct vkd3d_shader_instructi if (vsir_instruction_is_dcl(ins)) break; for (i = 0; i < ins->dst_count; ++i) - shader_dst_param_io_normalise(&ins->dst[i], normaliser); + { + vsir_dst_operand_io_normalise(&ins->dst[i], normaliser); + } for (i = 0; i < ins->src_count; ++i) shader_src_param_io_normalise(&ins->src[i], normaliser, ins); break; @@ -5247,7 +5254,7 @@ static enum vkd3d_result vsir_program_lower_switch_to_selection_ladder(struct vs vkd3d_shader_instruction_make_nop(dst_ins); goto fail; } - dst_param_init_ssa_bool(&dst_ins->dst[0], ssa_count); + vsir_dst_operand_init_ssa_bool(&dst_ins->dst[0], ssa_count); dst_ins->src[0] = ins->src[0]; dst_ins->src[1] = ins->src[3 + 2 * j]; @@ -5356,7 +5363,7 @@ struct ssas_to_temps_block_info struct phi_incoming_to_temp { struct vkd3d_shader_src_param *src; - struct vkd3d_shader_dst_param *dst; + struct vsir_dst_operand *dst; } *incomings; size_t incoming_capacity; size_t incoming_count; @@ -7461,7 +7468,7 @@ static enum vkd3d_result vsir_cfg_structure_list_emit_loop(struct vsir_cfg *cfg, ++target->temp_count; - dst_param_init_temp_bool(&ins->dst[0], target->temp_count - 1); + vsir_dst_operand_init_temp_bool(&ins->dst[0], target->temp_count - 1); src_param_init_temp_uint(&ins->src[0], target->jump_target_temp_idx); src_param_init_const_uint(&ins->src[1], outer_continue_target); @@ -7484,7 +7491,7 @@ static enum vkd3d_result vsir_cfg_structure_list_emit_loop(struct vsir_cfg *cfg, ++target->temp_count; - dst_param_init_temp_bool(&ins->dst[0], target->temp_count - 1); + vsir_dst_operand_init_temp_bool(&ins->dst[0], target->temp_count - 1); src_param_init_temp_uint(&ins->src[0], target->jump_target_temp_idx); src_param_init_const_uint(&ins->src[1], inner_break_target); @@ -7595,7 +7602,7 @@ static enum vkd3d_result vsir_cfg_structure_list_emit_jump(struct vsir_cfg *cfg, return VKD3D_ERROR_OUT_OF_MEMORY; } - dst_param_init_temp_uint(&ins->dst[0], target->jump_target_temp_idx); + vsir_dst_operand_init_temp_u32(&ins->dst[0], target->jump_target_temp_idx); src_param_init_const_uint(&ins->src[0], jump_target); } @@ -8045,7 +8052,7 @@ static enum vkd3d_result insert_alpha_test_before_ret(struct vsir_program *progr return VKD3D_ERROR_NOT_IMPLEMENTED; } - dst_param_init_ssa_bool(&ins->dst[0], program->ssa_count); + vsir_dst_operand_init_ssa_bool(&ins->dst[0], program->ssa_count); ins->src[opcodes[compare_func].swap ? 1 : 0].reg.dimension = VSIR_DIMENSION_VEC4; ins->src[opcodes[compare_func].swap ? 1 : 0].swizzle = VKD3D_SHADER_SWIZZLE(W, W, W, W); @@ -8058,7 +8065,7 @@ static enum vkd3d_result insert_alpha_test_before_ret(struct vsir_program *progr ins = vsir_program_iterator_next(it); vsir_instruction_init_with_params(program, ins, &loc, VSIR_OP_MOV, 1, 1); - vsir_dst_param_init(&ins->dst[0], VKD3DSPR_OUTPUT, VSIR_DATA_F32, 1); + vsir_dst_operand_init(&ins->dst[0], VKD3DSPR_OUTPUT, VSIR_DATA_F32, 1); ins->dst[0].reg.idx[0].offset = colour_signature_idx; ins->dst[0].reg.dimension = VSIR_DIMENSION_VEC4; ins->dst[0].write_mask = program->output_signature.elements[colour_signature_idx].mask; @@ -8136,7 +8143,7 @@ static enum vkd3d_result vsir_program_insert_alpha_test(struct vsir_program *pro for (size_t j = 0; j < ins->dst_count; ++j) { - struct vkd3d_shader_dst_param *dst = &ins->dst[j]; + struct vsir_dst_operand *dst = &ins->dst[j]; /* Note we run after I/O normalization. */ if (dst->reg.type == VKD3DSPR_OUTPUT && dst->reg.idx[0].offset == colour_signature_idx) @@ -8172,7 +8179,7 @@ static enum vkd3d_result insert_clip_planes_before_ret(struct vsir_program *prog ins->src[1].swizzle = VKD3D_SHADER_NO_SWIZZLE; ins->src[1].reg.dimension = VSIR_DIMENSION_VEC4; - vsir_dst_param_init(&ins->dst[0], VKD3DSPR_OUTPUT, VSIR_DATA_F32, 1); + vsir_dst_operand_init(&ins->dst[0], VKD3DSPR_OUTPUT, VSIR_DATA_F32, 1); if (output_idx < 4) ins->dst[0].reg.idx[0].offset = low_signature_idx; else @@ -8185,7 +8192,7 @@ static enum vkd3d_result insert_clip_planes_before_ret(struct vsir_program *prog } vsir_instruction_init_with_params(program, ins, &loc, VSIR_OP_MOV, 1, 1); - vsir_dst_param_init(&ins->dst[0], VKD3DSPR_OUTPUT, VSIR_DATA_F32, 1); + vsir_dst_operand_init(&ins->dst[0], VKD3DSPR_OUTPUT, VSIR_DATA_F32, 1); ins->dst[0].reg.idx[0].offset = position_signature_idx; ins->dst[0].reg.dimension = VSIR_DIMENSION_VEC4; ins->dst[0].write_mask = program->output_signature.elements[position_signature_idx].mask; @@ -8300,7 +8307,7 @@ static enum vkd3d_result vsir_program_insert_clip_planes(struct vsir_program *pr for (size_t j = 0; j < ins->dst_count; ++j) { - struct vkd3d_shader_dst_param *dst = &ins->dst[j]; + struct vsir_dst_operand *dst = &ins->dst[j]; /* Note we run after I/O normalization. */ if (dst->reg.type == VKD3DSPR_OUTPUT && dst->reg.idx[0].offset == position_signature_idx) @@ -8469,8 +8476,8 @@ static enum vkd3d_result sysval_array_normaliser_add_output_copy( { for (unsigned int k = 0; k < VKD3D_VEC4_SIZE; ++k) { - struct vkd3d_shader_dst_param *dst; struct vkd3d_shader_src_param *src; + struct vsir_dst_operand *dst; if (!(normaliser->regs[q].mask & (1u << k))) continue; @@ -8482,7 +8489,7 @@ static enum vkd3d_result sysval_array_normaliser_add_output_copy( return VKD3D_ERROR_OUT_OF_MEMORY; dst = &mov->dst[0]; - vsir_dst_param_init(dst, VKD3DSPR_OUTPUT, VSIR_DATA_F32, 2); + vsir_dst_operand_init(dst, VKD3DSPR_OUTPUT, VSIR_DATA_F32, 2); dst->reg.idx[0].offset = output_component_count++; dst->reg.idx[1].offset = normaliser->element_idx; dst->reg.dimension = VSIR_DIMENSION_VEC4; @@ -8569,8 +8576,8 @@ static enum vkd3d_result sysval_array_normaliser_add_input_copy( { for (unsigned int k = 0; k < VKD3D_VEC4_SIZE; ++k) { - struct vkd3d_shader_dst_param *dst; struct vkd3d_shader_src_param *src; + struct vsir_dst_operand *dst; if (!(normaliser->regs[q].mask & (1u << k))) continue; @@ -8579,7 +8586,7 @@ static enum vkd3d_result sysval_array_normaliser_add_input_copy( vsir_instruction_init_with_params(program, mov, &loc, VSIR_OP_MOV, 1, 1); dst = &mov->dst[0]; - vsir_dst_param_init(dst, VKD3DSPR_IDXTEMP, VSIR_DATA_F32, 2); + vsir_dst_operand_init(dst, VKD3DSPR_IDXTEMP, VSIR_DATA_F32, 2); dst->reg.idx[0].offset = normaliser->idxtemp_idx; dst->reg.idx[1].offset = p * normaliser->reg_count + q; dst->reg.dimension = VSIR_DIMENSION_VEC4; @@ -9068,7 +9075,7 @@ static enum vkd3d_result insert_point_size_before_ret(struct vsir_program *progr return VKD3D_ERROR_OUT_OF_MEMORY; vsir_instruction_init_with_params(program, ins, &loc, VSIR_OP_MOV, 1, 1); - vsir_dst_param_init(&ins->dst[0], VKD3DSPR_RASTOUT, VSIR_DATA_F32, 1); + vsir_dst_operand_init(&ins->dst[0], VKD3DSPR_RASTOUT, VSIR_DATA_F32, 1); ins->dst[0].reg.idx[0].offset = VSIR_RASTOUT_POINT_SIZE; src_param_init_parameter(&ins->src[0], VKD3D_SHADER_PARAMETER_NAME_POINT_SIZE, VSIR_DATA_F32); ins = vsir_program_iterator_next(it); @@ -9177,12 +9184,12 @@ static enum vkd3d_result vsir_program_insert_point_size_clamp(struct vsir_progra for (size_t j = 0; j < ins->dst_count; ++j) { - struct vkd3d_shader_dst_param *dst = &ins->dst[j]; + struct vsir_dst_operand *dst = &ins->dst[j]; /* Note we run after I/O normalization. */ if (dst->reg.type == VKD3DSPR_RASTOUT) { - dst_param_init_ssa_float(dst, program->ssa_count); + vsir_dst_operand_init_ssa_f32(dst, program->ssa_count); ssa_value = program->ssa_count++; clamp = true; } @@ -9204,12 +9211,12 @@ static enum vkd3d_result vsir_program_insert_point_size_clamp(struct vsir_progra src_param_init_parameter(&ins->src[1], VKD3D_SHADER_PARAMETER_NAME_POINT_SIZE_MIN, VSIR_DATA_F32); if (max_parameter) { - dst_param_init_ssa_float(&ins->dst[0], program->ssa_count); + vsir_dst_operand_init_ssa_f32(&ins->dst[0], program->ssa_count); ssa_value = program->ssa_count++; } else { - vsir_dst_param_init(&ins->dst[0], VKD3DSPR_RASTOUT, VSIR_DATA_F32, 1); + vsir_dst_operand_init(&ins->dst[0], VKD3DSPR_RASTOUT, VSIR_DATA_F32, 1); ins->dst[0].reg.idx[0].offset = VSIR_RASTOUT_POINT_SIZE; } ins = vsir_program_iterator_next(&it); @@ -9220,7 +9227,7 @@ static enum vkd3d_result vsir_program_insert_point_size_clamp(struct vsir_progra vsir_instruction_init_with_params(program, ins, loc, VSIR_OP_MIN, 1, 2); src_param_init_ssa_float(&ins->src[0], ssa_value); src_param_init_parameter(&ins->src[1], VKD3D_SHADER_PARAMETER_NAME_POINT_SIZE_MAX, VSIR_DATA_F32); - vsir_dst_param_init(&ins->dst[0], VKD3DSPR_RASTOUT, VSIR_DATA_F32, 1); + vsir_dst_operand_init(&ins->dst[0], VKD3DSPR_RASTOUT, VSIR_DATA_F32, 1); ins->dst[0].reg.idx[0].offset = VSIR_RASTOUT_POINT_SIZE; ins = vsir_program_iterator_next(&it); } @@ -9392,7 +9399,7 @@ static enum vkd3d_result vsir_program_insert_point_coord(struct vsir_program *pr return VKD3D_ERROR_OUT_OF_MEMORY; vsir_instruction_init_with_params(program, ins, &loc, VSIR_OP_MOV, 1, 1); - dst_param_init_temp_float4(&ins->dst[0], coord_temp); + vsir_dst_operand_init_temp_f32v4(&ins->dst[0], coord_temp); ins->dst[0].write_mask = VKD3DSP_WRITEMASK_0 | VKD3DSP_WRITEMASK_1; vsir_src_param_init(&ins->src[0], VKD3DSPR_POINT_COORD, VSIR_DATA_F32, 0); ins->src[0].reg.dimension = VSIR_DIMENSION_VEC4; @@ -9400,7 +9407,7 @@ static enum vkd3d_result vsir_program_insert_point_coord(struct vsir_program *pr ins = vsir_program_iterator_next(&it); vsir_instruction_init_with_params(program, ins, &loc, VSIR_OP_MOV, 1, 1); - dst_param_init_temp_float4(&ins->dst[0], coord_temp); + vsir_dst_operand_init_temp_f32v4(&ins->dst[0], coord_temp); ins->dst[0].write_mask = VKD3DSP_WRITEMASK_2 | VKD3DSP_WRITEMASK_3; vsir_src_param_init(&ins->src[0], VKD3DSPR_IMMCONST, VSIR_DATA_F32, 0); ins->src[0].reg.dimension = VSIR_DIMENSION_VEC4; @@ -9466,7 +9473,7 @@ static enum vkd3d_result insert_fragment_fog_before_ret(struct vsir_program *pro ssa_temp2 = program->ssa_count++; vsir_instruction_init_with_params(program, ins, &loc, VSIR_OP_NEG, 1, 1); - dst_param_init_ssa_float(&ins->dst[0], ssa_temp); + vsir_dst_operand_init_ssa_f32(&ins->dst[0], ssa_temp); vsir_src_param_init(&ins->src[0], VKD3DSPR_INPUT, VSIR_DATA_F32, 1); ins->src[0].reg.idx[0].offset = fog_signature_idx; ins->src[0].reg.dimension = VSIR_DIMENSION_VEC4; @@ -9474,13 +9481,13 @@ static enum vkd3d_result insert_fragment_fog_before_ret(struct vsir_program *pro ins = vsir_program_iterator_next(it); vsir_instruction_init_with_params(program, ins, &loc, VSIR_OP_ADD, 1, 2); - dst_param_init_ssa_float(&ins->dst[0], ssa_temp2); + vsir_dst_operand_init_ssa_f32(&ins->dst[0], ssa_temp2); src_param_init_parameter(&ins->src[0], VKD3D_SHADER_PARAMETER_NAME_FOG_END, VSIR_DATA_F32); src_param_init_ssa_float(&ins->src[1], ssa_temp); ins = vsir_program_iterator_next(it); vsir_instruction_init_with_params(program, ins, &loc, VSIR_OP_MUL, 1, 2); - dst_param_init_ssa_float(&ins->dst[0], ssa_factor); + vsir_dst_operand_init_ssa_f32(&ins->dst[0], ssa_factor); src_param_init_ssa_float(&ins->src[0], ssa_temp2); src_param_init_parameter(&ins->src[1], VKD3D_SHADER_PARAMETER_NAME_FOG_SCALE, VSIR_DATA_F32); ins = vsir_program_iterator_next(it); @@ -9501,7 +9508,7 @@ static enum vkd3d_result insert_fragment_fog_before_ret(struct vsir_program *pro ssa_temp2 = program->ssa_count++; vsir_instruction_init_with_params(program, ins, &loc, VSIR_OP_MUL, 1, 2); - dst_param_init_ssa_float(&ins->dst[0], ssa_temp); + vsir_dst_operand_init_ssa_f32(&ins->dst[0], ssa_temp); src_param_init_parameter(&ins->src[0], VKD3D_SHADER_PARAMETER_NAME_FOG_SCALE, VSIR_DATA_F32); vsir_src_param_init(&ins->src[1], VKD3DSPR_INPUT, VSIR_DATA_F32, 1); ins->src[1].reg.idx[0].offset = fog_signature_idx; @@ -9510,12 +9517,12 @@ static enum vkd3d_result insert_fragment_fog_before_ret(struct vsir_program *pro ins = vsir_program_iterator_next(it); vsir_instruction_init_with_params(program, ins, &loc, VSIR_OP_NEG, 1, 1); - dst_param_init_ssa_float(&ins->dst[0], ssa_temp2); + vsir_dst_operand_init_ssa_f32(&ins->dst[0], ssa_temp2); src_param_init_ssa_float(&ins->src[0], ssa_temp); ins = vsir_program_iterator_next(it); vsir_instruction_init_with_params(program, ins, &loc, VSIR_OP_EXP, 1, 1); - dst_param_init_ssa_float(&ins->dst[0], ssa_factor); + vsir_dst_operand_init_ssa_f32(&ins->dst[0], ssa_factor); src_param_init_ssa_float(&ins->src[0], ssa_temp2); ins = vsir_program_iterator_next(it); break; @@ -9536,7 +9543,7 @@ static enum vkd3d_result insert_fragment_fog_before_ret(struct vsir_program *pro ssa_temp3 = program->ssa_count++; vsir_instruction_init_with_params(program, ins, &loc, VSIR_OP_MUL, 1, 2); - dst_param_init_ssa_float(&ins->dst[0], ssa_temp); + vsir_dst_operand_init_ssa_f32(&ins->dst[0], ssa_temp); src_param_init_parameter(&ins->src[0], VKD3D_SHADER_PARAMETER_NAME_FOG_SCALE, VSIR_DATA_F32); vsir_src_param_init(&ins->src[1], VKD3DSPR_INPUT, VSIR_DATA_F32, 1); ins->src[1].reg.idx[0].offset = fog_signature_idx; @@ -9545,18 +9552,18 @@ static enum vkd3d_result insert_fragment_fog_before_ret(struct vsir_program *pro ins = vsir_program_iterator_next(it); vsir_instruction_init_with_params(program, ins, &loc, VSIR_OP_MUL, 1, 2); - dst_param_init_ssa_float(&ins->dst[0], ssa_temp2); + vsir_dst_operand_init_ssa_f32(&ins->dst[0], ssa_temp2); src_param_init_ssa_float(&ins->src[0], ssa_temp); src_param_init_ssa_float(&ins->src[1], ssa_temp); ins = vsir_program_iterator_next(it); vsir_instruction_init_with_params(program, ins, &loc, VSIR_OP_NEG, 1, 1); - dst_param_init_ssa_float(&ins->dst[0], ssa_temp3); + vsir_dst_operand_init_ssa_f32(&ins->dst[0], ssa_temp3); src_param_init_ssa_float(&ins->src[0], ssa_temp2); ins = vsir_program_iterator_next(it); vsir_instruction_init_with_params(program, ins, &loc, VSIR_OP_EXP, 1, 1); - dst_param_init_ssa_float(&ins->dst[0], ssa_factor); + vsir_dst_operand_init_ssa_f32(&ins->dst[0], ssa_factor); src_param_init_ssa_float(&ins->src[0], ssa_temp3); ins = vsir_program_iterator_next(it); break; @@ -9577,23 +9584,23 @@ static enum vkd3d_result insert_fragment_fog_before_ret(struct vsir_program *pro ssa_temp3 = program->ssa_count++; vsir_instruction_init_with_params(program, ins, &loc, VSIR_OP_NEG, 1, 1); - dst_param_init_ssa_float4(&ins->dst[0], ssa_temp); + vsir_dst_operand_init_ssa_f32v4(&ins->dst[0], ssa_temp); src_param_init_parameter_vec4(&ins->src[0], VKD3D_SHADER_PARAMETER_NAME_FOG_COLOUR, VSIR_DATA_F32); ins = vsir_program_iterator_next(it); vsir_instruction_init_with_params(program, ins, &loc, VSIR_OP_ADD, 1, 2); - dst_param_init_ssa_float4(&ins->dst[0], ssa_temp2); + vsir_dst_operand_init_ssa_f32v4(&ins->dst[0], ssa_temp2); src_param_init_temp_float4(&ins->src[0], colour_temp); src_param_init_ssa_float4(&ins->src[1], ssa_temp); ins = vsir_program_iterator_next(it); vsir_instruction_init_with_params(program, ins, &loc, VSIR_OP_SATURATE, 1, 1); - dst_param_init_ssa_float(&ins->dst[0], ssa_temp3); + vsir_dst_operand_init_ssa_f32(&ins->dst[0], ssa_temp3); src_param_init_ssa_float(&ins->src[0], ssa_factor); ins = vsir_program_iterator_next(it); vsir_instruction_init_with_params(program, ins, &loc, VSIR_OP_MAD, 1, 3); - dst_param_init_output(&ins->dst[0], VSIR_DATA_F32, colour_signature_idx, + vsir_dst_operand_init_output(&ins->dst[0], VSIR_DATA_F32, colour_signature_idx, program->output_signature.elements[colour_signature_idx].mask); src_param_init_ssa_float4(&ins->src[0], ssa_temp2); src_param_init_ssa_float(&ins->src[1], ssa_temp3); @@ -9668,7 +9675,7 @@ static enum vkd3d_result vsir_program_insert_fragment_fog(struct vsir_program *p for (size_t j = 0; j < ins->dst_count; ++j) { - struct vkd3d_shader_dst_param *dst = &ins->dst[j]; + struct vsir_dst_operand *dst = &ins->dst[j]; /* Note we run after I/O normalization. */ if (dst->reg.type == VKD3DSPR_OUTPUT && dst->reg.idx[0].offset == colour_signature_idx) @@ -9731,7 +9738,7 @@ static enum vkd3d_result insert_vertex_fog_before_ret(struct vsir_program *progr /* Write the fog output. */ vsir_instruction_init_with_params(program, ins, &loc, VSIR_OP_MOV, 1, 1); - dst_param_init_output(&ins->dst[0], VSIR_DATA_F32, fog_signature_idx, 0x1); + vsir_dst_operand_init_output(&ins->dst[0], VSIR_DATA_F32, fog_signature_idx, 0x1); src_param_init_temp_float4(&ins->src[0], temp); if (source == VKD3D_SHADER_FOG_SOURCE_Z) ins->src[0].swizzle = VKD3D_SHADER_SWIZZLE(Z, Z, Z, Z); @@ -9741,8 +9748,8 @@ static enum vkd3d_result insert_vertex_fog_before_ret(struct vsir_program *progr /* Write the position or specular output. */ vsir_instruction_init_with_params(program, ins, &loc, VSIR_OP_MOV, 1, 1); - dst_param_init_output(&ins->dst[0], vsir_data_type_from_component_type(e->component_type), - source_signature_idx, e->mask); + vsir_dst_operand_init_output(&ins->dst[0], + vsir_data_type_from_component_type(e->component_type), source_signature_idx, e->mask); src_param_init_temp_float4(&ins->src[0], temp); ins = vsir_program_iterator_next(it); @@ -9830,7 +9837,7 @@ static enum vkd3d_result vsir_program_insert_vertex_fog(struct vsir_program *pro for (size_t j = 0; j < ins->dst_count; ++j) { - struct vkd3d_shader_dst_param *dst = &ins->dst[j]; + struct vsir_dst_operand *dst = &ins->dst[j]; /* Note we run after I/O normalization. */ if (dst->reg.type == VKD3DSPR_OUTPUT && dst->reg.idx[0].offset == source_signature_idx) @@ -10258,7 +10265,7 @@ static void liveness_track_src(struct liveness_tracker *tracker, } } -static void liveness_track_dst(struct liveness_tracker *tracker, struct vkd3d_shader_dst_param *dst, +static void liveness_track_dst(struct liveness_tracker *tracker, struct vsir_dst_operand *dst, unsigned int index, const struct vkd3d_shader_version *version, enum vkd3d_shader_opcode opcode) { struct liveness_tracker_reg *reg; @@ -10549,7 +10556,7 @@ static bool vsir_opcode_is_double(enum vkd3d_shader_opcode opcode) } static void temp_allocator_set_dst(struct temp_allocator *allocator, - struct vkd3d_shader_dst_param *dst, const struct vkd3d_shader_instruction *ins) + struct vsir_dst_operand *dst, const struct vkd3d_shader_instruction *ins) { struct temp_allocator_reg *reg; uint32_t remapped_mask; @@ -11944,8 +11951,7 @@ static void vsir_validate_register(struct validation_context *ctx, reg->dimension, reg->type, validation_data->dimension); } -static void vsir_validate_io_dst_param(struct validation_context *ctx, - const struct vkd3d_shader_dst_param *dst) +static void vsir_validate_io_dst_operand(struct validation_context *ctx, const struct vsir_dst_operand *dst) { struct vsir_io_register_data io_reg_data; const struct signature_element *e; @@ -11978,8 +11984,7 @@ static void vsir_validate_io_dst_param(struct validation_context *ctx, } } -static void vsir_validate_dst_param(struct validation_context *ctx, - const struct vkd3d_shader_dst_param *dst) +static void vsir_validate_dst_operand(struct validation_context *ctx, const struct vsir_dst_operand *dst) { const struct vkd3d_shader_version *version = &ctx->program->shader_version; @@ -12093,23 +12098,23 @@ static void vsir_validate_dst_param(struct validation_context *ctx, break; case VKD3DSPR_INPUT: - vsir_validate_io_dst_param(ctx, dst); + vsir_validate_io_dst_operand(ctx, dst); break; case VKD3DSPR_OUTPUT: - vsir_validate_io_dst_param(ctx, dst); + vsir_validate_io_dst_operand(ctx, dst); break; case VKD3DSPR_INCONTROLPOINT: - vsir_validate_io_dst_param(ctx, dst); + vsir_validate_io_dst_operand(ctx, dst); break; case VKD3DSPR_OUTCONTROLPOINT: - vsir_validate_io_dst_param(ctx, dst); + vsir_validate_io_dst_operand(ctx, dst); break; case VKD3DSPR_PATCHCONST: - vsir_validate_io_dst_param(ctx, dst); + vsir_validate_io_dst_operand(ctx, dst); break; case VKD3DSPR_TEXTURE: @@ -14090,7 +14095,9 @@ static void vsir_validate_instruction(struct validation_context *ctx, size_t i; for (i = 0; i < instruction->dst_count; ++i) - vsir_validate_dst_param(ctx, &instruction->dst[i]); + { + vsir_validate_dst_operand(ctx, &instruction->dst[i]); + } for (i = 0; i < instruction->src_count; ++i) vsir_validate_src_param(ctx, &instruction->src[i]); @@ -14724,18 +14731,18 @@ static enum vkd3d_result vsir_program_dce(struct vsir_program *program, for (unsigned int j = 0; j < ins->dst_count; ++j) { - struct vkd3d_shader_dst_param *dst = &ins->dst[j]; + struct vsir_dst_operand *dst = &ins->dst[j]; if (dst->reg.type == VKD3DSPR_SSA && !tracker.ssa_regs[dst->reg.idx[0].offset].last_read) { - vsir_dst_param_init_null(dst); + vsir_dst_operand_init_null(dst); ctx->progress = true; } else if (dst->reg.type == VKD3DSPR_TEMP && tracker.temp_regs[dst->reg.idx[0].offset].last_read <= i && !(program->shader_version.major == 1 && dst->reg.idx[0].offset == 0)) { - vsir_dst_param_init_null(dst); + vsir_dst_operand_init_null(dst); ctx->progress = true; } else if (dst->reg.type != VKD3DSPR_NULL) diff --git a/libs/vkd3d-shader/msl.c b/libs/vkd3d-shader/msl.c index 2a6a243ee..4ba60b14f 100644 --- a/libs/vkd3d-shader/msl.c +++ b/libs/vkd3d-shader/msl.c @@ -34,7 +34,7 @@ struct msl_src struct msl_dst { - const struct vkd3d_shader_dst_param *vsir; + const struct vsir_dst_operand *vsir; struct vkd3d_string_buffer *register_name; struct vkd3d_string_buffer *mask; }; @@ -586,7 +586,7 @@ static void msl_dst_cleanup(struct msl_dst *dst, struct vkd3d_string_buffer_cach } static uint32_t msl_dst_init(struct msl_dst *msl_dst, struct msl_generator *gen, - const struct vkd3d_shader_instruction *ins, const struct vkd3d_shader_dst_param *vsir_dst) + const struct vkd3d_shader_instruction *ins, const struct vsir_dst_operand *vsir_dst) { uint32_t write_mask = vsir_dst->write_mask; enum msl_data_type dst_data_type; diff --git a/libs/vkd3d-shader/spirv.c b/libs/vkd3d-shader/spirv.c index a8458e333..036dea0e6 100644 --- a/libs/vkd3d-shader/spirv.c +++ b/libs/vkd3d-shader/spirv.c @@ -3753,7 +3753,7 @@ static uint32_t spirv_compiler_get_type_id_for_reg(struct spirv_compiler *compil } static uint32_t spirv_compiler_get_type_id_for_dst(struct spirv_compiler *compiler, - const struct vkd3d_shader_dst_param *dst) + const struct vsir_dst_operand *dst) { return spirv_compiler_get_type_id_for_reg(compiler, &dst->reg, dst->write_mask); } @@ -4970,15 +4970,15 @@ static uint32_t spirv_compiler_emit_sat(struct spirv_compiler *compiler, } static void spirv_compiler_emit_store_dst(struct spirv_compiler *compiler, - const struct vkd3d_shader_dst_param *dst, uint32_t val_id) + const struct vsir_dst_operand *dst, uint32_t val_id) { spirv_compiler_emit_store_reg(compiler, &dst->reg, dst->write_mask, val_id); } static void spirv_compiler_emit_store_dst_swizzled(struct spirv_compiler *compiler, - const struct vkd3d_shader_dst_param *dst, uint32_t val_id, enum vsir_data_type data_type, uint32_t swizzle) + const struct vsir_dst_operand *dst, uint32_t val_id, enum vsir_data_type data_type, uint32_t swizzle) { - struct vkd3d_shader_dst_param typed_dst = *dst; + struct vsir_dst_operand typed_dst = *dst; val_id = spirv_compiler_emit_swizzle(compiler, val_id, VKD3DSP_WRITEMASK_ALL, data_type, swizzle, dst->write_mask); @@ -4989,7 +4989,7 @@ static void spirv_compiler_emit_store_dst_swizzled(struct spirv_compiler *compil } static void spirv_compiler_emit_store_dst_components(struct spirv_compiler *compiler, - const struct vkd3d_shader_dst_param *dst, enum vsir_data_type data_type, uint32_t *component_ids) + const struct vsir_dst_operand *dst, enum vsir_data_type data_type, uint32_t *component_ids) { unsigned int component_count = vsir_write_mask_component_count(dst->write_mask); struct vkd3d_spirv_builder *builder = &compiler->spirv_builder; @@ -5009,7 +5009,7 @@ static void spirv_compiler_emit_store_dst_components(struct spirv_compiler *comp } static void spirv_compiler_emit_store_dst_scalar(struct spirv_compiler *compiler, - const struct vkd3d_shader_dst_param *dst, uint32_t val_id, enum vsir_data_type data_type, uint32_t swizzle) + const struct vsir_dst_operand *dst, uint32_t val_id, enum vsir_data_type data_type, uint32_t swizzle) { unsigned int component_count = vsir_write_mask_component_count(dst->write_mask); uint32_t component_ids[VKD3D_VEC4_SIZE]; @@ -5552,7 +5552,7 @@ static bool needs_private_io_variable(const struct vkd3d_spirv_builtin *builtin) } static const struct vkd3d_symbol *spirv_compiler_emit_io_register(struct spirv_compiler *compiler, - const struct vkd3d_shader_dst_param *dst) + const struct vsir_dst_operand *dst) { struct vkd3d_spirv_builder *builder = &compiler->spirv_builder; const struct vkd3d_shader_register *reg = &dst->reg; @@ -5631,10 +5631,10 @@ static void spirv_compiler_emit_input(struct spirv_compiler *compiler, sysval_reg_type = vsir_register_type_from_sysval_input(signature_element->sysval_semantic); if (sysval_reg_type != VKD3DSPR_INPUT) { - struct vkd3d_shader_dst_param dst; const struct vkd3d_symbol *symbol; + struct vsir_dst_operand dst; - vsir_dst_param_init(&dst, sysval_reg_type, VSIR_DATA_F32, 0); + vsir_dst_operand_init(&dst, sysval_reg_type, VSIR_DATA_F32, 0); symbol = spirv_compiler_emit_io_register(compiler, &dst); vkd3d_symbol_make_io(®_symbol, reg_type, element_idx); @@ -7331,8 +7331,8 @@ static SpvOp spirv_compiler_map_logical_instruction(const struct vkd3d_shader_in static void spirv_compiler_emit_bool_cast(struct spirv_compiler *compiler, const struct vkd3d_shader_instruction *instruction) { - const struct vkd3d_shader_dst_param *dst = instruction->dst; const struct vkd3d_shader_src_param *src = instruction->src; + const struct vsir_dst_operand *dst = instruction->dst; uint32_t val_id; VKD3D_ASSERT(src->reg.data_type == VSIR_DATA_BOOL && dst->reg.data_type != VSIR_DATA_BOOL); @@ -7370,8 +7370,8 @@ static enum vkd3d_result spirv_compiler_emit_alu_instruction(struct spirv_compil const struct vkd3d_shader_instruction *instruction) { struct vkd3d_spirv_builder *builder = &compiler->spirv_builder; - const struct vkd3d_shader_dst_param *dst = instruction->dst; const struct vkd3d_shader_src_param *src = instruction->src; + const struct vsir_dst_operand *dst = instruction->dst; uint32_t src_ids[SPIRV_MAX_SRC_COUNT]; uint32_t type_id, val_id; SpvOp op = SpvOpMax; @@ -7450,8 +7450,8 @@ static enum vkd3d_result spirv_compiler_emit_alu_instruction(struct spirv_compil static void spirv_compiler_emit_saturate(struct spirv_compiler *compiler, const struct vkd3d_shader_instruction *instruction) { - const struct vkd3d_shader_dst_param *dst = instruction->dst; const struct vkd3d_shader_src_param *src = instruction->src; + const struct vsir_dst_operand *dst = instruction->dst; uint32_t val_id; val_id = spirv_compiler_emit_load_src(compiler, src, dst->write_mask); @@ -7463,8 +7463,8 @@ static void spirv_compiler_emit_isfinite(struct spirv_compiler *compiler, const struct vkd3d_shader_instruction *instruction) { struct vkd3d_spirv_builder *builder = &compiler->spirv_builder; - const struct vkd3d_shader_dst_param *dst = instruction->dst; const struct vkd3d_shader_src_param *src = instruction->src; + const struct vsir_dst_operand *dst = instruction->dst; uint32_t type_id, src_id, isinf_id, isnan_id, val_id; type_id = spirv_compiler_get_type_id_for_dst(compiler, dst); @@ -7535,8 +7535,8 @@ static void spirv_compiler_emit_ext_glsl_instruction(struct spirv_compiler *comp { uint32_t instr_set_id, type_id, val_id, rev_val_id, uint_max_id, condition_id; struct vkd3d_spirv_builder *builder = &compiler->spirv_builder; - const struct vkd3d_shader_dst_param *dst = instruction->dst; const struct vkd3d_shader_src_param *src = instruction->src; + const struct vsir_dst_operand *dst = instruction->dst; uint32_t src_id[SPIRV_MAX_SRC_COUNT]; unsigned int i, component_count; enum GLSLstd450 glsl_inst; @@ -7595,8 +7595,8 @@ static void spirv_compiler_emit_mov(struct spirv_compiler *compiler, uint32_t val_id, dst_val_id, type_id, dst_id, src_id, write_mask32, swizzle32; struct vkd3d_spirv_builder *builder = &compiler->spirv_builder; struct vkd3d_shader_register_info dst_reg_info, src_reg_info; - const struct vkd3d_shader_dst_param *dst = instruction->dst; const struct vkd3d_shader_src_param *src = instruction->src; + const struct vsir_dst_operand *dst = instruction->dst; unsigned int i, component_count, write_mask; uint32_t components[VKD3D_VEC4_SIZE]; @@ -7669,9 +7669,9 @@ static void spirv_compiler_emit_movc(struct spirv_compiler *compiler, const struct vkd3d_shader_instruction *instruction) { struct vkd3d_spirv_builder *builder = &compiler->spirv_builder; - const struct vkd3d_shader_dst_param *dst = instruction->dst; const struct vkd3d_shader_src_param *src = instruction->src; uint32_t condition_id, src1_id, src2_id, type_id, val_id; + const struct vsir_dst_operand *dst = instruction->dst; unsigned int component_count; condition_id = spirv_compiler_emit_load_src(compiler, &src[0], dst->write_mask); @@ -7700,9 +7700,9 @@ static void spirv_compiler_emit_swapc(struct spirv_compiler *compiler, const struct vkd3d_shader_instruction *instruction) { struct vkd3d_spirv_builder *builder = &compiler->spirv_builder; - const struct vkd3d_shader_dst_param *dst = instruction->dst; const struct vkd3d_shader_src_param *src = instruction->src; uint32_t condition_id, src1_id, src2_id, type_id, val_id; + const struct vsir_dst_operand *dst = instruction->dst; unsigned int component_count; VKD3D_ASSERT(dst[0].write_mask == dst[1].write_mask); @@ -7727,8 +7727,8 @@ static void spirv_compiler_emit_dot(struct spirv_compiler *compiler, const struct vkd3d_shader_instruction *instruction) { struct vkd3d_spirv_builder *builder = &compiler->spirv_builder; - const struct vkd3d_shader_dst_param *dst = instruction->dst; const struct vkd3d_shader_src_param *src = instruction->src; + const struct vsir_dst_operand *dst = instruction->dst; uint32_t type_id, val_id, src_ids[2]; unsigned int component_count, i; enum vsir_data_type data_type; @@ -7764,8 +7764,8 @@ static void spirv_compiler_emit_rcp(struct spirv_compiler *compiler, const struct vkd3d_shader_instruction *instruction) { struct vkd3d_spirv_builder *builder = &compiler->spirv_builder; - const struct vkd3d_shader_dst_param *dst = instruction->dst; const struct vkd3d_shader_src_param *src = instruction->src; + const struct vsir_dst_operand *dst = instruction->dst; uint32_t type_id, src_id, val_id, div_id; unsigned int component_count; @@ -7785,8 +7785,8 @@ static void spirv_compiler_emit_imad(struct spirv_compiler *compiler, const struct vkd3d_shader_instruction *instruction) { struct vkd3d_spirv_builder *builder = &compiler->spirv_builder; - const struct vkd3d_shader_dst_param *dst = instruction->dst; const struct vkd3d_shader_src_param *src = instruction->src; + const struct vsir_dst_operand *dst = instruction->dst; uint32_t type_id, val_id, src_ids[3]; unsigned int i, component_count; @@ -7807,8 +7807,8 @@ static void spirv_compiler_emit_ftoi(struct spirv_compiler *compiler, { uint32_t src_id, int_min_id, int_max_id, zero_id, float_max_id, condition_id, val_id; struct vkd3d_spirv_builder *builder = &compiler->spirv_builder; - const struct vkd3d_shader_dst_param *dst = instruction->dst; const struct vkd3d_shader_src_param *src = instruction->src; + const struct vsir_dst_operand *dst = instruction->dst; uint32_t src_type_id, dst_type_id, condition_type_id; unsigned int component_count; uint32_t write_mask; @@ -7862,8 +7862,8 @@ static void spirv_compiler_emit_ftou(struct spirv_compiler *compiler, { uint32_t src_id, zero_id, uint_max_id, float_max_id, condition_id, val_id; struct vkd3d_spirv_builder *builder = &compiler->spirv_builder; - const struct vkd3d_shader_dst_param *dst = instruction->dst; const struct vkd3d_shader_src_param *src = instruction->src; + const struct vsir_dst_operand *dst = instruction->dst; uint32_t src_type_id, dst_type_id, condition_type_id; unsigned int component_count; uint32_t write_mask; @@ -7910,8 +7910,8 @@ static void spirv_compiler_emit_dtof(struct spirv_compiler *compiler, const struct vkd3d_shader_instruction *instruction) { struct vkd3d_spirv_builder *builder = &compiler->spirv_builder; - const struct vkd3d_shader_dst_param *dst = instruction->dst; const struct vkd3d_shader_src_param *src = instruction->src; + const struct vsir_dst_operand *dst = instruction->dst; uint32_t type_id, val_id, src_id; unsigned int component_count; uint32_t write_mask; @@ -7934,8 +7934,8 @@ static void spirv_compiler_emit_bitfield_instruction(struct spirv_compiler *comp { uint32_t src_ids[4], constituents[VKD3D_VEC4_SIZE], type_id, mask_id, size_id, max_count_id; struct vkd3d_spirv_builder *builder = &compiler->spirv_builder; - const struct vkd3d_shader_dst_param *dst = instruction->dst; const struct vkd3d_shader_src_param *src = instruction->src; + const struct vsir_dst_operand *dst = instruction->dst; unsigned int i, j, k, src_count, size; enum vsir_data_type data_type; uint32_t write_mask; @@ -7995,8 +7995,8 @@ static void spirv_compiler_emit_f16tof32(struct spirv_compiler *compiler, { uint32_t instr_set_id, type_id, scalar_type_id, src_id, result_id; struct vkd3d_spirv_builder *builder = &compiler->spirv_builder; - const struct vkd3d_shader_dst_param *dst = instruction->dst; const struct vkd3d_shader_src_param *src = instruction->src; + const struct vsir_dst_operand *dst = instruction->dst; uint32_t components[VKD3D_VEC4_SIZE]; uint32_t write_mask; unsigned int i, j; @@ -8027,8 +8027,8 @@ static void spirv_compiler_emit_f32tof16(struct spirv_compiler *compiler, { uint32_t instr_set_id, type_id, scalar_type_id, src_id, zero_id, constituents[2]; struct vkd3d_spirv_builder *builder = &compiler->spirv_builder; - const struct vkd3d_shader_dst_param *dst = instruction->dst; const struct vkd3d_shader_src_param *src = instruction->src; + const struct vsir_dst_operand *dst = instruction->dst; uint32_t components[VKD3D_VEC4_SIZE]; uint32_t write_mask; unsigned int i, j; @@ -8061,8 +8061,8 @@ static void spirv_compiler_emit_comparison_instruction(struct spirv_compiler *co const struct vkd3d_shader_instruction *instruction) { struct vkd3d_spirv_builder *builder = &compiler->spirv_builder; - const struct vkd3d_shader_dst_param *dst = instruction->dst; const struct vkd3d_shader_src_param *src = instruction->src; + const struct vsir_dst_operand *dst = instruction->dst; uint32_t src0_id, src1_id, type_id, result_id; uint32_t write_mask = dst->write_mask; unsigned int component_count; @@ -8126,8 +8126,8 @@ static void spirv_compiler_emit_orderedness_instruction(struct spirv_compiler *c const struct vkd3d_shader_instruction *instruction) { struct vkd3d_spirv_builder *builder = &compiler->spirv_builder; - const struct vkd3d_shader_dst_param *dst = instruction->dst; const struct vkd3d_shader_src_param *src = instruction->src; + const struct vsir_dst_operand *dst = instruction->dst; uint32_t type_id, src0_id, src1_id, val_id; type_id = spirv_compiler_get_type_id_for_dst(compiler, dst); @@ -8146,8 +8146,8 @@ static void spirv_compiler_emit_float_comparison_instruction(struct spirv_compil const struct vkd3d_shader_instruction *instruction) { struct vkd3d_spirv_builder *builder = &compiler->spirv_builder; - const struct vkd3d_shader_dst_param *dst = instruction->dst; const struct vkd3d_shader_src_param *src = instruction->src; + const struct vsir_dst_operand *dst = instruction->dst; uint32_t src0_id, src1_id, type_id, result_id; unsigned int component_count; SpvOp op; @@ -8444,8 +8444,8 @@ static void spirv_compiler_emit_deriv_instruction(struct spirv_compiler *compile const struct vkd3d_shader_instruction *instruction) { struct vkd3d_spirv_builder *builder = &compiler->spirv_builder; - const struct vkd3d_shader_dst_param *dst = instruction->dst; const struct vkd3d_shader_src_param *src = instruction->src; + const struct vsir_dst_operand *dst = instruction->dst; const struct instruction_info *info; uint32_t type_id, src_id, val_id; unsigned int i; @@ -8678,8 +8678,8 @@ static void spirv_compiler_emit_ld(struct spirv_compiler *compiler, const struct vkd3d_shader_instruction *instruction) { struct vkd3d_spirv_builder *builder = &compiler->spirv_builder; - const struct vkd3d_shader_dst_param *dst = instruction->dst; const struct vkd3d_shader_src_param *src = instruction->src; + const struct vsir_dst_operand *dst = instruction->dst; uint32_t type_id, coordinate_id, val_id; SpvImageOperandsMask operands_mask = 0; unsigned int image_operand_count = 0; @@ -8724,9 +8724,9 @@ static void spirv_compiler_emit_lod(struct spirv_compiler *compiler, const struct vkd3d_shader_instruction *instruction) { struct vkd3d_spirv_builder *builder = &compiler->spirv_builder; - const struct vkd3d_shader_dst_param *dst = instruction->dst; const struct vkd3d_shader_src_param *src = instruction->src; const struct vkd3d_shader_src_param *resource, *sampler; + const struct vsir_dst_operand *dst = instruction->dst; uint32_t type_id, coordinate_id, val_id; struct vkd3d_shader_image image; @@ -8749,9 +8749,9 @@ static void spirv_compiler_emit_sample(struct spirv_compiler *compiler, const struct vkd3d_shader_instruction *instruction) { struct vkd3d_spirv_builder *builder = &compiler->spirv_builder; - const struct vkd3d_shader_dst_param *dst = instruction->dst; const struct vkd3d_shader_src_param *src = instruction->src; const struct vkd3d_shader_src_param *resource, *sampler; + const struct vsir_dst_operand *dst = instruction->dst; unsigned int image_operand_count = 0, component_count; uint32_t sampled_type_id, coordinate_id, val_id; SpvImageOperandsMask operands_mask = 0; @@ -8819,9 +8819,9 @@ static void spirv_compiler_emit_sample_c(struct spirv_compiler *compiler, const struct vkd3d_shader_instruction *instruction) { struct vkd3d_spirv_builder *builder = &compiler->spirv_builder; - const struct vkd3d_shader_dst_param *dst = instruction->dst; const struct vkd3d_shader_src_param *src = instruction->src; uint32_t sampled_type_id, coordinate_id, dref_id, val_id; + const struct vsir_dst_operand *dst = instruction->dst; SpvImageOperandsMask operands_mask = 0; unsigned int image_operand_count = 0; struct vkd3d_shader_image image; @@ -8866,8 +8866,8 @@ static void spirv_compiler_emit_gather4(struct spirv_compiler *compiler, const struct vkd3d_shader_src_param *addr, *offset, *resource, *sampler; uint32_t sampled_type_id, coordinate_id, component_id, dref_id, val_id; struct vkd3d_spirv_builder *builder = &compiler->spirv_builder; - const struct vkd3d_shader_dst_param *dst = instruction->dst; const struct vkd3d_shader_src_param *src = instruction->src; + const struct vsir_dst_operand *dst = instruction->dst; unsigned int image_flags = VKD3D_IMAGE_FLAG_SAMPLED; unsigned int component_count, component_idx; SpvImageOperandsMask operands_mask = 0; @@ -8966,8 +8966,8 @@ static void spirv_compiler_emit_ld_raw_structured_srv_uav(struct spirv_compiler { uint32_t coordinate_id, type_id, val_id, texel_type_id, ptr_type_id, ptr_id; struct vkd3d_spirv_builder *builder = &compiler->spirv_builder; - const struct vkd3d_shader_dst_param *dst = instruction->dst; const struct vkd3d_shader_src_param *src = instruction->src; + const struct vsir_dst_operand *dst = instruction->dst; const struct vkd3d_shader_src_param *resource; const struct vkd3d_symbol *resource_symbol; uint32_t base_coordinate_id, component_idx; @@ -9053,8 +9053,8 @@ static void spirv_compiler_emit_ld_tgsm(struct spirv_compiler *compiler, const struct vkd3d_shader_instruction *instruction) { struct vkd3d_spirv_builder *builder = &compiler->spirv_builder; - const struct vkd3d_shader_dst_param *dst = instruction->dst; const struct vkd3d_shader_src_param *src = instruction->src; + const struct vsir_dst_operand *dst = instruction->dst; uint32_t coordinate_id, type_id, ptr_type_id, ptr_id; const struct vkd3d_shader_src_param *resource; struct vkd3d_shader_register_info reg_info; @@ -9112,8 +9112,8 @@ static void spirv_compiler_emit_store_uav_raw_structured(struct spirv_compiler * { uint32_t coordinate_id, type_id, val_id, data_id, ptr_type_id, ptr_id; struct vkd3d_spirv_builder *builder = &compiler->spirv_builder; - const struct vkd3d_shader_dst_param *dst = instruction->dst; const struct vkd3d_shader_src_param *src = instruction->src; + const struct vsir_dst_operand *dst = instruction->dst; const struct vkd3d_symbol *resource_symbol; uint32_t base_coordinate_id, component_idx; const struct vkd3d_shader_src_param *data; @@ -9189,8 +9189,8 @@ static void spirv_compiler_emit_store_tgsm(struct spirv_compiler *compiler, { uint32_t coordinate_id, type_id, val_id, ptr_type_id, ptr_id, data_id; struct vkd3d_spirv_builder *builder = &compiler->spirv_builder; - const struct vkd3d_shader_dst_param *dst = instruction->dst; const struct vkd3d_shader_src_param *src = instruction->src; + const struct vsir_dst_operand *dst = instruction->dst; uint32_t base_coordinate_id, component_idx; struct vkd3d_shader_register_info reg_info; struct vkd3d_shader_src_param data; @@ -9246,8 +9246,8 @@ static void spirv_compiler_emit_ld_uav_typed(struct spirv_compiler *compiler, { struct vkd3d_spirv_builder *builder = &compiler->spirv_builder; uint32_t coordinate_id, type_id, val_id, ptr_type_id, ptr_id; - const struct vkd3d_shader_dst_param *dst = instruction->dst; const struct vkd3d_shader_src_param *src = instruction->src; + const struct vsir_dst_operand *dst = instruction->dst; const struct vkd3d_symbol *resource_symbol; struct vkd3d_shader_image image; uint32_t coordinate_mask; @@ -9288,8 +9288,8 @@ static void spirv_compiler_emit_store_uav_typed(struct spirv_compiler *compiler, { uint32_t coordinate_id, texel_id, type_id, val_id, ptr_type_id, ptr_id; struct vkd3d_spirv_builder *builder = &compiler->spirv_builder; - const struct vkd3d_shader_dst_param *dst = instruction->dst; const struct vkd3d_shader_src_param *src = instruction->src; + const struct vsir_dst_operand *dst = instruction->dst; const struct vkd3d_symbol *resource_symbol; struct vkd3d_shader_image image; uint32_t coordinate_mask; @@ -9328,9 +9328,9 @@ static void spirv_compiler_emit_uav_counter_instruction(struct spirv_compiler *c const struct vkd3d_shader_instruction *instruction) { struct vkd3d_spirv_builder *builder = &compiler->spirv_builder; - const struct vkd3d_shader_dst_param *dst = instruction->dst; const struct vkd3d_shader_src_param *src = instruction->src; unsigned int memory_semantics = SpvMemorySemanticsMaskNone; + const struct vsir_dst_operand *dst = instruction->dst; uint32_t ptr_type_id, type_id, counter_id, result_id; uint32_t coordinate_id, sample_id, pointer_id; const struct vkd3d_symbol *resource_symbol; @@ -9448,13 +9448,13 @@ static void spirv_compiler_emit_atomic_instruction(struct spirv_compiler *compil const struct vkd3d_shader_instruction *instruction) { struct vkd3d_spirv_builder *builder = &compiler->spirv_builder; - const struct vkd3d_shader_dst_param *dst = instruction->dst; const struct vkd3d_shader_src_param *src = instruction->src; + const struct vsir_dst_operand *dst = instruction->dst; const struct vkd3d_symbol *resource_symbol = NULL; uint32_t ptr_type_id, type_id, val_id, result_id; - const struct vkd3d_shader_dst_param *resource; uint32_t coordinate_id, sample_id, pointer_id; struct vkd3d_shader_register_info reg_info; + const struct vsir_dst_operand *resource; struct vkd3d_shader_image image; enum vsir_data_type data_type; unsigned int structure_stride; @@ -9576,8 +9576,8 @@ static void spirv_compiler_emit_bufinfo(struct spirv_compiler *compiler, const struct vkd3d_shader_instruction *instruction) { struct vkd3d_spirv_builder *builder = &compiler->spirv_builder; - const struct vkd3d_shader_dst_param *dst = instruction->dst; const struct vkd3d_shader_src_param *src = instruction->src; + const struct vsir_dst_operand *dst = instruction->dst; const struct vkd3d_symbol *resource_symbol; uint32_t type_id, val_id, stride_id; struct vkd3d_shader_image image; @@ -9628,8 +9628,8 @@ static void spirv_compiler_emit_resinfo(struct spirv_compiler *compiler, const struct vkd3d_shader_instruction *instruction) { struct vkd3d_spirv_builder *builder = &compiler->spirv_builder; - const struct vkd3d_shader_dst_param *dst = instruction->dst; const struct vkd3d_shader_src_param *src = instruction->src; + const struct vsir_dst_operand *dst = instruction->dst; uint32_t type_id, lod_id, val_id, miplevel_count_id; enum vsir_data_type data_type = VSIR_DATA_U32; uint32_t constituents[VKD3D_VEC4_SIZE]; @@ -9713,8 +9713,8 @@ static void spirv_compiler_emit_sample_info(struct spirv_compiler *compiler, const struct vkd3d_shader_instruction *instruction) { struct vkd3d_spirv_builder *builder = &compiler->spirv_builder; - const struct vkd3d_shader_dst_param *dst = instruction->dst; const struct vkd3d_shader_src_param *src = instruction->src; + const struct vsir_dst_operand *dst = instruction->dst; enum vsir_data_type data_type = VSIR_DATA_U32; uint32_t constituents[VKD3D_VEC4_SIZE]; uint32_t type_id, val_id; @@ -9794,7 +9794,7 @@ static void spirv_compiler_emit_sample_position(struct spirv_compiler *compiler, }; struct vkd3d_spirv_builder *builder = &compiler->spirv_builder; uint32_t constituents[ARRAY_SIZE(standard_sample_positions)]; - const struct vkd3d_shader_dst_param *dst = instruction->dst; + const struct vsir_dst_operand *dst = instruction->dst; uint32_t array_type_id, length_id, index_id, id; uint32_t sample_count_id, sample_index_id; uint32_t type_id, bool_id, ptr_type_id; @@ -9848,9 +9848,9 @@ static void spirv_compiler_emit_eval_attrib(struct spirv_compiler *compiler, const struct vkd3d_shader_instruction *instruction) { struct vkd3d_spirv_builder *builder = &compiler->spirv_builder; - const struct vkd3d_shader_dst_param *dst = instruction->dst; const struct vkd3d_shader_src_param *src = instruction->src; const struct vkd3d_shader_register *input = &src[0].reg; + const struct vsir_dst_operand *dst = instruction->dst; uint32_t instr_set_id, type_id, val_id, src_ids[2]; struct vkd3d_shader_register_info register_info; unsigned int src_count = 0; @@ -10011,9 +10011,9 @@ static void spirv_compiler_emit_quad_read_across(struct spirv_compiler *compiler const struct vkd3d_shader_instruction *instruction) { struct vkd3d_spirv_builder *builder = &compiler->spirv_builder; - const struct vkd3d_shader_dst_param *dst = instruction->dst; const struct vkd3d_shader_src_param *src = instruction->src; uint32_t type_id, direction_type_id, direction_id, val_id; + const struct vsir_dst_operand *dst = instruction->dst; type_id = spirv_get_type_id(compiler, dst->reg.data_type, vsir_write_mask_component_count(dst->write_mask)); direction_type_id = spirv_get_type_id(compiler, VSIR_DATA_U32, 1); @@ -10029,8 +10029,8 @@ static void spirv_compiler_emit_quad_read_lane_at(struct spirv_compiler *compile const struct vkd3d_shader_instruction *instruction) { struct vkd3d_spirv_builder *builder = &compiler->spirv_builder; - const struct vkd3d_shader_dst_param *dst = instruction->dst; const struct vkd3d_shader_src_param *src = instruction->src; + const struct vsir_dst_operand *dst = instruction->dst; uint32_t type_id, val_id, lane_id; if (!register_is_constant_or_undef(&src[1].reg)) @@ -10067,8 +10067,8 @@ static void spirv_compiler_emit_wave_bool_op(struct spirv_compiler *compiler, const struct vkd3d_shader_instruction *instruction) { struct vkd3d_spirv_builder *builder = &compiler->spirv_builder; - const struct vkd3d_shader_dst_param *dst = instruction->dst; const struct vkd3d_shader_src_param *src = instruction->src; + const struct vsir_dst_operand *dst = instruction->dst; uint32_t type_id, val_id; SpvOp op; @@ -10099,7 +10099,7 @@ static uint32_t spirv_compiler_emit_group_nonuniform_ballot(struct spirv_compile static void spirv_compiler_emit_wave_active_ballot(struct spirv_compiler *compiler, const struct vkd3d_shader_instruction *instruction) { - const struct vkd3d_shader_dst_param *dst = instruction->dst; + const struct vsir_dst_operand *dst = instruction->dst; uint32_t val_id; val_id = spirv_compiler_emit_group_nonuniform_ballot(compiler, instruction->src); @@ -10141,8 +10141,8 @@ static void spirv_compiler_emit_wave_alu_op(struct spirv_compiler *compiler, const struct vkd3d_shader_instruction *instruction) { struct vkd3d_spirv_builder *builder = &compiler->spirv_builder; - const struct vkd3d_shader_dst_param *dst = instruction->dst; const struct vkd3d_shader_src_param *src = instruction->src; + const struct vsir_dst_operand *dst = instruction->dst; uint32_t type_id, val_id; SpvOp op; @@ -10164,7 +10164,7 @@ static void spirv_compiler_emit_wave_bit_count(struct spirv_compiler *compiler, const struct vkd3d_shader_instruction *instruction) { struct vkd3d_spirv_builder *builder = &compiler->spirv_builder; - const struct vkd3d_shader_dst_param *dst = instruction->dst; + const struct vsir_dst_operand *dst = instruction->dst; SpvGroupOperation group_op; uint32_t type_id, val_id; @@ -10182,7 +10182,7 @@ static void spirv_compiler_emit_wave_is_first_lane(struct spirv_compiler *compil const struct vkd3d_shader_instruction *instruction) { struct vkd3d_spirv_builder *builder = &compiler->spirv_builder; - const struct vkd3d_shader_dst_param *dst = instruction->dst; + const struct vsir_dst_operand *dst = instruction->dst; uint32_t val_id; val_id = vkd3d_spirv_build_op_group_nonuniform_elect(builder); @@ -10193,8 +10193,8 @@ static void spirv_compiler_emit_wave_read_lane_at(struct spirv_compiler *compile const struct vkd3d_shader_instruction *instruction) { struct vkd3d_spirv_builder *builder = &compiler->spirv_builder; - const struct vkd3d_shader_dst_param *dst = instruction->dst; const struct vkd3d_shader_src_param *src = instruction->src; + const struct vsir_dst_operand *dst = instruction->dst; uint32_t type_id, lane_id, val_id; type_id = spirv_get_type_id(compiler, dst->reg.data_type, vsir_write_mask_component_count(dst->write_mask)); @@ -10220,8 +10220,8 @@ static void spirv_compiler_emit_wave_read_lane_first(struct spirv_compiler *comp const struct vkd3d_shader_instruction *instruction) { struct vkd3d_spirv_builder *builder = &compiler->spirv_builder; - const struct vkd3d_shader_dst_param *dst = instruction->dst; const struct vkd3d_shader_src_param *src = instruction->src; + const struct vsir_dst_operand *dst = instruction->dst; uint32_t type_id, val_id; type_id = spirv_get_type_id(compiler, dst->reg.data_type, vsir_write_mask_component_count(dst->write_mask)); @@ -10627,7 +10627,7 @@ static int spirv_compiler_handle_instruction(struct spirv_compiler *compiler, static void spirv_compiler_emit_io_declarations(struct spirv_compiler *compiler) { - struct vkd3d_shader_dst_param dst; + struct vsir_dst_operand dst; for (unsigned int i = 0; i < compiler->program->input_signature.element_count; ++i) spirv_compiler_emit_input(compiler, VKD3DSPR_INPUT, i); @@ -10652,14 +10652,14 @@ static void spirv_compiler_emit_io_declarations(struct spirv_compiler *compiler) if (compiler->program->has_point_size) { - vsir_dst_param_init(&dst, VKD3DSPR_RASTOUT, VSIR_DATA_F32, 1); + vsir_dst_operand_init(&dst, VKD3DSPR_RASTOUT, VSIR_DATA_F32, 1); dst.reg.idx[0].offset = VSIR_RASTOUT_POINT_SIZE; spirv_compiler_emit_io_register(compiler, &dst); } if (compiler->program->has_point_coord) { - vsir_dst_param_init(&dst, VKD3DSPR_POINT_COORD, VSIR_DATA_F32, 0); + vsir_dst_operand_init(&dst, VKD3DSPR_POINT_COORD, VSIR_DATA_F32, 0); spirv_compiler_emit_io_register(compiler, &dst); } @@ -10670,7 +10670,7 @@ static void spirv_compiler_emit_io_declarations(struct spirv_compiler *compiler) if (bitmap_is_set(compiler->program->io_dcls, i) || (compiler->program->shader_version.type == VKD3D_SHADER_TYPE_HULL && i == VKD3DSPR_OUTPOINTID)) { - vsir_dst_param_init(&dst, i, VSIR_DATA_F32, 0); + vsir_dst_operand_init(&dst, i, VSIR_DATA_F32, 0); spirv_compiler_emit_io_register(compiler, &dst); } } diff --git a/libs/vkd3d-shader/tpf.c b/libs/vkd3d-shader/tpf.c index 9232d5396..8af5b1d20 100644 --- a/libs/vkd3d-shader/tpf.c +++ b/libs/vkd3d-shader/tpf.c @@ -773,8 +773,8 @@ static bool shader_is_sm_5_1(const struct vkd3d_shader_sm4_parser *sm4) static bool shader_sm4_read_src_param(struct vkd3d_shader_sm4_parser *priv, const uint32_t **ptr, const uint32_t *end, enum vsir_data_type data_type, struct vkd3d_shader_src_param *src_param); -static bool shader_sm4_read_dst_param(struct vkd3d_shader_sm4_parser *priv, const uint32_t **ptr, - const uint32_t *end, enum vsir_data_type data_type, struct vkd3d_shader_dst_param *dst_param); +static bool tpf_read_dst_operand(struct vkd3d_shader_sm4_parser *tpf, const uint32_t **ptr, + const uint32_t *end, enum vsir_data_type data_type, struct vsir_dst_operand *dst); static bool shader_sm4_read_register_space(struct vkd3d_shader_sm4_parser *priv, const uint32_t **ptr, const uint32_t *end, unsigned int *register_space) @@ -869,7 +869,7 @@ static void shader_sm4_set_descriptor_register_range(struct vkd3d_shader_sm4_par } static void shader_sm4_read_dcl_resource(struct vkd3d_shader_instruction *ins, uint32_t opcode, - uint32_t opcode_token, const uint32_t *tokens, unsigned int token_count, struct vkd3d_shader_sm4_parser *priv) + uint32_t opcode_token, const uint32_t *tokens, unsigned int token_count, struct vkd3d_shader_sm4_parser *tpf) { struct vkd3d_shader_semantic *semantic = &ins->declaration.semantic; enum vkd3d_sm4_resource_type resource_type; @@ -898,8 +898,8 @@ static void shader_sm4_read_dcl_resource(struct vkd3d_shader_instruction *ins, u } reg_data_type = VSIR_DATA_UNUSED; - shader_sm4_read_dst_param(priv, &tokens, end, reg_data_type, &semantic->resource.reg); - shader_sm4_set_descriptor_register_range(priv, &semantic->resource.reg.reg, &semantic->resource.range); + tpf_read_dst_operand(tpf, &tokens, end, reg_data_type, &semantic->resource.reg); + shader_sm4_set_descriptor_register_range(tpf, &semantic->resource.reg.reg, &semantic->resource.range); components = *tokens++; for (i = 0; i < VKD3D_VEC4_SIZE; i++) @@ -920,7 +920,7 @@ static void shader_sm4_read_dcl_resource(struct vkd3d_shader_instruction *ins, u if (opcode != VKD3D_SM4_OP_DCL_RESOURCE) ins->flags = (opcode_token & VKD3D_SM5_UAV_FLAGS_MASK) >> VKD3D_SM5_UAV_FLAGS_SHIFT; - shader_sm4_read_register_space(priv, &tokens, end, &semantic->resource.range.space); + shader_sm4_read_register_space(tpf, &tokens, end, &semantic->resource.range.space); } static void shader_sm4_read_dcl_constant_buffer(struct vkd3d_shader_instruction *ins, uint32_t opcode, @@ -976,7 +976,7 @@ static void shader_sm4_read_dcl_index_range(struct vkd3d_shader_instruction *ins unsigned int *io_masks; uint32_t write_mask; - shader_sm4_read_dst_param(priv, &tokens, &tokens[token_count], VSIR_DATA_OPAQUE, &index_range->dst); + tpf_read_dst_operand(priv, &tokens, &tokens[token_count], VSIR_DATA_OPAQUE, &index_range->dst); index_range->register_count = *tokens; register_idx = index_range->dst.reg.idx[index_range->dst.reg.idx_count - 1].offset; @@ -1136,68 +1136,54 @@ static void shader_sm4_read_declaration_count(struct vkd3d_shader_instruction *i } static void shader_sm4_read_declaration_dst(struct vkd3d_shader_instruction *ins, uint32_t opcode, - uint32_t opcode_token, const uint32_t *tokens, unsigned int token_count, struct vkd3d_shader_sm4_parser *priv) + uint32_t opcode_token, const uint32_t *tokens, unsigned int token_count, struct vkd3d_shader_sm4_parser *tpf) { - shader_sm4_read_dst_param(priv, &tokens, &tokens[token_count], VSIR_DATA_F32, &ins->declaration.dst); + tpf_read_dst_operand(tpf, &tokens, &tokens[token_count], VSIR_DATA_F32, &ins->declaration.dst); } static void shader_sm4_read_declaration_register_semantic(struct vkd3d_shader_instruction *ins, uint32_t opcode, - uint32_t opcode_token, const uint32_t *tokens, unsigned int token_count, struct vkd3d_shader_sm4_parser *priv) + uint32_t opcode_token, const uint32_t *tokens, unsigned int token_count, struct vkd3d_shader_sm4_parser *tpf) { - shader_sm4_read_dst_param(priv, &tokens, &tokens[token_count], + tpf_read_dst_operand(tpf, &tokens, &tokens[token_count], VSIR_DATA_F32, &ins->declaration.register_semantic.reg); ins->declaration.register_semantic.sysval_semantic = *tokens; } static void shader_sm4_read_dcl_input_ps(struct vkd3d_shader_instruction *ins, uint32_t opcode, - uint32_t opcode_token, const uint32_t *tokens, unsigned int token_count, struct vkd3d_shader_sm4_parser *priv) + uint32_t opcode_token, const uint32_t *tokens, unsigned int token_count, struct vkd3d_shader_sm4_parser *tpf) { - struct vkd3d_shader_dst_param *dst = &ins->declaration.dst; + struct vsir_dst_operand *dst = &ins->declaration.dst; + struct signature_element *e; ins->flags = (opcode_token & VKD3D_SM4_INTERPOLATION_MODE_MASK) >> VKD3D_SM4_INTERPOLATION_MODE_SHIFT; - if (shader_sm4_read_dst_param(priv, &tokens, &tokens[token_count], VSIR_DATA_F32, dst)) + if (tpf_read_dst_operand(tpf, &tokens, &tokens[token_count], VSIR_DATA_F32, dst)) { - struct signature_element *e = vsir_signature_find_element_for_reg( - &priv->program->input_signature, dst->reg.idx[dst->reg.idx_count - 1].offset, dst->write_mask); - - if (!e) - { - WARN("No matching signature element for input register %u with mask %#x.\n", - dst->reg.idx[dst->reg.idx_count - 1].offset, dst->write_mask); - vkd3d_shader_parser_error(&priv->p, VKD3D_SHADER_ERROR_TPF_INVALID_REGISTER_DCL, + if (!(e = vsir_signature_find_element_for_reg(&tpf->program->input_signature, + dst->reg.idx[dst->reg.idx_count - 1].offset, dst->write_mask))) + vkd3d_shader_parser_error(&tpf->p, VKD3D_SHADER_ERROR_TPF_INVALID_REGISTER_DCL, "No matching signature element for input register %u with mask %#x.", dst->reg.idx[dst->reg.idx_count - 1].offset, dst->write_mask); - } else - { e->interpolation_mode = ins->flags; - } } } static void shader_sm4_read_dcl_input_ps_siv(struct vkd3d_shader_instruction *ins, uint32_t opcode, - uint32_t opcode_token, const uint32_t *tokens, unsigned int token_count, struct vkd3d_shader_sm4_parser *priv) + uint32_t opcode_token, const uint32_t *tokens, unsigned int token_count, struct vkd3d_shader_sm4_parser *tpf) { - struct vkd3d_shader_dst_param *dst = &ins->declaration.register_semantic.reg; + struct vsir_dst_operand *dst = &ins->declaration.register_semantic.reg; + struct signature_element *e; ins->flags = (opcode_token & VKD3D_SM4_INTERPOLATION_MODE_MASK) >> VKD3D_SM4_INTERPOLATION_MODE_SHIFT; - if (shader_sm4_read_dst_param(priv, &tokens, &tokens[token_count], VSIR_DATA_F32, dst)) + if (tpf_read_dst_operand(tpf, &tokens, &tokens[token_count], VSIR_DATA_F32, dst)) { - struct signature_element *e = vsir_signature_find_element_for_reg( - &priv->program->input_signature, dst->reg.idx[dst->reg.idx_count - 1].offset, dst->write_mask); - - if (!e) - { - WARN("No matching signature element for input register %u with mask %#x.\n", - dst->reg.idx[dst->reg.idx_count - 1].offset, dst->write_mask); - vkd3d_shader_parser_error(&priv->p, VKD3D_SHADER_ERROR_TPF_INVALID_REGISTER_DCL, + if (!(e = vsir_signature_find_element_for_reg(&tpf->program->input_signature, + dst->reg.idx[dst->reg.idx_count - 1].offset, dst->write_mask))) + vkd3d_shader_parser_error(&tpf->p, VKD3D_SHADER_ERROR_TPF_INVALID_REGISTER_DCL, "No matching signature element for input register %u with mask %#x.", dst->reg.idx[dst->reg.idx_count - 1].offset, dst->write_mask); - } else - { e->interpolation_mode = ins->flags; - } } ins->declaration.register_semantic.sysval_semantic = *tokens; } @@ -1306,36 +1292,36 @@ static void shader_sm5_read_dcl_thread_group(struct vkd3d_shader_instruction *in } static void shader_sm5_read_dcl_uav_raw(struct vkd3d_shader_instruction *ins, uint32_t opcode, uint32_t opcode_token, - const uint32_t *tokens, unsigned int token_count, struct vkd3d_shader_sm4_parser *priv) + const uint32_t *tokens, unsigned int token_count, struct vkd3d_shader_sm4_parser *tpf) { struct vkd3d_shader_raw_resource *resource = &ins->declaration.raw_resource; const uint32_t *end = &tokens[token_count]; - shader_sm4_read_dst_param(priv, &tokens, end, VSIR_DATA_UNUSED, &resource->resource.reg); - shader_sm4_set_descriptor_register_range(priv, &resource->resource.reg.reg, &resource->resource.range); + tpf_read_dst_operand(tpf, &tokens, end, VSIR_DATA_UNUSED, &resource->resource.reg); + shader_sm4_set_descriptor_register_range(tpf, &resource->resource.reg.reg, &resource->resource.range); ins->flags = (opcode_token & VKD3D_SM5_UAV_FLAGS_MASK) >> VKD3D_SM5_UAV_FLAGS_SHIFT; - shader_sm4_read_register_space(priv, &tokens, end, &resource->resource.range.space); + shader_sm4_read_register_space(tpf, &tokens, end, &resource->resource.range.space); } static void shader_sm5_read_dcl_uav_structured(struct vkd3d_shader_instruction *ins, uint32_t opcode, - uint32_t opcode_token, const uint32_t *tokens, unsigned int token_count, struct vkd3d_shader_sm4_parser *priv) + uint32_t opcode_token, const uint32_t *tokens, unsigned int token_count, struct vkd3d_shader_sm4_parser *tpf) { struct vkd3d_shader_structured_resource *resource = &ins->declaration.structured_resource; const uint32_t *end = &tokens[token_count]; - shader_sm4_read_dst_param(priv, &tokens, end, VSIR_DATA_UNUSED, &resource->resource.reg); - shader_sm4_set_descriptor_register_range(priv, &resource->resource.reg.reg, &resource->resource.range); + tpf_read_dst_operand(tpf, &tokens, end, VSIR_DATA_UNUSED, &resource->resource.reg); + shader_sm4_set_descriptor_register_range(tpf, &resource->resource.reg.reg, &resource->resource.range); ins->flags = (opcode_token & VKD3D_SM5_UAV_FLAGS_MASK) >> VKD3D_SM5_UAV_FLAGS_SHIFT; resource->byte_stride = *tokens++; if (resource->byte_stride % 4) FIXME("Byte stride %u is not multiple of 4.\n", resource->byte_stride); - shader_sm4_read_register_space(priv, &tokens, end, &resource->resource.range.space); + shader_sm4_read_register_space(tpf, &tokens, end, &resource->resource.range.space); } static void shader_sm5_read_dcl_tgsm_raw(struct vkd3d_shader_instruction *ins, uint32_t opcode, - uint32_t opcode_token, const uint32_t *tokens, unsigned int token_count, struct vkd3d_shader_sm4_parser *priv) + uint32_t opcode_token, const uint32_t *tokens, unsigned int token_count, struct vkd3d_shader_sm4_parser *tpf) { - shader_sm4_read_dst_param(priv, &tokens, &tokens[token_count], VSIR_DATA_F32, &ins->declaration.tgsm_raw.reg); + tpf_read_dst_operand(tpf, &tokens, &tokens[token_count], VSIR_DATA_F32, &ins->declaration.tgsm_raw.reg); ins->declaration.tgsm_raw.byte_count = *tokens; if (ins->declaration.tgsm_raw.byte_count % 4) FIXME("Byte count %u is not multiple of 4.\n", ins->declaration.tgsm_raw.byte_count); @@ -1343,10 +1329,9 @@ static void shader_sm5_read_dcl_tgsm_raw(struct vkd3d_shader_instruction *ins, u } static void shader_sm5_read_dcl_tgsm_structured(struct vkd3d_shader_instruction *ins, uint32_t opcode, - uint32_t opcode_token, const uint32_t *tokens, unsigned int token_count, struct vkd3d_shader_sm4_parser *priv) + uint32_t opcode_token, const uint32_t *tokens, unsigned int token_count, struct vkd3d_shader_sm4_parser *tpf) { - shader_sm4_read_dst_param(priv, &tokens, &tokens[token_count], - VSIR_DATA_F32, &ins->declaration.tgsm_structured.reg); + tpf_read_dst_operand(tpf, &tokens, &tokens[token_count], VSIR_DATA_F32, &ins->declaration.tgsm_structured.reg); ins->declaration.tgsm_structured.byte_stride = *tokens++; ins->declaration.tgsm_structured.structure_count = *tokens; if (ins->declaration.tgsm_structured.byte_stride % 4) @@ -1355,28 +1340,28 @@ static void shader_sm5_read_dcl_tgsm_structured(struct vkd3d_shader_instruction } static void shader_sm5_read_dcl_resource_structured(struct vkd3d_shader_instruction *ins, uint32_t opcode, - uint32_t opcode_token, const uint32_t *tokens, unsigned int token_count, struct vkd3d_shader_sm4_parser *priv) + uint32_t opcode_token, const uint32_t *tokens, unsigned int token_count, struct vkd3d_shader_sm4_parser *tpf) { struct vkd3d_shader_structured_resource *resource = &ins->declaration.structured_resource; const uint32_t *end = &tokens[token_count]; - shader_sm4_read_dst_param(priv, &tokens, end, VSIR_DATA_UNUSED, &resource->resource.reg); - shader_sm4_set_descriptor_register_range(priv, &resource->resource.reg.reg, &resource->resource.range); + tpf_read_dst_operand(tpf, &tokens, end, VSIR_DATA_UNUSED, &resource->resource.reg); + shader_sm4_set_descriptor_register_range(tpf, &resource->resource.reg.reg, &resource->resource.range); resource->byte_stride = *tokens++; if (resource->byte_stride % 4) FIXME("Byte stride %u is not multiple of 4.\n", resource->byte_stride); - shader_sm4_read_register_space(priv, &tokens, end, &resource->resource.range.space); + shader_sm4_read_register_space(tpf, &tokens, end, &resource->resource.range.space); } static void shader_sm5_read_dcl_resource_raw(struct vkd3d_shader_instruction *ins, uint32_t opcode, - uint32_t opcode_token, const uint32_t *tokens, unsigned int token_count, struct vkd3d_shader_sm4_parser *priv) + uint32_t opcode_token, const uint32_t *tokens, unsigned int token_count, struct vkd3d_shader_sm4_parser *tpf) { struct vkd3d_shader_raw_resource *resource = &ins->declaration.raw_resource; const uint32_t *end = &tokens[token_count]; - shader_sm4_read_dst_param(priv, &tokens, end, VSIR_DATA_UNUSED, &resource->resource.reg); - shader_sm4_set_descriptor_register_range(priv, &resource->resource.reg.reg, &resource->resource.range); - shader_sm4_read_register_space(priv, &tokens, end, &resource->resource.range.space); + tpf_read_dst_operand(tpf, &tokens, end, VSIR_DATA_UNUSED, &resource->resource.reg); + shader_sm4_set_descriptor_register_range(tpf, &resource->resource.reg.reg, &resource->resource.range); + shader_sm4_read_register_space(tpf, &tokens, end, &resource->resource.range.space); } static void shader_sm5_read_sync(struct vkd3d_shader_instruction *ins, uint32_t opcode, uint32_t opcode_token, @@ -2432,8 +2417,8 @@ static bool shader_sm4_read_src_param(struct vkd3d_shader_sm4_parser *priv, cons return true; } -static bool shader_sm4_read_dst_param(struct vkd3d_shader_sm4_parser *priv, const uint32_t **ptr, - const uint32_t *end, enum vsir_data_type data_type, struct vkd3d_shader_dst_param *dst_param) +static bool tpf_read_dst_operand(struct vkd3d_shader_sm4_parser *tpf, const uint32_t **ptr, + const uint32_t *end, enum vsir_data_type data_type, struct vsir_dst_operand *dst) { enum vkd3d_sm4_swizzle_type swizzle_type; enum vkd3d_shader_src_modifier modifier; @@ -2447,7 +2432,7 @@ static bool shader_sm4_read_dst_param(struct vkd3d_shader_sm4_parser *priv, cons } token = **ptr; - if (!shader_sm4_read_param(priv, ptr, end, data_type, &dst_param->reg, &modifier)) + if (!shader_sm4_read_param(tpf, ptr, end, data_type, &dst->reg, &modifier)) { ERR("Failed to read parameter.\n"); return false; @@ -2462,11 +2447,11 @@ static bool shader_sm4_read_dst_param(struct vkd3d_shader_sm4_parser *priv, cons switch ((dimension = (token & VKD3D_SM4_DIMENSION_MASK) >> VKD3D_SM4_DIMENSION_SHIFT)) { case VKD3D_SM4_DIMENSION_NONE: - dst_param->write_mask = 0; + dst->write_mask = 0; break; case VKD3D_SM4_DIMENSION_SCALAR: - dst_param->write_mask = VKD3DSP_WRITEMASK_0; + dst->write_mask = VKD3DSP_WRITEMASK_0; break; case VKD3D_SM4_DIMENSION_VEC4: @@ -2474,45 +2459,42 @@ static bool shader_sm4_read_dst_param(struct vkd3d_shader_sm4_parser *priv, cons switch (swizzle_type) { case VKD3D_SM4_SWIZZLE_NONE: - dst_param->write_mask = (token & VKD3D_SM4_WRITEMASK_MASK) >> VKD3D_SM4_WRITEMASK_SHIFT; + dst->write_mask = (token & VKD3D_SM4_WRITEMASK_MASK) >> VKD3D_SM4_WRITEMASK_SHIFT; break; case VKD3D_SM4_SWIZZLE_VEC4: swizzle = swizzle_from_sm4((token & VKD3D_SM4_SWIZZLE_MASK) >> VKD3D_SM4_SWIZZLE_SHIFT); if (swizzle != VKD3D_SHADER_NO_SWIZZLE) { - FIXME("Unhandled swizzle %#x.\n", swizzle); - vkd3d_shader_parser_warning(&priv->p, VKD3D_SHADER_WARNING_TPF_UNHANDLED_REGISTER_SWIZZLE, + vkd3d_shader_parser_warning(&tpf->p, VKD3D_SHADER_WARNING_TPF_UNHANDLED_REGISTER_SWIZZLE, "Unhandled destination register swizzle %#x.", swizzle); } - dst_param->write_mask = VKD3DSP_WRITEMASK_ALL; + dst->write_mask = VKD3DSP_WRITEMASK_ALL; break; default: - FIXME("Unhandled swizzle type %#x.\n", swizzle_type); - vkd3d_shader_parser_error(&priv->p, VKD3D_SHADER_ERROR_TPF_INVALID_REGISTER_SWIZZLE, + vkd3d_shader_parser_error(&tpf->p, VKD3D_SHADER_ERROR_TPF_INVALID_REGISTER_SWIZZLE, "Destination register swizzle type %#x is invalid.", swizzle_type); break; } break; default: - FIXME("Unhandled dimension %#x.\n", dimension); - vkd3d_shader_parser_error(&priv->p, VKD3D_SHADER_ERROR_TPF_INVALID_REGISTER_DIMENSION, + vkd3d_shader_parser_error(&tpf->p, VKD3D_SHADER_ERROR_TPF_INVALID_REGISTER_DIMENSION, "Destination register dimension %#x is invalid.", dimension); break; } if (data_type == VSIR_DATA_F64) - dst_param->write_mask = vsir_write_mask_64_from_32(dst_param->write_mask); + dst->write_mask = vsir_write_mask_64_from_32(dst->write_mask); /* Some scalar registers are declared with no write mask in shader bytecode. */ - if (!dst_param->write_mask && shader_sm4_is_scalar_register(&dst_param->reg)) - dst_param->write_mask = VKD3DSP_WRITEMASK_0; - dst_param->modifiers = 0; - dst_param->shift = 0; + if (!dst->write_mask && shader_sm4_is_scalar_register(&dst->reg)) + dst->write_mask = VKD3DSP_WRITEMASK_0; + dst->modifiers = 0; + dst->shift = 0; - if (register_is_input_output(&dst_param->reg) && !shader_sm4_validate_input_output_register(priv, - &dst_param->reg, dst_param->write_mask)) + if (register_is_input_output(&dst->reg) + && !shader_sm4_validate_input_output_register(tpf, &dst->reg, dst->write_mask)) return false; return true; @@ -2607,9 +2589,9 @@ static void shader_sm4_read_instruction(struct vkd3d_shader_sm4_parser *sm4, str const struct vkd3d_sm4_opcode_info *opcode_info; uint32_t opcode_token, opcode, previous_token; struct vsir_program *program = sm4->program; - struct vkd3d_shader_dst_param *dst_params; struct vkd3d_shader_src_param *src_params; const uint32_t **ptr = &sm4->ptr; + struct vsir_dst_operand *dst; unsigned int i, len; const uint32_t *p; uint32_t precise; @@ -2706,23 +2688,21 @@ static void shader_sm4_read_instruction(struct vkd3d_shader_sm4_parser *sm4, str precise = (opcode_token & VKD3D_SM5_PRECISE_MASK) >> VKD3D_SM5_PRECISE_SHIFT; ins->flags |= precise << VKD3DSI_PRECISE_SHIFT; - ins->dst = dst_params = vsir_program_get_dst_params(program, ins->dst_count); - if (!dst_params && ins->dst_count) + ins->dst = dst = vsir_program_get_dst_operands(program, ins->dst_count); + if (!dst && ins->dst_count) { - ERR("Failed to allocate dst parameters.\n"); vkd3d_shader_parser_error(&sm4->p, VKD3D_SHADER_ERROR_TPF_OUT_OF_MEMORY, "Out of memory."); ins->opcode = VSIR_OP_INVALID; return; } for (i = 0; i < ins->dst_count; ++i) { - if (!(shader_sm4_read_dst_param(sm4, &p, *ptr, map_data_type(opcode_info->dst_info[i]), - &dst_params[i]))) + if (!(tpf_read_dst_operand(sm4, &p, *ptr, map_data_type(opcode_info->dst_info[i]), &dst[i]))) { ins->opcode = VSIR_OP_INVALID; return; } - dst_params[i].modifiers |= instruction_dst_modifier; + dst[i].modifiers |= instruction_dst_modifier; } for (i = 0; i < ins->src_count; ++i) @@ -3412,7 +3392,7 @@ struct sm4_instruction struct sm4_instruction_modifier modifiers[1]; unsigned int modifier_count; - struct vkd3d_shader_dst_param dsts[2]; + struct vsir_dst_operand dsts[2]; unsigned int dst_count; struct vkd3d_shader_src_param srcs[5]; @@ -3533,7 +3513,7 @@ static void sm4_write_register_index(const struct tpf_compiler *tpf, const struc } } -static void sm4_write_dst_register(const struct tpf_compiler *tpf, const struct vkd3d_shader_dst_param *dst) +static void sm4_write_dst_register(const struct tpf_compiler *tpf, const struct vsir_dst_operand *dst) { struct vkd3d_bytecode_buffer *buffer = tpf->buffer; uint32_t token = 0; @@ -3756,7 +3736,7 @@ static void tpf_dcl_indexable_temp(const struct tpf_compiler *tpf, const struct } static void tpf_dcl_semantic(const struct tpf_compiler *tpf, enum vkd3d_sm4_opcode opcode, - const struct vkd3d_shader_dst_param *dst, uint32_t interpolation_flags) + const struct vsir_dst_operand *dst, uint32_t interpolation_flags) { struct sm4_instruction instr = { diff --git a/libs/vkd3d-shader/vkd3d_shader_private.h b/libs/vkd3d-shader/vkd3d_shader_private.h index 0f0e61377..29a0b36a5 100644 --- a/libs/vkd3d-shader/vkd3d_shader_private.h +++ b/libs/vkd3d-shader/vkd3d_shader_private.h @@ -1074,7 +1074,7 @@ static inline enum vkd3d_shader_register_type vsir_register_type_from_sysval_inp } } -struct vkd3d_shader_dst_param +struct vsir_dst_operand { struct vkd3d_shader_register reg; uint32_t write_mask; @@ -1082,6 +1082,10 @@ struct vkd3d_shader_dst_param unsigned int shift; }; +void vsir_dst_operand_init(struct vsir_dst_operand *dst, enum vkd3d_shader_register_type reg_type, + enum vsir_data_type data_type, unsigned int idx_count); +void vsir_dst_operand_init_null(struct vsir_dst_operand *dst); + struct vkd3d_shader_src_param { struct vkd3d_shader_register reg; @@ -1091,14 +1095,11 @@ struct vkd3d_shader_src_param void vsir_src_param_init(struct vkd3d_shader_src_param *param, enum vkd3d_shader_register_type reg_type, enum vsir_data_type data_type, unsigned int idx_count); -void vsir_dst_param_init(struct vkd3d_shader_dst_param *param, enum vkd3d_shader_register_type reg_type, - enum vsir_data_type data_type, unsigned int idx_count); -void vsir_dst_param_init_null(struct vkd3d_shader_dst_param *dst); void vsir_src_param_init_label(struct vkd3d_shader_src_param *param, unsigned int label_id); struct vkd3d_shader_index_range { - struct vkd3d_shader_dst_param dst; + struct vsir_dst_operand dst; unsigned int register_count; }; @@ -1110,7 +1111,7 @@ struct vkd3d_shader_register_range struct vkd3d_shader_resource { - struct vkd3d_shader_dst_param reg; + struct vsir_dst_operand reg; struct vkd3d_shader_register_range range; }; @@ -1255,7 +1256,7 @@ struct dxbc_shader_desc struct vkd3d_shader_register_semantic { - struct vkd3d_shader_dst_param reg; + struct vsir_dst_operand reg; enum vkd3d_shader_input_sysval_semantic sysval_semantic; }; @@ -1291,7 +1292,7 @@ struct vkd3d_shader_tgsm struct vkd3d_shader_tgsm_raw { - struct vkd3d_shader_dst_param reg; + struct vsir_dst_operand reg; unsigned int alignment; unsigned int byte_count; bool zero_init; @@ -1299,7 +1300,7 @@ struct vkd3d_shader_tgsm_raw struct vkd3d_shader_tgsm_structured { - struct vkd3d_shader_dst_param reg; + struct vsir_dst_operand reg; unsigned int alignment; unsigned int byte_stride; unsigned int structure_count; @@ -1361,7 +1362,7 @@ struct vkd3d_shader_instruction uint32_t flags; size_t dst_count; size_t src_count; - struct vkd3d_shader_dst_param *dst; + struct vsir_dst_operand *dst; struct vkd3d_shader_src_param *src; struct vkd3d_shader_texel_offset texel_offset; enum vkd3d_shader_resource_type resource_type; @@ -1375,7 +1376,7 @@ struct vkd3d_shader_instruction struct vkd3d_shader_semantic semantic; struct vkd3d_shader_register_semantic register_semantic; struct vkd3d_shader_primitive_type primitive_type; - struct vkd3d_shader_dst_param dst; + struct vsir_dst_operand dst; struct vkd3d_shader_constant_buffer cb; struct vkd3d_shader_sampler sampler; unsigned int count; @@ -1694,7 +1695,7 @@ struct vsir_program size_t icb_count; struct vkd3d_shader_param_allocator src_params; - struct vkd3d_shader_param_allocator dst_params; + struct vkd3d_shader_param_allocator dst_operands; enum vsir_denorm_mode f32_denorm_mode; }; @@ -1736,12 +1737,12 @@ static inline struct vkd3d_shader_instruction *vsir_program_append(struct vsir_p return shader_instruction_array_append(&program->instructions); } -static inline struct vkd3d_shader_dst_param *vsir_program_get_dst_params( +static inline struct vsir_dst_operand *vsir_program_get_dst_operands( struct vsir_program *program, unsigned int count) { - struct vkd3d_shader_param_allocator *allocator = &program->dst_params; + struct vkd3d_shader_param_allocator *allocator = &program->dst_operands; - VKD3D_ASSERT(allocator->stride == sizeof(struct vkd3d_shader_dst_param)); + VKD3D_ASSERT(allocator->stride == sizeof(struct vsir_dst_operand)); return shader_param_allocator_get(allocator, count); }