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vkd3d-shader/hlsl: Write SM4 load instructions.
Signed-off-by: Zebediah Figura <zfigura@codeweavers.com> Signed-off-by: Henri Verbeet <hverbeet@codeweavers.com> Signed-off-by: Matteo Bruni <mbruni@codeweavers.com> Signed-off-by: Alexandre Julliard <julliard@winehq.org>
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@ -274,7 +274,6 @@ XFAIL_TESTS = \
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tests/hlsl-static-initializer.shader_test \
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tests/hlsl-storage-qualifiers.shader_test \
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tests/hlsl-struct-assignment.shader_test \
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tests/hlsl-struct-semantics.shader_test \
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tests/hlsl-vector-indexing.shader_test \
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tests/hlsl-vector-indexing-uniform.shader_test \
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tests/math.shader_test \
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@ -605,7 +605,42 @@ static void sm4_register_from_deref(struct hlsl_ctx *ctx, struct sm4_register *r
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{
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const struct hlsl_ir_var *var = deref->var;
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if (var->is_output_semantic)
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if (var->is_uniform)
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{
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reg->type = VKD3D_SM4_RT_CONSTBUFFER;
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reg->idx[0] = var->buffer->reg.id;
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reg->idx[1] = var->buffer_offset / 4;
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reg->idx_count = 2;
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*writemask = ((1u << data_type->dimx) - 1) << (var->buffer_offset & 3);
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}
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else if (var->is_input_semantic)
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{
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bool has_idx;
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if (hlsl_sm4_register_from_semantic(ctx, &var->semantic, false, ®->type, &has_idx))
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{
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if (has_idx)
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{
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reg->idx[0] = var->semantic.index;
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reg->idx_count = 1;
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}
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reg->dim = VKD3D_SM4_DIMENSION_VEC4;
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*writemask = (1u << data_type->dimx) - 1;
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}
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else
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{
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struct hlsl_reg hlsl_reg = hlsl_reg_from_deref(deref, data_type);
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assert(hlsl_reg.allocated);
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reg->type = VKD3D_SM4_RT_INPUT;
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reg->dim = VKD3D_SM4_DIMENSION_VEC4;
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reg->idx[0] = hlsl_reg.id;
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reg->idx_count = 1;
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*writemask = hlsl_reg.writemask;
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}
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}
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else if (var->is_output_semantic)
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{
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bool has_idx;
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@ -844,6 +879,25 @@ static void write_sm4_ret(struct vkd3d_bytecode_buffer *buffer)
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write_sm4_instruction(buffer, &instr);
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}
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static void write_sm4_load(struct hlsl_ctx *ctx,
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struct vkd3d_bytecode_buffer *buffer, const struct hlsl_ir_load *load)
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{
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struct sm4_instruction instr;
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unsigned int writemask;
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memset(&instr, 0, sizeof(instr));
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instr.opcode = VKD3D_SM4_OP_MOV;
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sm4_register_from_node(&instr.dst.reg, &instr.dst.writemask, &load->node);
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instr.has_dst = 1;
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sm4_register_from_deref(ctx, &instr.srcs[0].reg, &writemask, &load->src, load->node.data_type);
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instr.srcs[0].swizzle = hlsl_map_swizzle(hlsl_swizzle_from_writemask(writemask), instr.dst.writemask);
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instr.src_count = 1;
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write_sm4_instruction(buffer, &instr);
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}
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static void write_sm4_store(struct hlsl_ctx *ctx,
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struct vkd3d_bytecode_buffer *buffer, const struct hlsl_ir_store *store)
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{
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@ -927,6 +981,10 @@ static void write_sm4_shdr(struct hlsl_ctx *ctx,
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switch (instr->type)
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{
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case HLSL_IR_LOAD:
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write_sm4_load(ctx, &buffer, hlsl_ir_load(instr));
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break;
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case HLSL_IR_STORE:
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write_sm4_store(ctx, &buffer, hlsl_ir_store(instr));
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break;
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