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vkd3d-shader/dxil: Support 16-bit types.

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Conor McCarthy 2023-06-13 16:51:11 +10:00 committed by Alexandre Julliard
parent 066ea75945
commit 4f0e5b9069
Notes: Alexandre Julliard 2024-03-11 23:07:09 +01:00 
Approved-by: Giovanni Mascellani (@giomasce)
Approved-by: Conor McCarthy (@cmccarthy)
Approved-by: Henri Verbeet (@hverbeet)
Approved-by: Alexandre Julliard (@julliard)
Merge-Request: https://gitlab.winehq.org/wine/vkd3d/-/merge_requests/519
2 changed files with 22 additions and 5 deletions
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11
libs/vkd3d-shader/dxil.c
View File

@ -2210,6 +2210,8 @@ static enum vkd3d_data_type vkd3d_data_type_from_sm6_type(const struct sm6_type
return VKD3D_DATA_BOOL; return VKD3D_DATA_BOOL;
case 8: case 8:
return VKD3D_DATA_UINT8; return VKD3D_DATA_UINT8;
case 16:
return VKD3D_DATA_UINT16;
case 32: case 32:
return VKD3D_DATA_UINT; return VKD3D_DATA_UINT;
case 64: case 64:
@ -2223,6 +2225,8 @@ static enum vkd3d_data_type vkd3d_data_type_from_sm6_type(const struct sm6_type
{ {
switch (type->u.width) switch (type->u.width)
{ {
case 16:
return VKD3D_DATA_HALF;
case 32: case 32:
return VKD3D_DATA_FLOAT; return VKD3D_DATA_FLOAT;
case 64: case 64:
@ -2887,7 +2891,7 @@ static enum vkd3d_result sm6_parser_constants_init(struct sm6_parser *sm6, const
} }
if (type->u.width == 16) if (type->u.width == 16)
FIXME("Half float type is not supported yet.\n"); dst->u.reg.u.immconst_u32[0] = record->operands[0];
else if (type->u.width == 32) else if (type->u.width == 32)
dst->u.reg.u.immconst_f32[0] = bitcast_uint64_to_float(record->operands[0]); dst->u.reg.u.immconst_f32[0] = bitcast_uint64_to_float(record->operands[0]);
else if (type->u.width == 64) else if (type->u.width == 64)
@ -5130,7 +5134,10 @@ static enum vkd3d_shader_opcode sm6_map_cast_op(uint64_t code, const struct sm6_
break; break;
case CAST_ZEXT: case CAST_ZEXT:
case CAST_SEXT: case CAST_SEXT:
/* nop or min precision. TODO: native 16-bit */ /* nop or min precision. TODO: native 16-bit.
* Extension instructions could be emitted for min precision, but in Windows
* the AMD RX 580 simply drops such instructions, which makes sense as no
* assumptions should be made about any behaviour which depends on bit width. */
if (to->u.width == from->u.width || (to->u.width == 32 && from->u.width == 16)) if (to->u.width == from->u.width || (to->u.width == 32 && from->u.width == 16))
{ {
op = VKD3DSIH_NOP; op = VKD3DSIH_NOP;

16
tests/hlsl/minimum-precision.shader_test
View File

@ -30,16 +30,26 @@ uint4 main() : sv_target
return uint4(u.x + i, u.y + j, 0, 0); return uint4(u.x + i, u.y + j, 0, 0);
} }
[require]
shader model >= 4.0
shader model < 6.0
[test] [test]
uniform 0 uint4 0 0 0 0 uniform 0 uint4 0 0 0 0
draw quad draw quad
probe all rgbaui (0x7fff, 0xffff, 0, 0) probe all rgbaui (0x7fff, 0xffff, 0, 0)
[require]
shader model >= 6.0
[test]
uniform 0 uint4 0 0 0 0
draw quad
probe all rgbaui (0x7fff, 0xffffffff, 0, 0)
% The code d3dcompiler_47 produces for this appears correct, but the result % The code d3dcompiler_47 produces for this appears correct, but the result
% is still zero in Windows. % is still zero in Windows.
[require]
shader model >= 6.0
[pixel shader] [pixel shader]
uniform min16uint4 u; uniform min16uint4 u;
@ -55,7 +65,7 @@ uint4 main() : sv_target
uniform 0 uint4 0 0 0 0 uniform 0 uint4 0 0 0 0
uniform 4 uint 2 uniform 4 uint 2
draw quad draw quad
probe all rgbaui (0x7fff, 0xffff, 0, 0) probe all rgbaui (0x7fff, 0xffffffff, 0, 0)
uniform 0 uint4 0 0 0 0 uniform 0 uint4 0 0 0 0
uniform 4 uint 0 uniform 4 uint 0
draw quad draw quad