vkd3d-shader/hlsl: Flatten conditional branches containing stores.

For an if block

    if (cond)
    {
        <then_block>
    }
    else
    {
        <else_block>
    }

We flatten it by first replacing any store instruction `v[[k]] = x`
in the then_block with the following:

    1: load(v[[k]])
    2: cond ? x : @1
    3: v[[k]] = @2

Similarly, we replace any store instruction `v[[k]] = x` in the
else_block with the following:

    1: load(v[[k]])
    2: cond ? @1 : x
    3: v[[k]] = @2

Then we can concatenate <then_block> and <else_block> together and
get rid of the if block.
This commit is contained in:
Shaun Ren
2025-10-16 23:30:46 -04:00
committed by Henri Verbeet
parent 200e66ba4f
commit 4d5a1528ab
Notes: Henri Verbeet 2025-10-30 19:59:51 +01:00
Approved-by: Francisco Casas (@fcasas)
Approved-by: Elizabeth Figura (@zfigura)
Approved-by: Henri Verbeet (@hverbeet)
Merge-Request: https://gitlab.winehq.org/wine/vkd3d/-/merge_requests/1732
10 changed files with 374 additions and 141 deletions

View File

@@ -16,7 +16,7 @@ uniform 0 float4 9 8 7 6
todo(sm<4 | glsl | msl & sm>=6) draw quad
probe (0, 0) f32(1, 2, 3, 4)
[pixel shader todo(sm<4)]
[pixel shader todo]
uniform float4 x;
float4 main() : sv_target
@@ -29,10 +29,10 @@ float4 main() : sv_target
[test]
uniform 0 float4 1 2 3 4
todo(sm<4 | glsl | msl & sm>=6) draw quad
todo(sm<6 | msl) draw quad
probe (0, 0) f32(1, 2, 3, 4)
uniform 0 float4 9 8 7 6
todo(sm<4 | glsl | msl & sm>=6) draw quad
todo(sm<6 | msl) draw quad
probe (0, 0) f32(1, 2, 3, 4)
[pixel shader todo(sm<4)]
@@ -56,7 +56,7 @@ uniform 0 float4 9 8 7 6
todo(sm<4 | glsl | msl & sm>=6) draw quad
probe (0, 0) f32(1, 2, 3, 4)
[pixel shader todo(sm<4)]
[pixel shader todo]
uniform float4 x;
float4 main() : sv_target
@@ -72,10 +72,10 @@ float4 main() : sv_target
[test]
uniform 0 float4 1 2 3 4
todo(sm<4 | glsl | msl & sm>=6) draw quad
todo(sm<6 | msl) draw quad
probe (0, 0) f32(1, 2, 3, 4)
uniform 0 float4 9 8 7 6
todo(sm<4 | glsl | msl & sm>=6) draw quad
todo(sm<6 | msl) draw quad
probe (0, 0) f32(1, 2, 3, 4)
[require]