vkd3d-shader/hlsl: Flatten conditional branches containing stores.

For an if block

    if (cond)
    {
        <then_block>
    }
    else
    {
        <else_block>
    }

We flatten it by first replacing any store instruction `v[[k]] = x`
in the then_block with the following:

    1: load(v[[k]])
    2: cond ? x : @1
    3: v[[k]] = @2

Similarly, we replace any store instruction `v[[k]] = x` in the
else_block with the following:

    1: load(v[[k]])
    2: cond ? @1 : x
    3: v[[k]] = @2

Then we can concatenate <then_block> and <else_block> together and
get rid of the if block.
This commit is contained in:
Shaun Ren
2025-10-16 23:30:46 -04:00
committed by Henri Verbeet
parent 200e66ba4f
commit 4d5a1528ab
Notes: Henri Verbeet 2025-10-30 19:59:51 +01:00
Approved-by: Francisco Casas (@fcasas)
Approved-by: Elizabeth Figura (@zfigura)
Approved-by: Henri Verbeet (@hverbeet)
Merge-Request: https://gitlab.winehq.org/wine/vkd3d/-/merge_requests/1732
10 changed files with 374 additions and 141 deletions

View File

@@ -3916,6 +3916,233 @@ static bool remove_trivial_conditional_branches(struct hlsl_ctx *ctx, struct hls
return true;
}
static bool is_conditional_block_simple(const struct hlsl_block *cond_block)
{
static const unsigned int max_cost = 10;
struct hlsl_ir_node *instr;
unsigned int cost = 0;
LIST_FOR_EACH_ENTRY(instr, &cond_block->instrs, struct hlsl_ir_node, entry)
{
switch (instr->type)
{
case HLSL_IR_CONSTANT:
case HLSL_IR_STRING_CONSTANT:
case HLSL_IR_SWIZZLE:
break;
case HLSL_IR_EXPR:
++cost;
break;
case HLSL_IR_JUMP:
return false;
case HLSL_IR_STORE:
if (hlsl_ir_store(instr)->lhs.var->is_tgsm)
return false;
++cost;
break;
case HLSL_IR_LOAD:
if (hlsl_ir_load(instr)->src.var->is_tgsm)
return false;
break;
default:
return false;
}
if (cost > max_cost)
return false;
}
return true;
}
static bool can_flatten_conditional_block(struct hlsl_ctx *ctx, const struct hlsl_block *cond_block)
{
struct hlsl_ir_node *instr;
LIST_FOR_EACH_ENTRY(instr, &cond_block->instrs, struct hlsl_ir_node, entry)
{
switch (instr->type)
{
case HLSL_IR_CALL:
case HLSL_IR_RESOURCE_STORE:
case HLSL_IR_INTERLOCKED:
case HLSL_IR_SYNC:
goto fail;
case HLSL_IR_JUMP:
{
struct hlsl_ir_jump *jump = hlsl_ir_jump(instr);
if (jump->type != HLSL_IR_JUMP_DISCARD_NZ && jump->type != HLSL_IR_JUMP_DISCARD_NEG)
{
hlsl_fixme(ctx, &instr->loc, "Flattening conditional blocks with non-discard jump instructions.");
return false;
}
hlsl_fixme(ctx, &instr->loc, "Flattening conditional blocks with discard instructions.");
return false;
}
case HLSL_IR_STORE:
if (hlsl_ir_store(instr)->lhs.var->is_tgsm)
goto fail;
break;
case HLSL_IR_IF:
{
struct hlsl_ir_if *iff = hlsl_ir_if(instr);
if (!can_flatten_conditional_block(ctx, &iff->then_block)
|| !can_flatten_conditional_block(ctx, &iff->else_block))
return false;
break;
}
case HLSL_IR_LOOP:
{
struct hlsl_ir_loop *loop = hlsl_ir_loop(instr);
if (!can_flatten_conditional_block(ctx, &loop->iter)
|| !can_flatten_conditional_block(ctx, &loop->body))
return false;
break;
}
case HLSL_IR_SWITCH:
{
struct hlsl_ir_switch *s = hlsl_ir_switch(instr);
struct hlsl_ir_switch_case *c;
LIST_FOR_EACH_ENTRY(c, &s->cases, struct hlsl_ir_switch_case, entry)
{
if (!can_flatten_conditional_block(ctx, &c->body))
return false;
}
break;
}
case HLSL_IR_CONSTANT:
case HLSL_IR_EXPR:
case HLSL_IR_INDEX:
case HLSL_IR_LOAD:
case HLSL_IR_RESOURCE_LOAD:
case HLSL_IR_STRING_CONSTANT:
case HLSL_IR_SWIZZLE:
case HLSL_IR_COMPILE:
case HLSL_IR_SAMPLER_STATE:
case HLSL_IR_STATEBLOCK_CONSTANT:
break;
}
}
return true;
fail:
hlsl_error(ctx, &instr->loc, VKD3D_SHADER_ERROR_HLSL_CANNOT_FLATTEN,
"Conditional branches with side effects cannot be flattened.");
return false;
}
static bool lower_conditional_block_stores(struct hlsl_ctx *ctx, struct hlsl_ir_node *instr,
struct hlsl_ir_node *cond, bool is_then)
{
struct hlsl_ir_node *load, *new_val;
struct hlsl_ir_store *store;
struct hlsl_type *rhs_type;
struct hlsl_block block;
if (instr->type != HLSL_IR_STORE)
return false;
store = hlsl_ir_store(instr);
rhs_type = store->rhs.node->data_type;
VKD3D_ASSERT(rhs_type->class <= HLSL_CLASS_VECTOR);
VKD3D_ASSERT(cond->data_type->e.numeric.dimx == 1);
hlsl_block_init(&block);
load = hlsl_block_add_load_index(ctx, &block, &store->lhs, NULL, &store->node.loc);
if (store->writemask && !hlsl_types_are_equal(rhs_type, load->data_type))
load = hlsl_block_add_swizzle(ctx, &block, hlsl_swizzle_from_writemask(store->writemask),
rhs_type->e.numeric.dimx, load, &store->node.loc);
if (rhs_type->e.numeric.dimx != 1)
cond = hlsl_block_add_swizzle(ctx, &block, HLSL_SWIZZLE(X, X, X, X),
rhs_type->e.numeric.dimx, cond, &store->node.loc);
if (is_then)
new_val = hlsl_add_conditional(ctx, &block, cond, store->rhs.node, load);
else
new_val = hlsl_add_conditional(ctx, &block, cond, load, store->rhs.node);
list_move_before(&store->node.entry, &block.instrs);
hlsl_src_remove(&store->rhs);
hlsl_src_from_node(&store->rhs, new_val);
return true;
}
struct flatten_conditional_block_ctx
{
struct hlsl_ir_node *cond;
bool is_then;
};
static bool lower_conditional_block_instrs(struct hlsl_ctx *ctx, struct hlsl_ir_node *instr, void *context)
{
struct flatten_conditional_block_ctx *flatten_ctx = context;
return lower_conditional_block_stores(ctx, instr, flatten_ctx->cond, flatten_ctx->is_then);
}
static bool flatten_conditional_branches(struct hlsl_ctx *ctx, struct hlsl_ir_node *instr, void *context)
{
struct flatten_conditional_block_ctx flatten_ctx;
struct hlsl_ir_if *iff;
bool force_flatten;
if (instr->type != HLSL_IR_IF)
return false;
iff = hlsl_ir_if(instr);
if (iff->flatten_type == HLSL_IF_FORCE_BRANCH)
return false;
force_flatten = iff->flatten_type == HLSL_IF_FORCE_FLATTEN
|| hlsl_version_lt(ctx, 2, 1); /* Always flatten branches for SM < 2.1. */
if (force_flatten)
{
if (!can_flatten_conditional_block(ctx, &iff->then_block)
|| !can_flatten_conditional_block(ctx, &iff->else_block))
return false;
}
else if (!is_conditional_block_simple(&iff->then_block) || !is_conditional_block_simple(&iff->else_block))
{
/* Only flatten simple blocks by default. */
return false;
}
flatten_ctx.cond = iff->condition.node;
flatten_ctx.is_then = true;
hlsl_transform_ir(ctx, lower_conditional_block_instrs, &iff->then_block, &flatten_ctx);
flatten_ctx.is_then = false;
hlsl_transform_ir(ctx, lower_conditional_block_instrs, &iff->else_block, &flatten_ctx);
list_move_before(&instr->entry, &iff->then_block.instrs);
list_move_before(&instr->entry, &iff->else_block.instrs);
list_remove(&instr->entry);
hlsl_free_instr(instr);
return true;
}
static bool normalize_switch_cases(struct hlsl_ctx *ctx, struct hlsl_ir_node *instr, void *context)
{
struct hlsl_ir_switch_case *c, *def = NULL;
@@ -8494,6 +8721,7 @@ static void hlsl_run_folding_passes(struct hlsl_ctx *ctx, struct hlsl_block *bod
progress |= replace_ir(ctx, fold_swizzle_chains, body);
progress |= replace_ir(ctx, fold_trivial_swizzles, body);
progress |= hlsl_transform_ir(ctx, remove_trivial_conditional_branches, body, NULL);
progress |= hlsl_transform_ir(ctx, flatten_conditional_branches, body, NULL);
} while (progress);
replace_ir(ctx, fold_redundant_casts, body);
}
@@ -10047,11 +10275,9 @@ static void sm1_generate_vsir_instr_if(struct hlsl_ctx *ctx, struct vsir_program
struct hlsl_ir_node *instr = &iff->node;
struct vkd3d_shader_instruction *ins;
if (hlsl_version_lt(ctx, 2, 1))
{
hlsl_fixme(ctx, &instr->loc, "Flatten \"if\" conditionals branches.");
return;
}
/* Conditional branches should have already been flattened for SM < 2.1. */
VKD3D_ASSERT(hlsl_version_ge(ctx, 2, 1));
VKD3D_ASSERT(condition->data_type->e.numeric.dimx == 1 && condition->data_type->e.numeric.dimy == 1);
if (!(ins = generate_vsir_add_program_instruction(ctx, program, &instr->loc, VSIR_OP_IFC, 0, 2)))
@@ -14880,6 +15106,14 @@ static void process_entry_function(struct hlsl_ctx *ctx, struct list *semantic_v
hlsl_run_folding_passes(ctx, body);
if (profile->major_version < 4)
{
/* Ternary operations can be potentially introduced by hlsl_run_folding_passes(). */
replace_ir(ctx, lower_ternary, body);
if (ctx->profile->type != VKD3D_SHADER_TYPE_PIXEL)
replace_ir(ctx, lower_cmp, body);
}
do
compute_liveness(ctx, body);
while (hlsl_transform_ir(ctx, dce, body, NULL));