From 3c4889add3fdf9f2afbc1f69c3a7426aa75dfeba Mon Sep 17 00:00:00 2001 From: Francisco Casas Date: Tue, 5 Nov 2024 17:56:27 -0300 Subject: [PATCH] vkd3d-shader/hlsl: Store SM4 SIN and COS in the vsir program. --- libs/vkd3d-shader/hlsl_codegen.c | 40 ++++++++++++++++++++++++++++++++ libs/vkd3d-shader/tpf.c | 32 +------------------------ 2 files changed, 41 insertions(+), 31 deletions(-) diff --git a/libs/vkd3d-shader/hlsl_codegen.c b/libs/vkd3d-shader/hlsl_codegen.c index 2bca811c..6be84899 100644 --- a/libs/vkd3d-shader/hlsl_codegen.c +++ b/libs/vkd3d-shader/hlsl_codegen.c @@ -7988,6 +7988,36 @@ static bool sm4_generate_vsir_instr_expr_cast(struct hlsl_ctx *ctx, } } +static void sm4_generate_vsir_expr_with_two_destinations(struct hlsl_ctx *ctx, struct vsir_program *program, + enum vkd3d_shader_opcode opcode, const struct hlsl_ir_expr *expr, unsigned int dst_idx) +{ + struct vkd3d_shader_dst_param *dst_param, *null_param; + const struct hlsl_ir_node *instr = &expr->node; + struct vkd3d_shader_instruction *ins; + unsigned int i, src_count; + + VKD3D_ASSERT(instr->reg.allocated); + + for (i = 0; i < HLSL_MAX_OPERANDS; ++i) + { + if (expr->operands[i].node) + src_count = i + 1; + } + + if (!(ins = generate_vsir_add_program_instruction(ctx, program, &instr->loc, opcode, 2, src_count))) + return; + + dst_param = &ins->dst[dst_idx]; + vsir_dst_from_hlsl_node(dst_param, ctx, instr); + + null_param = &ins->dst[1 - dst_idx]; + vsir_dst_param_init(null_param, VKD3DSPR_NULL, VKD3D_DATA_FLOAT, 0); + null_param->reg.dimension = VSIR_DIMENSION_NONE; + + for (i = 0; i < src_count; ++i) + vsir_src_from_hlsl_node(&ins->src[i], ctx, expr->operands[i].node, dst_param->write_mask); +} + static bool sm4_generate_vsir_instr_expr(struct hlsl_ctx *ctx, struct vsir_program *program, struct hlsl_ir_expr *expr, const char *dst_type_name) { @@ -8022,6 +8052,11 @@ static bool sm4_generate_vsir_instr_expr(struct hlsl_ctx *ctx, generate_vsir_instr_expr_single_instr_op(ctx, program, expr, VKD3DSIH_ROUND_PI, 0, 0, true); return true; + case HLSL_OP1_COS: + VKD3D_ASSERT(type_is_float(dst_type)); + sm4_generate_vsir_expr_with_two_destinations(ctx, program, VKD3DSIH_SINCOS, expr, 1); + return true; + case HLSL_OP1_DSX: VKD3D_ASSERT(type_is_float(dst_type)); generate_vsir_instr_expr_single_instr_op(ctx, program, expr, VKD3DSIH_DSX, 0, 0, true); @@ -8120,6 +8155,11 @@ static bool sm4_generate_vsir_instr_expr(struct hlsl_ctx *ctx, generate_vsir_instr_expr_single_instr_op(ctx, program, expr, VKD3DSIH_RSQ, 0, 0, true); return true; + case HLSL_OP1_SIN: + VKD3D_ASSERT(type_is_float(dst_type)); + sm4_generate_vsir_expr_with_two_destinations(ctx, program, VKD3DSIH_SINCOS, expr, 0); + return true; + case HLSL_OP1_SQRT: VKD3D_ASSERT(type_is_float(dst_type)); generate_vsir_instr_expr_single_instr_op(ctx, program, expr, VKD3DSIH_SQRT, 0, 0, true); diff --git a/libs/vkd3d-shader/tpf.c b/libs/vkd3d-shader/tpf.c index a316bef5..00256214 100644 --- a/libs/vkd3d-shader/tpf.c +++ b/libs/vkd3d-shader/tpf.c @@ -5050,27 +5050,6 @@ static void write_sm4_unary_op(const struct tpf_compiler *tpf, enum vkd3d_sm4_op write_sm4_instruction(tpf, &instr); } -static void write_sm4_unary_op_with_two_destinations(const struct tpf_compiler *tpf, enum vkd3d_sm4_opcode opcode, - const struct hlsl_ir_node *dst, unsigned int dst_idx, const struct hlsl_ir_node *src) -{ - struct sm4_instruction instr; - - memset(&instr, 0, sizeof(instr)); - instr.opcode = opcode; - - VKD3D_ASSERT(dst_idx < ARRAY_SIZE(instr.dsts)); - sm4_dst_from_node(&instr.dsts[dst_idx], dst); - instr.dsts[1 - dst_idx].reg.type = VKD3DSPR_NULL; - instr.dsts[1 - dst_idx].reg.dimension = VSIR_DIMENSION_NONE; - instr.dsts[1 - dst_idx].reg.idx_count = 0; - instr.dst_count = 2; - - sm4_src_from_node(tpf, &instr.srcs[0], src, instr.dsts[dst_idx].write_mask); - instr.src_count = 1; - - write_sm4_instruction(tpf, &instr); -} - static void write_sm4_binary_op(const struct tpf_compiler *tpf, enum vkd3d_sm4_opcode opcode, const struct hlsl_ir_node *dst, const struct hlsl_ir_node *src1, const struct hlsl_ir_node *src2) { @@ -5365,11 +5344,6 @@ static void write_sm4_expr(const struct tpf_compiler *tpf, const struct hlsl_ir_ switch (expr->op) { - case HLSL_OP1_COS: - VKD3D_ASSERT(type_is_float(dst_type)); - write_sm4_unary_op_with_two_destinations(tpf, VKD3D_SM4_OP_SINCOS, &expr->node, 1, arg1); - break; - case HLSL_OP1_RCP: switch (dst_type->e.numeric.type) { @@ -5415,11 +5389,6 @@ static void write_sm4_expr(const struct tpf_compiler *tpf, const struct hlsl_ir_ &expr->node, arg1, 0); break; - case HLSL_OP1_SIN: - VKD3D_ASSERT(type_is_float(dst_type)); - write_sm4_unary_op_with_two_destinations(tpf, VKD3D_SM4_OP_SINCOS, &expr->node, 0, arg1); - break; - case HLSL_OP2_DIV: switch (dst_type->e.numeric.type) { @@ -5993,6 +5962,7 @@ static void tpf_handle_instruction(struct tpf_compiler *tpf, const struct vkd3d_ case VKD3DSIH_ROUND_Z: case VKD3DSIH_RSQ: case VKD3DSIH_SAMPLE_INFO: + case VKD3DSIH_SINCOS: case VKD3DSIH_SQRT: case VKD3DSIH_UGE: case VKD3DSIH_ULT: