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vkd3d-shader/dxil: Rename "handler_idx" to "opcode" in sm6_parser_emit_binop().

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This commit is contained in:
Giovanni Mascellani
2025-10-08 21:44:38 +02:00
committed by Henri Verbeet
parent 32a6967778
commit 39a9f0921c
Notes: Henri Verbeet 2025-10-09 15:58:04 +02:00 
Approved-by: Henri Verbeet (@hverbeet)
Merge-Request: https://gitlab.winehq.org/wine/vkd3d/-/merge_requests/1780
1 changed files with 5 additions and 5 deletions
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10
libs/vkd3d-shader/dxil.c
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@@ -4606,7 +4606,7 @@ static void sm6_parser_emit_binop(struct sm6_parser *sm6, const struct dxil_reco
struct vkd3d_shader_instruction *ins, struct sm6_value *dst) struct vkd3d_shader_instruction *ins, struct sm6_value *dst)
{ {
struct vkd3d_shader_src_param *src_params; struct vkd3d_shader_src_param *src_params;
enum vkd3d_shader_opcode handler_idx; enum vkd3d_shader_opcode opcode;
const struct sm6_value *a, *b; const struct sm6_value *a, *b;
uint32_t type_flags = 0; uint32_t type_flags = 0;
uint64_t code, flags; uint64_t code, flags;
@@ -4624,15 +4624,15 @@ static void sm6_parser_emit_binop(struct sm6_parser *sm6, const struct dxil_reco
return; return;
code = record->operands[i++]; code = record->operands[i++];
if ((handler_idx = map_binary_op(code, a->type, b->type, sm6)) == VSIR_OP_INVALID) if ((opcode = map_binary_op(code, a->type, b->type, sm6)) == VSIR_OP_INVALID)
return; return;
vsir_instruction_init(ins, &sm6->p.location, handler_idx); vsir_instruction_init(ins, &sm6->p.location, opcode);
flags = (record->operand_count > i) ? record->operands[i] : 0; flags = (record->operand_count > i) ? record->operands[i] : 0;
silence_warning = false; silence_warning = false;
switch (handler_idx) switch (opcode)
{ {
case VSIR_OP_ADD: case VSIR_OP_ADD:
case VSIR_OP_MUL: case VSIR_OP_MUL:
@@ -4683,7 +4683,7 @@ static void sm6_parser_emit_binop(struct sm6_parser *sm6, const struct dxil_reco
dst->type = a->type; dst->type = a->type;
if (handler_idx == VSIR_OP_ISHL || handler_idx == VSIR_OP_ISHR || handler_idx == VSIR_OP_USHR) if (opcode == VSIR_OP_ISHL || opcode == VSIR_OP_ISHR || opcode == VSIR_OP_USHR)
{ {
/* DXC emits AND instructions where necessary to mask shift counts. /* DXC emits AND instructions where necessary to mask shift counts.
* Shift binops do not imply masking the shift as the TPF equivalents * Shift binops do not imply masking the shift as the TPF equivalents