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vkd3d-shader/ir: Validate the register type for DCL_OUTPUT instructions.
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Henri Verbeet
2024-11-25 21:02:53 +01:00
Approved-by: Henri Verbeet (@hverbeet) Merge-Request: https://gitlab.winehq.org/wine/vkd3d/-/merge_requests/1279
@ -8098,6 +8098,29 @@ static void vsir_validate_dcl_input_siv(struct validation_context *ctx,
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}
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}
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}
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}
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static void vsir_validate_dcl_output(struct validation_context *ctx,
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const struct vkd3d_shader_instruction *instruction)
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{
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switch (instruction->declaration.dst.reg.type)
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{
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/* Signature output registers. */
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case VKD3DSPR_OUTPUT:
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case VKD3DSPR_PATCHCONST:
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/* Non-signature output registers. */
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case VKD3DSPR_DEPTHOUT:
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case VKD3DSPR_SAMPLEMASK:
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case VKD3DSPR_DEPTHOUTGE:
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case VKD3DSPR_DEPTHOUTLE:
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case VKD3DSPR_OUTSTENCILREF:
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break;
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default:
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validator_error(ctx, VKD3D_SHADER_ERROR_VSIR_INVALID_REGISTER_TYPE,
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"Invalid register type %#x in instruction DCL_OUTPUT.",
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instruction->declaration.dst.reg.type);
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}
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}
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static void vsir_validate_dcl_output_control_point_count(struct validation_context *ctx,
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static void vsir_validate_dcl_output_control_point_count(struct validation_context *ctx,
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const struct vkd3d_shader_instruction *instruction)
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const struct vkd3d_shader_instruction *instruction)
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{
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{
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@ -8410,6 +8433,7 @@ static const struct vsir_validator_instruction_desc vsir_validator_instructions[
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[VKD3DSIH_DCL_INPUT_PS_SIV] = {0, 0, vsir_validate_dcl_input_ps_siv},
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[VKD3DSIH_DCL_INPUT_PS_SIV] = {0, 0, vsir_validate_dcl_input_ps_siv},
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[VKD3DSIH_DCL_INPUT_SGV] = {0, 0, vsir_validate_dcl_input_sgv},
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[VKD3DSIH_DCL_INPUT_SGV] = {0, 0, vsir_validate_dcl_input_sgv},
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[VKD3DSIH_DCL_INPUT_SIV] = {0, 0, vsir_validate_dcl_input_siv},
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[VKD3DSIH_DCL_INPUT_SIV] = {0, 0, vsir_validate_dcl_input_siv},
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[VKD3DSIH_DCL_OUTPUT] = {0, 0, vsir_validate_dcl_output},
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[VKD3DSIH_DCL_OUTPUT_CONTROL_POINT_COUNT] = {0, 0, vsir_validate_dcl_output_control_point_count},
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[VKD3DSIH_DCL_OUTPUT_CONTROL_POINT_COUNT] = {0, 0, vsir_validate_dcl_output_control_point_count},
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[VKD3DSIH_DCL_OUTPUT_TOPOLOGY] = {0, 0, vsir_validate_dcl_output_topology},
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[VKD3DSIH_DCL_OUTPUT_TOPOLOGY] = {0, 0, vsir_validate_dcl_output_topology},
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[VKD3DSIH_DCL_TEMPS] = {0, 0, vsir_validate_dcl_temps},
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[VKD3DSIH_DCL_TEMPS] = {0, 0, vsir_validate_dcl_temps},
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