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vkd3d-shader/dxil: Implement DX intrinsics FMa, FMad, IMad and UMad.

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This commit is contained in:
Conor McCarthy
2023-12-11 16:18:41 +10:00
committed by Alexandre Julliard
parent 421d311a49
commit 33694f08fc
Notes: Alexandre Julliard 2024-03-18 23:25:32 +01:00 
Approved-by: Giovanni Mascellani (@giomasce)
Approved-by: Henri Verbeet (@hverbeet)
Approved-by: Alexandre Julliard (@julliard)
Merge-Request: https://gitlab.winehq.org/wine/vkd3d/-/merge_requests/718
4 changed files with 49 additions and 8 deletions
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40
libs/vkd3d-shader/dxil.c
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@@ -374,6 +374,10 @@ enum dx_intrinsic_opcode
DX_IMIN = 38,
DX_UMAX = 39,
DX_UMIN = 40,
DX_FMAD = 46,
DX_FMA = 47,
DX_IMAD = 48,
DX_UMAD = 49,
DX_IBFE = 51,
DX_UBFE = 52,
DX_CREATE_HANDLE = 57,
@@ -4263,6 +4267,38 @@ static void sm6_parser_emit_dx_create_handle(struct sm6_parser *sm6, enum dx_int
ins->handler_idx = VKD3DSIH_NOP;
}
static enum vkd3d_shader_opcode sm6_dx_map_ma_op(enum dx_intrinsic_opcode op, const struct sm6_type *type)
{
switch (op)
{
case DX_FMA:
return VKD3DSIH_DFMA;
case DX_FMAD:
return VKD3DSIH_MAD;
case DX_IMAD:
case DX_UMAD:
return VKD3DSIH_IMAD;
default:
vkd3d_unreachable();
}
}
static void sm6_parser_emit_dx_ma(struct sm6_parser *sm6, enum dx_intrinsic_opcode op,
const struct sm6_value **operands, struct function_emission_state *state)
{
struct vkd3d_shader_instruction *ins = state->ins;
struct vkd3d_shader_src_param *src_params;
unsigned int i;
vsir_instruction_init(ins, &sm6->p.location, sm6_dx_map_ma_op(op, operands[0]->type));
if (!(src_params = instruction_src_params_alloc(ins, 3, sm6)))
return;
for (i = 0; i < 3; ++i)
src_param_init_from_value(&src_params[i], operands[i]);
instruction_dst_param_init_ssa_scalar(ins, sm6);
}
static void sm6_parser_emit_dx_get_dimensions(struct sm6_parser *sm6, enum dx_intrinsic_opcode op,
const struct sm6_value **operands, struct function_emission_state *state)
{
@@ -5018,6 +5054,8 @@ static const struct sm6_dx_opcode_info sm6_dx_op_table[] =
[DX_FIRST_BIT_HI ] = {"i", "m", sm6_parser_emit_dx_unary},
[DX_FIRST_BIT_LO ] = {"i", "m", sm6_parser_emit_dx_unary},
[DX_FIRST_BIT_SHI ] = {"i", "m", sm6_parser_emit_dx_unary},
[DX_FMA ] = {"g", "RRR", sm6_parser_emit_dx_ma},
[DX_FMAD ] = {"g", "RRR", sm6_parser_emit_dx_ma},
[DX_FMAX ] = {"g", "RR", sm6_parser_emit_dx_binary},
[DX_FMIN ] = {"g", "RR", sm6_parser_emit_dx_binary},
[DX_FRC ] = {"g", "R", sm6_parser_emit_dx_unary},
@@ -5026,6 +5064,7 @@ static const struct sm6_dx_opcode_info sm6_dx_op_table[] =
[DX_HCOS ] = {"g", "R", sm6_parser_emit_dx_unary},
[DX_HSIN ] = {"g", "R", sm6_parser_emit_dx_unary},
[DX_HTAN ] = {"g", "R", sm6_parser_emit_dx_unary},
[DX_IMAD ] = {"m", "RRR", sm6_parser_emit_dx_ma},
[DX_IMAX ] = {"m", "RR", sm6_parser_emit_dx_binary},
[DX_IMIN ] = {"m", "RR", sm6_parser_emit_dx_binary},
[DX_ISFINITE ] = {"1", "g", sm6_parser_emit_dx_unary},
@@ -5058,6 +5097,7 @@ static const struct sm6_dx_opcode_info sm6_dx_op_table[] =
[DX_TEXTURE_LOAD ] = {"o", "HiiiiCCC", sm6_parser_emit_dx_texture_load},
[DX_TEXTURE_STORE ] = {"v", "Hiiiooooc", sm6_parser_emit_dx_texture_store},
[DX_UBFE ] = {"m", "iiR", sm6_parser_emit_dx_tertiary},
[DX_UMAD ] = {"m", "RRR", sm6_parser_emit_dx_ma},
[DX_UMAX ] = {"m", "RR", sm6_parser_emit_dx_binary},
[DX_UMIN ] = {"m", "RR", sm6_parser_emit_dx_binary},
};