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vkd3d-shader: Fix write mask for shader inputs.
Shader inputs with non-contiguous write masks (e.g. xyw) were not handled properly in rare cases. Signed-off-by: Józef Kucia <jkucia@codeweavers.com> Signed-off-by: Henri Verbeet <hverbeet@codeweavers.com> Signed-off-by: Alexandre Julliard <julliard@winehq.org>
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@ -2772,19 +2772,25 @@ static uint32_t vkd3d_dxbc_compiler_emit_load_scalar(struct vkd3d_dxbc_compiler
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uint32_t type_id, ptr_type_id, indexes[1], reg_id, val_id;
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uint32_t type_id, ptr_type_id, indexes[1], reg_id, val_id;
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unsigned int component_idx, reg_component_count;
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unsigned int component_idx, reg_component_count;
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enum vkd3d_component_type component_type;
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enum vkd3d_component_type component_type;
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unsigned int skipped_component_mask;
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assert(reg->type != VKD3DSPR_IMMCONST);
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assert(reg->type != VKD3DSPR_IMMCONST);
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assert(vkd3d_write_mask_component_count(write_mask) == 1);
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assert(vkd3d_write_mask_component_count(write_mask) == 1);
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component_idx = vkd3d_write_mask_get_component_idx(write_mask);
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component_idx = vkd3d_write_mask_get_component_idx(write_mask);
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component_idx = vkd3d_swizzle_get_component(swizzle, component_idx);
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component_idx = vkd3d_swizzle_get_component(swizzle, component_idx);
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skipped_component_mask = ~reg_info->write_mask & ((VKD3DSP_WRITEMASK_0 << component_idx) - 1);
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if (skipped_component_mask)
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component_idx -= vkd3d_write_mask_component_count(skipped_component_mask);
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component_type = vkd3d_component_type_from_data_type(reg->data_type);
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component_type = vkd3d_component_type_from_data_type(reg->data_type);
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reg_component_count = vkd3d_write_mask_component_count(reg_info->write_mask);
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reg_component_count = vkd3d_write_mask_component_count(reg_info->write_mask);
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if (!(reg_info->write_mask & (VKD3DSP_WRITEMASK_0 << component_idx)))
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if (component_idx >= vkd3d_write_mask_component_count(reg_info->write_mask))
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ERR("Invalid component_idx for register %#x, %u (write_mask %#x).\n",
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{
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reg->type, reg->idx[0].offset, reg_info->write_mask);
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ERR("Invalid component_idx %u for register %#x, %u (write_mask %#x).\n",
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component_idx, reg->type, reg->idx[0].offset, reg_info->write_mask);
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}
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type_id = vkd3d_spirv_get_type_id(builder, reg_info->component_type, 1);
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type_id = vkd3d_spirv_get_type_id(builder, reg_info->component_type, 1);
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reg_id = reg_info->id;
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reg_id = reg_info->id;
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@ -3602,6 +3608,7 @@ static uint32_t vkd3d_dxbc_compiler_emit_input(struct vkd3d_dxbc_compiler *compi
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SpvStorageClass storage_class;
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SpvStorageClass storage_class;
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struct rb_entry *entry = NULL;
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struct rb_entry *entry = NULL;
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bool use_private_var = false;
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bool use_private_var = false;
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unsigned int write_mask;
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unsigned int array_size;
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unsigned int array_size;
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unsigned int reg_idx;
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unsigned int reg_idx;
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uint32_t i, index;
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uint32_t i, index;
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@ -3635,6 +3642,8 @@ static uint32_t vkd3d_dxbc_compiler_emit_input(struct vkd3d_dxbc_compiler *compi
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builtin = get_spirv_builtin_for_sysval(compiler, sysval);
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builtin = get_spirv_builtin_for_sysval(compiler, sysval);
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write_mask = signature_element->mask & 0xff;
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component_idx = vkd3d_write_mask_get_component_idx(dst->write_mask);
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component_idx = vkd3d_write_mask_get_component_idx(dst->write_mask);
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component_count = vkd3d_write_mask_component_count(dst->write_mask);
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component_count = vkd3d_write_mask_component_count(dst->write_mask);
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if (builtin)
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if (builtin)
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@ -3650,12 +3659,14 @@ static uint32_t vkd3d_dxbc_compiler_emit_input(struct vkd3d_dxbc_compiler *compi
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component_idx = vkd3d_write_mask_get_component_idx(signature_element->mask & 0xff);
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component_idx = vkd3d_write_mask_get_component_idx(signature_element->mask & 0xff);
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}
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}
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use_private_var = builtin && builtin->fixup_pfn;
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if ((use_private_var = builtin && builtin->fixup_pfn))
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write_mask = dst->write_mask;
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if (input_component_count != VKD3D_VEC4_SIZE
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if (input_component_count != VKD3D_VEC4_SIZE
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&& vkd3d_count_signature_elements_for_reg(shader_signature, reg_idx) > 1)
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&& vkd3d_count_signature_elements_for_reg(shader_signature, reg_idx) > 1)
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{
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{
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use_private_var = true;
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use_private_var = true;
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component_count = VKD3D_VEC4_SIZE;
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component_count = VKD3D_VEC4_SIZE;
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write_mask = VKD3DSP_WRITEMASK_ALL;
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}
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}
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storage_class = SpvStorageClassInput;
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storage_class = SpvStorageClassInput;
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@ -3692,8 +3703,7 @@ static uint32_t vkd3d_dxbc_compiler_emit_input(struct vkd3d_dxbc_compiler *compi
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if (!entry)
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if (!entry)
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{
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{
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vkd3d_symbol_set_register_info(®_symbol, var_id, storage_class,
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vkd3d_symbol_set_register_info(®_symbol, var_id, storage_class,
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use_private_var ? VKD3D_TYPE_FLOAT : component_type,
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use_private_var ? VKD3D_TYPE_FLOAT : component_type, write_mask);
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use_private_var ? vkd3d_write_mask_from_component_count(component_count) : signature_element->mask & 0xff);
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vkd3d_dxbc_compiler_put_symbol(compiler, ®_symbol);
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vkd3d_dxbc_compiler_put_symbol(compiler, ®_symbol);
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vkd3d_dxbc_compiler_emit_register_debug_name(builder, var_id, reg);
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vkd3d_dxbc_compiler_emit_register_debug_name(builder, var_id, reg);
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