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tests/hlsl: Test SM1 vertex shader uniform allocation on indirect addressing.
Here, a vertex shader version of the previous test by Shaun is introduced. Note that in this case the uniform allocates all 4 registers instead of 3 because it is indirectly addressed.
This commit is contained in:
committed by
Henri Verbeet
parent
b6ce1479fe
commit
2327f87e37
Notes:
Henri Verbeet
2025-04-02 19:43:14 +02:00
Approved-by: Elizabeth Figura (@zfigura) Approved-by: Henri Verbeet (@hverbeet) Merge-Request: https://gitlab.winehq.org/wine/vkd3d/-/merge_requests/1434
@@ -439,3 +439,39 @@ probe (0, 0) rgba(1, 1, 1, 1)
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uniform 12 float 1
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uniform 12 float 1
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draw quad
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draw quad
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probe (0, 0) rgba(2, 2, 2, 2)
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probe (0, 0) rgba(2, 2, 2, 2)
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[vertex shader]
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float xs[2][2];
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float idx;
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void main(float4 pos : position, out float t : texcoord, out float4 out_pos : sv_position)
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{
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float y[2] = {xs[0][1], xs[1][0]};
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t = y[idx];
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out_pos = pos;
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}
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// Registers:
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//
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// Name Reg Size
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// ------------ ----- ----
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// xs c0 4
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// idx c4 1
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//
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[pixel shader]
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float4 main(float t : texcoord) : sv_target
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{
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return t;
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}
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[test]
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uniform 0 float 0
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uniform 4 float 1
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uniform 8 float 2
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uniform 12 float 3
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uniform 16 float 0
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draw quad
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todo probe (0, 0) rgba(1, 1, 1, 1)
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uniform 16 float 1
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draw quad
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todo probe (0, 0) rgba(2, 2, 2, 2)
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