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https://gitlab.winehq.org/wine/vkd3d.git
synced 2025-04-13 05:43:18 -07:00
libs/vkd3d-shader: Translate store_raw instructions.
This commit is contained in:
@@ -1074,7 +1074,7 @@ static const struct vkd3d_sm4_opcode_info opcode_table[] =
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{VKD3D_SM5_OP_LD_UAV_TYPED, VKD3DSIH_LD_UAV_TYPED, "u", "iU"},
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{VKD3D_SM5_OP_LD_UAV_TYPED, VKD3DSIH_LD_UAV_TYPED, "u", "iU"},
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{VKD3D_SM5_OP_STORE_UAV_TYPED, VKD3DSIH_STORE_UAV_TYPED, "U", "iu"},
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{VKD3D_SM5_OP_STORE_UAV_TYPED, VKD3DSIH_STORE_UAV_TYPED, "U", "iu"},
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{VKD3D_SM5_OP_LD_RAW, VKD3DSIH_LD_RAW, "u", "iU"},
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{VKD3D_SM5_OP_LD_RAW, VKD3DSIH_LD_RAW, "u", "iU"},
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{VKD3D_SM5_OP_STORE_RAW, VKD3DSIH_STORE_RAW, "U", "iu"},
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{VKD3D_SM5_OP_STORE_RAW, VKD3DSIH_STORE_RAW, "U", "uu"},
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{VKD3D_SM5_OP_LD_STRUCTURED, VKD3DSIH_LD_STRUCTURED, "u", "iiR"},
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{VKD3D_SM5_OP_LD_STRUCTURED, VKD3DSIH_LD_STRUCTURED, "u", "iiR"},
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{VKD3D_SM5_OP_STORE_STRUCTURED, VKD3DSIH_STORE_STRUCTURED, "U", "iiu"},
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{VKD3D_SM5_OP_STORE_STRUCTURED, VKD3DSIH_STORE_STRUCTURED, "U", "iiu"},
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{VKD3D_SM5_OP_ATOMIC_AND, VKD3DSIH_ATOMIC_AND, "U", "iu"},
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{VKD3D_SM5_OP_ATOMIC_AND, VKD3DSIH_ATOMIC_AND, "U", "iu"},
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@@ -1164,6 +1164,13 @@ static uint32_t vkd3d_spirv_build_op_and(struct vkd3d_spirv_builder *builder,
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SpvOpBitwiseAnd, result_type, operand0, operand1);
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SpvOpBitwiseAnd, result_type, operand0, operand1);
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}
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}
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static uint32_t vkd3d_spirv_build_op_shift_right_logical(struct vkd3d_spirv_builder *builder,
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uint32_t result_type, uint32_t base, uint32_t shift)
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{
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return vkd3d_spirv_build_op_tr2(builder, &builder->function_stream,
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SpvOpShiftRightLogical, result_type, base, shift);
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}
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static uint32_t vkd3d_spirv_build_op_convert_utof(struct vkd3d_spirv_builder *builder,
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static uint32_t vkd3d_spirv_build_op_convert_utof(struct vkd3d_spirv_builder *builder,
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uint32_t result_type, uint32_t unsigned_value)
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uint32_t result_type, uint32_t unsigned_value)
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{
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{
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@@ -3935,6 +3942,7 @@ static uint32_t vkd3d_dxbc_compiler_prepare_image(struct vkd3d_dxbc_compiler *co
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if (sampled_type)
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if (sampled_type)
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*sampled_type = resource_symbol->info.resource.sampled_type;
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*sampled_type = resource_symbol->info.resource.sampled_type;
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if (coordinate_component_count)
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*coordinate_component_count = resource_symbol->info.resource.coordinate_component_count;
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*coordinate_component_count = resource_symbol->info.resource.coordinate_component_count;
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return image_id;
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return image_id;
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}
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}
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@@ -3994,6 +4002,53 @@ static void vkd3d_dxbc_compiler_emit_sample(struct vkd3d_dxbc_compiler *compiler
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vkd3d_dxbc_compiler_emit_store_dst(compiler, &dst, val_id);
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vkd3d_dxbc_compiler_emit_store_dst(compiler, &dst, val_id);
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}
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}
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static void vkd3d_dxbc_compiler_emit_store_raw(struct vkd3d_dxbc_compiler *compiler,
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const struct vkd3d_shader_instruction *instruction)
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{
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uint32_t image_id, coordinate_id, type_id, val_id, texel_type_id, texel_id;
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uint32_t base_coordinate_id, component_idx, components[VKD3D_VEC4_SIZE];
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struct vkd3d_spirv_builder *builder = &compiler->spirv_builder;
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const struct vkd3d_shader_dst_param *dst = instruction->dst;
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const struct vkd3d_shader_src_param *src = instruction->src;
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unsigned int i, component_count;
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if (dst->reg.type == VKD3DSPR_GROUPSHAREDMEM)
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{
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FIXME("Compute shared memory not supported.\n");
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return;
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}
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assert(src[1].reg.data_type == VKD3D_DATA_UINT);
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type_id = vkd3d_spirv_get_type_id(builder, VKD3D_TYPE_UINT, 1);
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image_id = vkd3d_dxbc_compiler_prepare_image(compiler, &dst->reg, NULL, NULL);
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coordinate_id = vkd3d_dxbc_compiler_emit_load_src(compiler, &src[0], VKD3DSP_WRITEMASK_0);
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coordinate_id = vkd3d_spirv_build_op_shift_right_logical(builder, type_id,
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coordinate_id, vkd3d_dxbc_compiler_get_constant_uint(compiler, 2));
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/* Mesa Vulkan drivers require the texel parameter to be a 4-component
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* vector. */
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val_id = vkd3d_dxbc_compiler_emit_load_src(compiler, &src[1], dst->write_mask);
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texel_type_id = vkd3d_spirv_get_type_id(builder, VKD3D_TYPE_UINT, VKD3D_VEC4_SIZE);
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component_count = vkd3d_write_mask_component_count(dst->write_mask);
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base_coordinate_id = coordinate_id;
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for (component_idx = 0; component_idx < component_count; ++component_idx)
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{
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for (i = 0; i < VKD3D_VEC4_SIZE; ++i)
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components[i] = component_idx;
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texel_id = vkd3d_spirv_build_op_vector_shuffle(builder,
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texel_type_id, val_id, val_id, components, VKD3D_VEC4_SIZE);
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if (component_idx)
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coordinate_id = vkd3d_spirv_build_op_iadd(builder, type_id,
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base_coordinate_id, vkd3d_dxbc_compiler_get_constant_uint(compiler, component_idx));
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vkd3d_spirv_build_op_image_write(builder, image_id, coordinate_id,
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texel_id, SpvImageOperandsMaskNone, NULL, 0);
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}
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}
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static void vkd3d_dxbc_compiler_emit_store_uav_typed(struct vkd3d_dxbc_compiler *compiler,
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static void vkd3d_dxbc_compiler_emit_store_uav_typed(struct vkd3d_dxbc_compiler *compiler,
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const struct vkd3d_shader_instruction *instruction)
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const struct vkd3d_shader_instruction *instruction)
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{
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{
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@@ -4247,6 +4302,9 @@ void vkd3d_dxbc_compiler_handle_instruction(struct vkd3d_dxbc_compiler *compiler
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case VKD3DSIH_SAMPLE:
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case VKD3DSIH_SAMPLE:
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vkd3d_dxbc_compiler_emit_sample(compiler, instruction);
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vkd3d_dxbc_compiler_emit_sample(compiler, instruction);
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break;
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break;
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case VKD3DSIH_STORE_RAW:
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vkd3d_dxbc_compiler_emit_store_raw(compiler, instruction);
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break;
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case VKD3DSIH_STORE_UAV_TYPED:
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case VKD3DSIH_STORE_UAV_TYPED:
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vkd3d_dxbc_compiler_emit_store_uav_typed(compiler, instruction);
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vkd3d_dxbc_compiler_emit_store_uav_typed(compiler, instruction);
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break;
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break;
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