2023-02-28 17:59:28 -08:00
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/*
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* Copyright 2023 Conor McCarthy for CodeWeavers
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*
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* This library is free software; you can redistribute it and/or
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* modify it under the terms of the GNU Lesser General Public
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* License as published by the Free Software Foundation; either
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* version 2.1 of the License, or (at your option) any later version.
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*
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* This library is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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* Lesser General Public License for more details.
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*
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* You should have received a copy of the GNU Lesser General Public
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* License along with this library; if not, write to the Free Software
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* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301, USA
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*/
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#include "vkd3d_shader_private.h"
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static inline bool shader_register_is_phase_instance_id(const struct vkd3d_shader_register *reg)
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{
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return reg->type == VKD3DSPR_FORKINSTID || reg->type == VKD3DSPR_JOININSTID;
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}
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static bool shader_instruction_is_dcl(const struct vkd3d_shader_instruction *ins)
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{
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return (VKD3DSIH_DCL <= ins->handler_idx && ins->handler_idx <= VKD3DSIH_DCL_VERTICES_OUT)
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|| ins->handler_idx == VKD3DSIH_HS_DECLS;
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}
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static void vkd3d_shader_instruction_make_nop(struct vkd3d_shader_instruction *ins)
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{
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ins->handler_idx = VKD3DSIH_NOP;
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ins->dst_count = 0;
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ins->src_count = 0;
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ins->dst = NULL;
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ins->src = NULL;
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}
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static void shader_register_eliminate_phase_addressing(struct vkd3d_shader_register *reg,
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unsigned int instance_id)
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{
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unsigned int i;
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for (i = 0; i < ARRAY_SIZE(reg->idx) && reg->idx[i].offset != ~0u; ++i)
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{
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if (reg->idx[i].rel_addr && shader_register_is_phase_instance_id(®->idx[i].rel_addr->reg))
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{
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reg->idx[i].rel_addr = NULL;
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reg->idx[i].offset += instance_id;
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}
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}
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}
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static void shader_instruction_eliminate_phase_instance_id(struct vkd3d_shader_instruction *ins,
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unsigned int instance_id)
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{
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struct vkd3d_shader_register *reg;
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unsigned int i;
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for (i = 0; i < ins->src_count; ++i)
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{
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reg = (struct vkd3d_shader_register *)&ins->src[i].reg;
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if (shader_register_is_phase_instance_id(reg))
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{
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reg->type = VKD3DSPR_IMMCONST;
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reg->precision = VKD3D_SHADER_REGISTER_PRECISION_DEFAULT;
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reg->non_uniform = false;
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reg->idx[0].offset = ~0u;
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reg->idx[0].rel_addr = NULL;
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reg->idx[1].offset = ~0u;
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reg->idx[1].rel_addr = NULL;
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reg->idx[2].offset = ~0u;
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reg->idx[2].rel_addr = NULL;
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reg->immconst_type = VKD3D_IMMCONST_SCALAR;
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reg->u.immconst_uint[0] = instance_id;
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continue;
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}
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shader_register_eliminate_phase_addressing(reg, instance_id);
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}
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for (i = 0; i < ins->dst_count; ++i)
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shader_register_eliminate_phase_addressing((struct vkd3d_shader_register *)&ins->dst[i].reg, instance_id);
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}
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2023-04-04 00:55:05 -07:00
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static bool normaliser_is_in_control_point_phase(const struct vkd3d_shader_normaliser *normaliser)
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{
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return normaliser->phase == VKD3DSIH_HS_CONTROL_POINT_PHASE;
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}
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2023-02-28 17:59:28 -08:00
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static bool normaliser_is_in_fork_or_join_phase(const struct vkd3d_shader_normaliser *normaliser)
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{
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return normaliser->phase == VKD3DSIH_HS_FORK_PHASE || normaliser->phase == VKD3DSIH_HS_JOIN_PHASE;
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}
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struct shader_phase_location
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{
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unsigned int index;
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unsigned int instance_count;
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unsigned int instruction_count;
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};
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struct shader_phase_location_array
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{
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/* Unlikely worst case: one phase for each component of each output register. */
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struct shader_phase_location locations[MAX_REG_OUTPUT * VKD3D_VEC4_SIZE];
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unsigned int count;
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};
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static void shader_normaliser_eliminate_phase_related_dcls(struct vkd3d_shader_normaliser *normaliser,
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unsigned int index, struct shader_phase_location_array *locations)
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{
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struct vkd3d_shader_instruction *ins = &normaliser->instructions.elements[index];
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struct shader_phase_location *loc;
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bool b;
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if (ins->handler_idx == VKD3DSIH_HS_FORK_PHASE || ins->handler_idx == VKD3DSIH_HS_JOIN_PHASE)
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{
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b = normaliser_is_in_fork_or_join_phase(normaliser);
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/* Reset the phase info. */
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normaliser->phase_body_idx = ~0u;
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normaliser->phase = ins->handler_idx;
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normaliser->instance_count = 1;
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/* Leave the first occurrence and delete the rest. */
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if (b)
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vkd3d_shader_instruction_make_nop(ins);
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return;
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}
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else if (ins->handler_idx == VKD3DSIH_DCL_HS_FORK_PHASE_INSTANCE_COUNT
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|| ins->handler_idx == VKD3DSIH_DCL_HS_JOIN_PHASE_INSTANCE_COUNT)
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{
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normaliser->instance_count = ins->declaration.count + !ins->declaration.count;
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vkd3d_shader_instruction_make_nop(ins);
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return;
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}
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else if (ins->handler_idx == VKD3DSIH_DCL_INPUT && shader_register_is_phase_instance_id(
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&ins->declaration.dst.reg))
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{
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vkd3d_shader_instruction_make_nop(ins);
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return;
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}
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else if (ins->handler_idx == VKD3DSIH_DCL_TEMPS && normaliser->phase != VKD3DSIH_INVALID)
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{
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/* Leave only the first temp declaration and set it to the max count later. */
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if (!normaliser->max_temp_count)
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normaliser->temp_dcl_idx = index;
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else
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vkd3d_shader_instruction_make_nop(ins);
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normaliser->max_temp_count = max(normaliser->max_temp_count, ins->declaration.count);
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return;
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}
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if (normaliser->phase == VKD3DSIH_INVALID || shader_instruction_is_dcl(ins))
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return;
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if (normaliser->phase_body_idx == ~0u)
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normaliser->phase_body_idx = index;
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if (ins->handler_idx == VKD3DSIH_RET)
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{
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vkd3d_shader_instruction_make_nop(ins);
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if (locations->count >= ARRAY_SIZE(locations->locations))
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{
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FIXME("Insufficient space for phase location.\n");
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return;
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}
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loc = &locations->locations[locations->count++];
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loc->index = normaliser->phase_body_idx;
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loc->instance_count = normaliser->instance_count;
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loc->instruction_count = index - normaliser->phase_body_idx;
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}
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}
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static enum vkd3d_result shader_normaliser_flatten_phases(struct vkd3d_shader_normaliser *normaliser,
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struct shader_phase_location_array *locations)
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{
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struct shader_phase_location *loc;
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unsigned int i, j, k, end, count;
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for (i = 0, count = 0; i < locations->count; ++i)
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count += (locations->locations[i].instance_count - 1) * locations->locations[i].instruction_count;
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if (!shader_instruction_array_reserve(&normaliser->instructions, normaliser->instructions.count + count))
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return VKD3D_ERROR_OUT_OF_MEMORY;
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end = normaliser->instructions.count;
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normaliser->instructions.count += count;
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for (i = locations->count; i > 0; --i)
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{
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loc = &locations->locations[i - 1];
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j = loc->index + loc->instruction_count;
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memmove(&normaliser->instructions.elements[j + count], &normaliser->instructions.elements[j],
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(end - j) * sizeof(*normaliser->instructions.elements));
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end = j;
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count -= (loc->instance_count - 1) * loc->instruction_count;
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loc->index += count;
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}
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for (i = 0, count = 0; i < locations->count; ++i)
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{
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loc = &locations->locations[i];
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/* Make a copy of the non-dcl instructions for each instance. */
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for (j = 1; j < loc->instance_count; ++j)
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{
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for (k = 0; k < loc->instruction_count; ++k)
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{
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if (!shader_instruction_array_clone_instruction(&normaliser->instructions,
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loc->index + loc->instruction_count * j + k, loc->index + k))
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return VKD3D_ERROR_OUT_OF_MEMORY;
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}
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}
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/* Replace each reference to the instance id with a constant instance id. */
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for (j = 0; j < loc->instance_count; ++j)
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{
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for (k = 0; k < loc->instruction_count; ++k)
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shader_instruction_eliminate_phase_instance_id(
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&normaliser->instructions.elements[loc->index + loc->instruction_count * j + k], j);
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}
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}
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return VKD3D_OK;
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}
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2023-04-04 00:55:05 -07:00
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static void shader_register_init(struct vkd3d_shader_register *reg,
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enum vkd3d_shader_register_type reg_type, enum vkd3d_data_type data_type)
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{
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reg->type = reg_type;
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reg->precision = VKD3D_SHADER_REGISTER_PRECISION_DEFAULT;
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reg->non_uniform = false;
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reg->data_type = data_type;
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reg->idx[0].offset = ~0u;
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reg->idx[0].rel_addr = NULL;
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reg->idx[1].offset = ~0u;
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reg->idx[1].rel_addr = NULL;
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reg->idx[2].offset = ~0u;
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reg->idx[2].rel_addr = NULL;
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reg->immconst_type = VKD3D_IMMCONST_SCALAR;
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}
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2023-02-28 17:59:28 -08:00
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static void shader_instruction_init(struct vkd3d_shader_instruction *ins, enum vkd3d_shader_opcode handler_idx)
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{
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memset(ins, 0, sizeof(*ins));
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ins->handler_idx = handler_idx;
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}
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void shader_normaliser_init(struct vkd3d_shader_normaliser *normaliser,
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struct vkd3d_shader_instruction_array *instructions)
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{
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memset(normaliser, 0, sizeof(*normaliser));
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normaliser->phase = VKD3DSIH_INVALID;
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normaliser->instructions = *instructions;
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memset(instructions, 0, sizeof(*instructions));
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}
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enum vkd3d_result shader_normaliser_flatten_hull_shader_phases(struct vkd3d_shader_normaliser *normaliser)
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{
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struct vkd3d_shader_instruction_array *instructions = &normaliser->instructions;
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struct shader_phase_location_array locations;
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enum vkd3d_result result = VKD3D_OK;
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unsigned int i;
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for (i = 0, locations.count = 0; i < instructions->count; ++i)
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shader_normaliser_eliminate_phase_related_dcls(normaliser, i, &locations);
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if ((result = shader_normaliser_flatten_phases(normaliser, &locations)) < 0)
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return result;
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if (normaliser->phase != VKD3DSIH_INVALID)
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{
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if (normaliser->temp_dcl_idx)
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instructions->elements[normaliser->temp_dcl_idx].declaration.count = normaliser->max_temp_count;
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if (!shader_instruction_array_reserve(&normaliser->instructions, normaliser->instructions.count + 1))
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return VKD3D_ERROR_OUT_OF_MEMORY;
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shader_instruction_init(&instructions->elements[instructions->count++], VKD3DSIH_RET);
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}
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return result;
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}
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2023-04-04 00:55:05 -07:00
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static struct vkd3d_shader_src_param *shader_normaliser_create_outpointid_param(struct vkd3d_shader_normaliser *normaliser)
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{
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struct vkd3d_shader_src_param *rel_addr;
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if (!(rel_addr = shader_src_param_allocator_get(&normaliser->instructions.src_params, 1)))
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return NULL;
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shader_register_init(&rel_addr->reg, VKD3DSPR_OUTPOINTID, VKD3D_DATA_UINT);
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rel_addr->swizzle = 0;
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rel_addr->modifiers = 0;
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return rel_addr;
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}
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static bool shader_dst_param_normalise_outpointid(struct vkd3d_shader_dst_param *dst_param,
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struct vkd3d_shader_normaliser *normaliser)
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{
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struct vkd3d_shader_register *reg = &dst_param->reg;
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if (normaliser_is_in_control_point_phase(normaliser) && reg->type == VKD3DSPR_OUTPUT)
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{
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if (reg->idx[2].offset != ~0u)
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{
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FIXME("Cannot insert phase id.\n");
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return false;
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}
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if (reg->idx[1].offset != ~0u)
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{
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WARN("Unexpected address at index 1.\n");
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reg->idx[2] = reg->idx[1];
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}
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reg->idx[1] = reg->idx[0];
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/* The control point id param is implicit here. Avoid later complications by inserting it. */
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reg->idx[0].offset = 0;
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reg->idx[0].rel_addr = normaliser->outpointid_param;
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}
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return true;
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}
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2023-04-04 00:28:48 -07:00
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static void shader_dst_param_io_init(struct vkd3d_shader_dst_param *param,
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const struct vkd3d_shader_signature_element *e, enum vkd3d_shader_register_type reg_type)
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{
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param->write_mask = e->mask;
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param->modifiers = 0;
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param->shift = 0;
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shader_register_init(¶m->reg, reg_type, vkd3d_data_type_from_component_type(e->component_type));
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}
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static enum vkd3d_result shader_normaliser_emit_hs_input(struct vkd3d_shader_normaliser *normaliser,
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const struct vkd3d_shader_signature *s, unsigned int input_control_point_count, unsigned int dst)
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{
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const struct vkd3d_shader_signature_element *e;
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struct vkd3d_shader_instruction *ins;
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struct vkd3d_shader_dst_param *param;
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unsigned int i, count;
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for (i = 0, count = 1; i < s->element_count; ++i)
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count += !!s->elements[i].used_mask;
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if (!shader_instruction_array_reserve(&normaliser->instructions, normaliser->instructions.count + count))
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return VKD3D_ERROR_OUT_OF_MEMORY;
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memmove(&normaliser->instructions.elements[dst + count], &normaliser->instructions.elements[dst],
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(normaliser->instructions.count - dst) * sizeof(*normaliser->instructions.elements));
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normaliser->instructions.count += count;
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ins = &normaliser->instructions.elements[dst];
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shader_instruction_init(ins, VKD3DSIH_HS_CONTROL_POINT_PHASE);
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ins->flags = 1;
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++ins;
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for (i = 0; i < s->element_count; ++i)
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{
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e = &s->elements[i];
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if (!e->used_mask)
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continue;
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if (e->sysval_semantic != VKD3D_SHADER_SV_NONE)
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{
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shader_instruction_init(ins, VKD3DSIH_DCL_INPUT_SIV);
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param = &ins->declaration.register_semantic.reg;
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ins->declaration.register_semantic.sysval_semantic = vkd3d_siv_from_sysval(e->sysval_semantic);
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}
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else
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{
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shader_instruction_init(ins, VKD3DSIH_DCL_INPUT);
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param = &ins->declaration.dst;
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}
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shader_dst_param_io_init(param, e, VKD3DSPR_INPUT);
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param->reg.idx[0].offset = input_control_point_count;
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param->reg.idx[1].offset = i;
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++ins;
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}
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return VKD3D_OK;
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}
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enum vkd3d_result shader_normaliser_normalise_hull_shader_control_point_io(struct vkd3d_shader_normaliser *normaliser,
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const struct vkd3d_shader_signature *input_signature)
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2023-04-04 00:55:05 -07:00
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{
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struct vkd3d_shader_instruction_array *instructions = &normaliser->instructions;
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2023-04-04 00:28:48 -07:00
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unsigned int input_control_point_count;
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2023-04-04 00:55:05 -07:00
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struct vkd3d_shader_instruction *ins;
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unsigned int i, j;
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if (!(normaliser->outpointid_param = shader_normaliser_create_outpointid_param(normaliser)))
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{
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ERR("Failed to allocate src param.\n");
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return VKD3D_ERROR_OUT_OF_MEMORY;
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}
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normaliser->phase = VKD3DSIH_INVALID;
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for (i = 0; i < normaliser->instructions.count; ++i)
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{
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ins = &instructions->elements[i];
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switch (ins->handler_idx)
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{
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case VKD3DSIH_HS_CONTROL_POINT_PHASE:
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case VKD3DSIH_HS_FORK_PHASE:
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case VKD3DSIH_HS_JOIN_PHASE:
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normaliser->phase = ins->handler_idx;
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break;
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default:
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if (shader_instruction_is_dcl(ins))
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break;
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for (j = 0; j < ins->dst_count; ++j)
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{
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if (!shader_dst_param_normalise_outpointid((struct vkd3d_shader_dst_param *)&ins->dst[j],
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normaliser))
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return VKD3D_ERROR_INVALID_ARGUMENT;
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}
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break;
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}
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}
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2023-04-04 00:28:48 -07:00
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normaliser->phase = VKD3DSIH_INVALID;
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input_control_point_count = 1;
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for (i = 0; i < instructions->count; ++i)
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{
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ins = &instructions->elements[i];
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switch (ins->handler_idx)
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{
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case VKD3DSIH_DCL_INPUT_CONTROL_POINT_COUNT:
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input_control_point_count = ins->declaration.count;
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break;
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case VKD3DSIH_HS_CONTROL_POINT_PHASE:
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return VKD3D_OK;
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case VKD3DSIH_HS_FORK_PHASE:
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case VKD3DSIH_HS_JOIN_PHASE:
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return shader_normaliser_emit_hs_input(normaliser, input_signature, input_control_point_count, i);
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default:
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break;
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}
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}
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2023-04-04 00:55:05 -07:00
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return VKD3D_OK;
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}
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2023-02-28 17:59:28 -08:00
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void shader_normaliser_destroy(struct vkd3d_shader_normaliser *normaliser)
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{
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shader_instruction_array_destroy(&normaliser->instructions);
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}
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