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a70c5b7d48
LirBuffer has been modified to provide advance warning of out of memory (OOM) conditions. A new page is allocated LIR_BUF_THRESHOLD instructions prior to reaching the end of page. If the page allocation fails, call to outOmem() will return true. The buffer can still be safely written to during during this period but it is assumed the higher level code will catch this condition and handle it appropriately as writing LIR_BUF_THRESHOLD instructions past this point will cause a crash. This opportunity was also taken to re-factor the code for LirBufWriter making it more platform agnostic. - All non-LInsp data in the instruction stream is now managed through structures that overlay the memory region. - prepFor() was added to replace the multiple ensureReferenceable() calls for each instruction. - insCall() was also modified somewhat in that the arguments are now stored growing downwards from the position of the pseudo instruction LirCallIns. CodegenLIR now has LirBuffer checks at the granularity of each emitXXX() call that is exposed publicly. This seemed like a reasonable approach since a client could potentially call at this level indefinitely. If we want to reduce the frequency of these checks then we'd have to push the check up into the verifier. Assembler OOM handling has also changed. The variable _startingIns was added and contains the location at which the assembler began writing code for the current begin/assem/end sequence. If an OOM condition occurs the assembler will reset the current instruction pointer to _startingIns, effectively overwriting the code that has been generated. This allows the assembler to produce code indefinitely (and without error) until the upper layers have noticed the error and respond accordingly. The constant LARGEST_UNDERRUN_PROT was added and needs to be set to a platform specific value that is equal to or greater than the number of NIns written for the largest possible instruction. i.e. you cannot write more than this number of NIns to the buffer for each call to underrunProtect().
120 lines
3.5 KiB
C++
120 lines
3.5 KiB
C++
/* -*- Mode: C++; c-basic-offset: 4; indent-tabs-mode: t; tab-width: 4 -*- */
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/* ***** BEGIN LICENSE BLOCK *****
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* Version: MPL 1.1/GPL 2.0/LGPL 2.1
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*
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* The contents of this file are subject to the Mozilla Public License Version
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* 1.1 (the "License"); you may not use this file except in compliance with
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* the License. You may obtain a copy of the License at
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* http://www.mozilla.org/MPL/
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*
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* Software distributed under the License is distributed on an "AS IS" basis,
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* WITHOUT WARRANTY OF ANY KIND, either express or implied. See the License
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* for the specific language governing rights and limitations under the
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* License.
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*
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* The Original Code is [Open Source Virtual Machine].
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*
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* The Initial Developer of the Original Code is
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* Adobe System Incorporated.
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* Portions created by the Initial Developer are Copyright (C) 2004-2007
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* the Initial Developer. All Rights Reserved.
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*
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* Contributor(s):
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* Adobe AS3 Team
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*
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* Alternatively, the contents of this file may be used under the terms of
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* either the GNU General Public License Version 2 or later (the "GPL"), or
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* the GNU Lesser General Public License Version 2.1 or later (the "LGPL"),
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* in which case the provisions of the GPL or the LGPL are applicable instead
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* of those above. If you wish to allow use of your version of this file only
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* under the terms of either the GPL or the LGPL, and not to allow others to
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* use your version of this file under the terms of the MPL, indicate your
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* decision by deleting the provisions above and replace them with the notice
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* and other provisions required by the GPL or the LGPL. If you do not delete
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* the provisions above, a recipient may use your version of this file under
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* the terms of any one of the MPL, the GPL or the LGPL.
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*
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* ***** END LICENSE BLOCK ***** */
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#ifndef __nanojit_Native__
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#define __nanojit_Native__
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#ifdef NANOJIT_IA32
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#include "Nativei386.h"
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#elif defined(NANOJIT_ARM)
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#ifdef THUMB
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#include "NativeThumb.h"
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#else
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#include "NativeARM.h"
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#endif
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#elif defined(NANOJIT_PPC)
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#include "NativePpc.h"
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#elif defined(NANOJIT_AMD64)
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#include "NativeAMD64.h"
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#else
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#error "unknown nanojit architecture"
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#endif
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namespace nanojit {
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const uint32_t NJ_PAGE_SIZE = 1 << NJ_LOG2_PAGE_SIZE;
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class Fragment;
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struct SideExit;
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struct GuardRecord
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{
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void* jmpToStub;
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void* stubEntry;
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void* jmpToTarget;
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GuardRecord* next;
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SideExit* exit;
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};
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struct SideExit
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{
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GuardRecord* guards;
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Fragment* from;
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Fragment* target;
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void addGuard(GuardRecord* lr)
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{
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lr->next = guards;
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guards = lr;
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}
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};
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}
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#ifdef NJ_STACK_GROWTH_UP
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#define stack_direction(n) n
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#else
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#define stack_direction(n) -n
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#endif
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#define isSPorFP(r) ( (r)==SP || (r)==FP )
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#ifdef NJ_VERBOSE
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#define asm_output(...) do {\
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counter_increment(native);\
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if (verbose_enabled()) {\
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outline[0]='\0';\
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if (outputAddr) sprintf(outline, " %10p ",_nIns);\
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else sprintf(outline, " ");\
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sprintf(&outline[14], ##__VA_ARGS__);\
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Assembler::outputAlign(outline, 45);\
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RegAlloc::formatRegisters(_allocator, outline, _thisfrag);\
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Assembler::output_asm(outline);\
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outputAddr=false; /* set =true if you like to see addresses for each native instruction */ \
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}\
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} while (0) /* no semi */
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#define gpn(r) regNames[(r)]
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#define fpn(r) regNames[(r)]
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#else
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#define asm_output(f, ...)
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#define gpn(r)
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#define fpn(r)
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#endif /* NJ_VERBOSE */
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#endif // __nanojit_Native__
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