/* -*- Mode: C++; c-basic-offset: 4; indent-tabs-mode: nil; tab-width: 4 -*- */ /* vi: set ts=4 sw=4 expandtab: (add to ~/.vimrc: set modeline modelines=5) */ /* ***** BEGIN LICENSE BLOCK ***** * Version: MPL 1.1/GPL 2.0/LGPL 2.1 * * The contents of this file are subject to the Mozilla Public License Version * 1.1 (the "License"); you may not use this file except in compliance with * the License. You may obtain a copy of the License at * http://www.mozilla.org/MPL/ * * Software distributed under the License is distributed on an "AS IS" basis, * WITHOUT WARRANTY OF ANY KIND, either express or implied. See the License * for the specific language governing rights and limitations under the * License. * * The Original Code is [Open Source Virtual Machine]. * * The Initial Developer of the Original Code is * Adobe System Incorporated. * Portions created by the Initial Developer are Copyright (C) 2004-2007 * the Initial Developer. All Rights Reserved. * * Contributor(s): * Adobe AS3 Team * * Alternatively, the contents of this file may be used under the terms of * either the GNU General Public License Version 2 or later (the "GPL"), or * the GNU Lesser General Public License Version 2.1 or later (the "LGPL"), * in which case the provisions of the GPL or the LGPL are applicable instead * of those above. If you wish to allow use of your version of this file only * under the terms of either the GPL or the LGPL, and not to allow others to * use your version of this file under the terms of the MPL, indicate your * decision by deleting the provisions above and replace them with the notice * and other provisions required by the GPL or the LGPL. If you do not delete * the provisions above, a recipient may use your version of this file under * the terms of any one of the MPL, the GPL or the LGPL. * * ***** END LICENSE BLOCK ***** */ #ifndef __nanojit_Nativei386__ #define __nanojit_Nativei386__ #ifdef PERFM #define DOPROF #include "../vprof/vprof.h" #define count_instr() _nvprof("x86",1) #define count_ret() _nvprof("x86-ret",1); count_instr(); #define count_push() _nvprof("x86-push",1); count_instr(); #define count_pop() _nvprof("x86-pop",1); count_instr(); #define count_st() _nvprof("x86-st",1); count_instr(); #define count_stq() _nvprof("x86-stq",1); count_instr(); #define count_ld() _nvprof("x86-ld",1); count_instr(); #define count_ldq() _nvprof("x86-ldq",1); count_instr(); #define count_call() _nvprof("x86-call",1); count_instr(); #define count_calli() _nvprof("x86-calli",1); count_instr(); #define count_prolog() _nvprof("x86-prolog",1); count_instr(); #define count_alu() _nvprof("x86-alu",1); count_instr(); #define count_mov() _nvprof("x86-mov",1); count_instr(); #define count_fpu() _nvprof("x86-fpu",1); count_instr(); #define count_jmp() _nvprof("x86-jmp",1); count_instr(); #define count_jcc() _nvprof("x86-jcc",1); count_instr(); #define count_fpuld() _nvprof("x86-ldq",1); _nvprof("x86-fpu",1); count_instr() #define count_aluld() _nvprof("x86-ld",1); _nvprof("x86-alu",1); count_instr() #define count_alust() _nvprof("x86-ld",1); _nvprof("x86-alu",1); _nvprof("x86-st",1); count_instr() #define count_pushld() _nvprof("x86-ld",1); _nvprof("x86-push",1); count_instr() #define count_imt() _nvprof("x86-imt",1) count_instr() #else #define count_instr() #define count_ret() #define count_push() #define count_pop() #define count_st() #define count_stq() #define count_ld() #define count_ldq() #define count_call() #define count_calli() #define count_prolog() #define count_alu() #define count_mov() #define count_fpu() #define count_jmp() #define count_jcc() #define count_fpuld() #define count_aluld() #define count_alust() #define count_pushld() #define count_imt() #endif namespace nanojit { const int NJ_MAX_REGISTERS = 24; // gpregs, x87 regs, xmm regs #define NJ_MAX_STACK_ENTRY 4096 #define NJ_MAX_PARAMETERS 1 #define NJ_USES_QUAD_CONSTANTS 1 #define NJ_JTBL_SUPPORTED 1 #define NJ_EXPANDED_LOADSTORE_SUPPORTED 1 #define NJ_F2I_SUPPORTED 1 #define NJ_SOFTFLOAT_SUPPORTED 0 // Preserve a 16-byte stack alignment, to support the use of // SSE instructions like MOVDQA (if not by Tamarin itself, // then by the C functions it calls). const int NJ_ALIGN_STACK = 16; const int32_t LARGEST_UNDERRUN_PROT = 32; // largest value passed to underrunProtect typedef uint8_t NIns; // Bytes of icache to flush after patch const size_t LARGEST_BRANCH_PATCH = 16 * sizeof(NIns); // These are used as register numbers in various parts of the code typedef enum { // general purpose 32bit regs EAX = 0, // return value, scratch ECX = 1, // this/arg0, scratch EDX = 2, // arg1, return-msw, scratch EBX = 3, ESP = 4, // stack pointer EBP = 5, // frame pointer ESI = 6, EDI = 7, SP = ESP, // alias SP to ESP for convenience FP = EBP, // alias FP to EBP for convenience // SSE regs come before X87 so we prefer them XMM0 = 8, XMM1 = 9, XMM2 = 10, XMM3 = 11, XMM4 = 12, XMM5 = 13, XMM6 = 14, XMM7 = 15, // X87 regs FST0 = 16, FirstReg = 0, LastReg = 16, deprecated_UnknownReg = 17, // XXX: remove eventually, see bug 538924 UnspecifiedReg = 17 } Register; typedef int RegisterMask; static const int NumSavedRegs = 3; static const RegisterMask SavedRegs = 1<>8)&0xff); \ }; \ void FPUm(int32_t o, int32_t d, Register b); \ void FPUdm(int32_t o, const double* const m); \ void TEST_AH(int32_t i); \ void TEST_AX(int32_t i); \ void FNSTSW_AX(); \ void FCHS(); \ void FLD1(); \ void FLDZ(); \ void FFREE(Register r); \ void FST32(bool p, int32_t d, Register b); \ void FSTQ(bool p, int32_t d, Register b); \ void FSTPQ(int32_t d, Register b); \ void FCOM(bool p, int32_t d, Register b); \ void FCOMdm(bool p, const double* dm); \ void FLD32(int32_t d, Register b); \ void FLDQ(int32_t d, Register b); \ void FLDQdm(const double* dm); \ void FILDQ(int32_t d, Register b); \ void FILD(int32_t d, Register b); \ void FIST(bool p, int32_t d, Register b); \ void FADD( int32_t d, Register b); \ void FSUB( int32_t d, Register b); \ void FSUBR(int32_t d, Register b); \ void FMUL( int32_t d, Register b); \ void FDIV( int32_t d, Register b); \ void FDIVR(int32_t d, Register b); \ void FADDdm( const double *dm); \ void FSUBRdm(const double* dm); \ void FMULdm( const double* dm); \ void FDIVRdm(const double* dm); \ void FINCSTP(); \ void FSTP(Register r) { \ count_fpu(); \ FPU(0xddd8, r); \ asm_output("fstp %s",gpn(r)); fpu_pop(); \ }; \ void FCOMP(); \ void FCOMPP(); \ void FLDr(Register r); \ void EMMS(); \ void CALL(const CallInfo* ci); \ void CALLr(const CallInfo* ci, Register r); } #endif // __nanojit_Nativei386__