new opcode: LIR_jtbl. jtbl takes a uint32_t index and a table of label
references (LIns**), representing a jump to one of the labels.
the index must be in range (range checking is not included in the opcode).
the table is allocated in memory at least as long lived as the LIR; this is
accomplished by doing the allocation from the same Allocator used by LirBuffer.
In the x86 backend, this is implemented with a simple jmp [R*4+ADDR] where ADDR
is the address of the table. I added a new dataAllocator (Allocator&)
parameter to Assembler, which is used for allocating data along with code (data
& code have same lifetime). The x86 backend allocates the final table of
addresses from this allocator and embeds the pointer to the table in code.
In other backends more than one instruction must be used due to limited range
of the constant part of the addressing mode (ppc, arm), or non-support for
full-range pc-relative indexing (x64, ppc64).
Anyone generating LIR code for use with LIR_jtbl must also generate a
LIR_regfence instruction after each label reachable by a forwards edge
from LIR_jtbl. This is to workaround the register allocator's inability
to merge register states between 2 or more pre-existing targets. LIR_regfence
is not required for backwards edges.
--HG--
extra : convert_revision : ee709eaaa30f720f77ab863ba4c9e6d10d69982b
LirBuffer has been modified to provide advance warning of
out of memory (OOM) conditions.
A new page is allocated LIR_BUF_THRESHOLD instructions
prior to reaching the end of page. If the page allocation fails,
call to outOmem() will return true. The buffer can still be
safely written to during during this period but it is assumed
the higher level code will catch this condition and handle
it appropriately as writing LIR_BUF_THRESHOLD instructions
past this point will cause a crash.
This opportunity was also taken to re-factor the code for
LirBufWriter making it more platform agnostic.
- All non-LInsp data in the instruction stream is now managed
through structures that overlay the memory region.
- prepFor() was added to replace the multiple
ensureReferenceable() calls for each instruction.
- insCall() was also modified somewhat in that the
arguments are now stored growing downwards from
the position of the pseudo instruction LirCallIns.
CodegenLIR now has LirBuffer checks at the granularity
of each emitXXX() call that is exposed publicly. This seemed
like a reasonable approach since a client could potentially
call at this level indefinitely. If we want to reduce the frequency
of these checks then we'd have to push the check up into the
verifier.
Assembler OOM handling has also changed. The variable
_startingIns was added and contains the location at which
the assembler began writing code for the current
begin/assem/end sequence. If an OOM condition occurs
the assembler will reset the current instruction pointer
to _startingIns, effectively overwriting the code that has
been generated. This allows the assembler to produce
code indefinitely (and without error) until the upper layers
have noticed the error and respond accordingly.
The constant LARGEST_UNDERRUN_PROT was added
and needs to be set to a platform specific value that is
equal to or greater than the number of NIns written for
the largest possible instruction. i.e. you cannot write
more than this number of NIns to the buffer for each
call to underrunProtect().
