Adds support for MIPS target lacking in earlier patch.
Bug 560926 - Add support for arithmetic with branch on overflow
We simply extend the existing logic for exit-on-overflow in the
manner done for other targets. There appear to other issues
with oveflow detection in general that are not dealt with here.
--HG--
extra : convert_revision : 3a62ee8cc7d6caf63cbd594f71814c8e8f3d4f7a
Extra parenthesis needed in order to correctly resolve macros;
NativeARM.cpp(2040) : error C2105: '--' needs l-value
--HG--
extra : convert_revision : 6f625518afb60a49717b27ba482ace08309cff12
Somewhere along the line -Dverbose=jit was disabled for all non-debug builds.
This means that we can no longer see jit generated verbose output unless we
build a debug build, which is very inconvenient.
Also, the define NJ_VERBOSE_DISABLED was introduced without a corresponding
ifdef around the JIT verbose flags of the shell which leads one to erroneously
assume that methods are not being JIT'd (no output visible).
As the verbose mechanism in the JIT adds less than 2% to overall size (measured
on xcode built x86-32 shell) , recommend adding it back.
--HG--
extra : convert_revision : 367041a278adc74f7db6c9a13166f1700b133ec7
Patch to add 'j' (branch) variants of the exit-on-overflow instructions,
plus a few dependents:
32-bit:
LIR_addjovi
LIR_subjovi
LIR_muljovi
64-bit:
LIR_subq
LIR_addjovq
LIR_subjovq
--HG--
extra : convert_revision : 68023362b0833433a0bc0c3b5af8994894488f33
Fixes two problems:
1. macro incorrectly referred directly to "bd" instead of its argument "i"
2. logic wasn't 64-bit safe (incorrect 32/64bit comparison)
--HG--
extra : convert_revision : 9b65dfcae9f7d70788806afc4f3b989e32c601fe
Also includes a few renames of qxor -> xorq from other files.
(qxor was missing from the rename script).
--HG--
extra : convert_revision : b49dd62330e017769dfdea9c87a74698179c7f45
This patch detects when LEA can be used to rematerialize an add operation
instead of spilling it. Sub and lsh could be supported too, if it would
help (see notes in canRematLEA()).
--HG--
extra : convert_revision : e5db9525afbc8bd03444c66d8ded420f4696dce8
The ARM backend already supported single-instruction folding of immediates into
add/sub/and/or/xor instructions. This patch enables the same instructions to
be rematerialized without spilling them.
--HG--
extra : convert_revision : c5fca9078e37d7d79f66cf6023fcbf707d11d57b
On PPC the cmov logic is generating incorrect code due to
instruction and register lifetimes are not being correctly
handled.
This patch mirrors the code used on the x86 which was fixed
a while back to address this issue. See bug 535705
--HG--
extra : convert_revision : 8047bc5db3b14ddc3588378c7f4c6fef76de7d98
Added comments clarifying the contract between canRemat() and asm_restore(),
and fixed the ARM, MIPS, PPC, and Sparc backends so canRemat() doesn't
return true for instructions that asm_restore() doesn't handle.
--HG--
extra : convert_revision : f4d4243db4cf3b8d7149012d5503c5441058f58e
This patch un-does the intel names that have been used so far within
nanojit, updates the aliases in LIR.h, and fixes the names used in
lirasm tests.
Host VM's will need to run rename_LIR.pl from bug 504506 if they have
already begun using the intel names; aliases are not provided for them in LIR.h.
--HG--
extra : convert_revision : 2787af46329c72796954ddb68f53326f0de661e4
This patch does two things, neither of which should affect generated code.
1. In case LIR_alloc in gen(), replace inlined code with a call to evict(),
since evict() does exactly what the inlined code does.
2. In backends, remove ins->clearReg() or deprecated_markAsClear() calls from
asm_restore(), since evict() takes care of the same thing as soon as
asm_restore() returns.
--HG--
extra : convert_revision : e89860f89d85e6d0a4ef538c5f19f0ae55e360da
