mirror of
https://gitlab.winehq.org/wine/wine-gecko.git
synced 2024-09-13 09:24:08 -07:00
Bug 468484 - internal tamarin-redux merge (mostly formatting), r=gal.
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parent
13f8b6629c
commit
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@ -100,11 +100,7 @@ namespace nanojit
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if (!block.isEmpty()) {
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for (int j=0,n=block.size(); j < n; j++) {
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LIns *i = block[j];
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assm->outputf(" %s", names->formatIns(block[j]));
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if (i->isop(LIR_label)) {
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assm->outputf(" %p:", assm->_nIns);
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assm->output("");
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}
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assm->outputf(" %s", names->formatIns(i));
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}
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block.clear();
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}
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@ -132,7 +128,7 @@ namespace nanojit
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else {
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if (flushnext)
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flush();
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flush_add(i);//block.add(i);
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block.add(i);//flush_add(i);
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if (i->isop(LIR_label))
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flushnext = true;
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}
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@ -158,6 +154,7 @@ namespace nanojit
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nInit(core);
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verbose_only( _verbose = !core->quiet_opt() && core->verbose() );
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verbose_only( _outputCache = 0);
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verbose_only( outlineEOL[0] = '\0');
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internalReset();
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pageReset();
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@ -636,13 +633,8 @@ namespace nanojit
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int d = disp(resv);
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Register rr = resv->reg;
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bool quad = i->opcode() == LIR_param || i->isQuad();
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verbose_only( if (d && _verbose) { outputForEOL(" <= spill %s", _thisfrag->lirbuf->names->formatRef(i)); } )
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asm_spill(rr, d, pop, quad);
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if (d)
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{
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verbose_only(if (_verbose) {
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outputf(" spill %s",_thisfrag->lirbuf->names->formatRef(i));
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})
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}
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}
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void Assembler::freeRsrcOf(LIns *i, bool pop)
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@ -821,8 +813,8 @@ namespace nanojit
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_labels.clear();
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_patches.clear();
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verbose_only( verbose_outputf(" %p:",_nIns) );
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verbose_only( verbose_output(" epilogue:") );
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verbose_only( outputAddr=true; )
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verbose_only( asm_output("[epilogue]"); )
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}
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void Assembler::assemble(Fragment* frag, NInsList& loopJumps)
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@ -894,8 +886,8 @@ namespace nanojit
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if (!error())
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{
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fragEntry = genPrologue();
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verbose_only( verbose_outputf(" %p:",_nIns); )
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verbose_only( verbose_output(" prologue"); )
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verbose_only( outputAddr=true; )
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verbose_only( asm_output("[prologue]"); )
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}
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// something bad happened?
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@ -1292,11 +1284,6 @@ namespace nanojit
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}
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JMP(0);
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_patches.put(_nIns, to);
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verbose_only(
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verbose_outputf(" Loop %s -> %s",
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lirNames[ins->opcode()],
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_thisfrag->lirbuf->names->formatRef(to));
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)
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}
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break;
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}
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@ -1328,11 +1315,6 @@ namespace nanojit
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}
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NIns *branch = asm_branch(op == LIR_jf, cond, 0, false);
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_patches.put(branch,to);
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verbose_only(
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verbose_outputf("Loop %s -> %s",
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lirNames[ins->opcode()],
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_thisfrag->lirbuf->names->formatRef(to));
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)
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}
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break;
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}
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@ -1352,10 +1334,8 @@ namespace nanojit
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intersectRegisterState(label->regs);
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//asm_align_code();
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label->addr = _nIns;
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verbose_only(
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verbose_outputf("Loop %s", _thisfrag->lirbuf->names->formatRef(ins));
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)
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}
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verbose_only( if (_verbose) { outputAddr=true; asm_output1("[%s]", _thisfrag->lirbuf->names->formatRef(ins)); } )
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break;
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}
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@ -1718,29 +1698,34 @@ namespace nanojit
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{
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// evictions and pops first
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RegisterMask skip = 0;
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verbose_only(bool shouldMention=false; )
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for (Register r=FirstReg; r <= LastReg; r = nextreg(r))
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{
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LIns * curins = _allocator.getActive(r);
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LIns * savedins = saved.getActive(r);
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if (curins == savedins)
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{
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verbose_only( if (curins) verbose_outputf(" skip %s", regNames[r]); )
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//verbose_only( if (curins) verbose_outputf(" skip %s", regNames[r]); )
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skip |= rmask(r);
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}
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else
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{
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if (curins) {
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//_nvprof("intersect-evict",1);
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verbose_only( shouldMention=true; )
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evict(r);
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}
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#ifdef NANOJIT_IA32
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if (savedins && (rmask(r) & x87Regs))
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if (savedins && (rmask(r) & x87Regs)) {
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verbose_only( shouldMention=true; )
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FSTP(r);
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}
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#endif
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}
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}
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assignSaved(saved, skip);
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verbose_only( if (shouldMention) verbose_outputf(" merging registers (intersect) with existing edge"); )
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}
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/**
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@ -1754,6 +1739,7 @@ namespace nanojit
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void Assembler::unionRegisterState(RegAlloc& saved)
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{
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// evictions and pops first
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verbose_only(bool shouldMention=false; )
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RegisterMask skip = 0;
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for (Register r=FirstReg; r <= LastReg; r = nextreg(r))
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{
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@ -1761,13 +1747,14 @@ namespace nanojit
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LIns * savedins = saved.getActive(r);
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if (curins == savedins)
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{
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verbose_only( if (curins) verbose_outputf(" skip %s", regNames[r]); )
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//verbose_only( if (curins) verbose_outputf(" skip %s", regNames[r]); )
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skip |= rmask(r);
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}
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else
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{
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if (curins && savedins) {
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//_nvprof("union-evict",1);
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verbose_only( shouldMention=true; )
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evict(r);
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}
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@ -1781,11 +1768,13 @@ namespace nanojit
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// so we must evict here to keep x87 stack balanced.
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evict(r);
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}
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verbose_only( shouldMention=true; )
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}
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#endif
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}
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}
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assignSaved(saved, skip);
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verbose_only( if (shouldMention) verbose_outputf(" merging registers (union) with existing edge"); )
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}
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void Assembler::assignSaved(RegAlloc &saved, RegisterMask skip)
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@ -1807,6 +1796,15 @@ namespace nanojit
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#ifdef NJ_VERBOSE
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char Assembler::outline[8192];
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char Assembler::outlineEOL[512];
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void Assembler::outputForEOL(const char* format, ...)
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{
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va_list args;
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va_start(args, format);
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outlineEOL[0] = '\0';
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vsprintf(outlineEOL, format, args);
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}
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void Assembler::outputf(const char* format, ...)
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{
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@ -1835,7 +1833,6 @@ namespace nanojit
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{
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if (!verbose_enabled())
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return;
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if (*s != '^')
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output(s);
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}
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@ -167,13 +167,15 @@ namespace nanojit
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public:
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#ifdef NJ_VERBOSE
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static char outline[8192];
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static char outlineEOL[512]; // string to be added to the end of the line
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static char* outputAlign(char* s, int col);
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void FASTCALL outputForEOL(const char* format, ...);
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void FASTCALL output(const char* s);
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void FASTCALL outputf(const char* format, ...);
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void FASTCALL output_asm(const char* s);
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bool _verbose, vpad[3];
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bool _verbose, outputAddr, vpad[2]; // if outputAddr=true then next asm instr. will include address in output
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void printActivationState();
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StringList* _outputCache;
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@ -98,10 +98,14 @@ namespace nanojit {
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#define PRFX counter_increment(native);\
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if (verbose_enabled()) {\
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outline[0]='\0';\
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sprintf(outline, " ");\
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if (outputAddr) { sprintf(outline, " %8p ",_nIns); } \
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else { sprintf(outline, " "); } \
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sprintf(&outline[19]
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#define PSFX Assembler::outputAlign(outline, 45);\
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RegAlloc::formatRegisters(_allocator, outline, _thisfrag);\
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strcat(outline,outlineEOL); \
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outlineEOL[0]='\0'; \
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outputAddr = false; \
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Assembler::output_asm(outline); }
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//#define PRFX fprintf(stdout
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//#define PSFX fprintf(stdout,"\n")
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@ -127,8 +127,7 @@ namespace nanojit
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#endif
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}
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verbose_only( verbose_outputf(" %p:",_nIns); )
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verbose_only( verbose_output(" frag entry:"); )
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verbose_only( outputAddr=true; asm_output("[frag entry]"); )
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NIns *fragEntry = _nIns;
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MR(FP, SP); // Establish our own FP.
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PUSHr(FP); // Save caller's FP.
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@ -261,9 +260,6 @@ namespace nanojit
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bool indirect = false;
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if (ins->isop(LIR_call) || ins->isop(LIR_fcall)) {
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verbose_only(if (_verbose)
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outputf(" %p:", _nIns);
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)
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CALL(call);
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}
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else {
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@ -522,10 +518,8 @@ namespace nanojit
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void Assembler::asm_restore(LInsp i, Reservation *resv, Register r)
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{
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if (i->isop(LIR_alloc)) {
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verbose_only( if (_verbose) { outputForEOL(" <= remat %s size %d", _thisfrag->lirbuf->names->formatRef(i), i->size()); } )
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LEA(r, disp(resv), FP);
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verbose_only(if (_verbose) {
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outputf(" remat %s size %d", _thisfrag->lirbuf->names->formatRef(i), i->size());
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})
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}
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else if (i->isconst()) {
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if (!resv->arIndex) {
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@ -535,10 +529,8 @@ namespace nanojit
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}
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else {
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int d = findMemFor(i);
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verbose_only( if (_verbose) { outputForEOL(" <= restore %s", _thisfrag->lirbuf->names->formatRef(i)); } )
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asm_load(d,r);
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verbose_only(if (_verbose) {
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outputf(" restore %s", _thisfrag->lirbuf->names->formatRef(i));
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})
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}
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}
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@ -745,7 +745,7 @@ namespace nanojit
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int offset = (c->_address) - ((int)_nIns); \
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IMM32( (uint32_t)offset ); \
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*(--_nIns) = 0xE8; \
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verbose_only(asm_output1("call %s",(c->_name));) \
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verbose_only(outputAddr=true; asm_output1("call %s",(c->_name));) \
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debug_only(if ((c->_argtypes&3)==ARGSIZE_F) fpu_push();)\
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} while (0)
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@ -753,7 +753,7 @@ namespace nanojit
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#define CALLr(c,r) do { \
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underrunProtect(2);\
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ALU(0xff, 2, (r));\
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verbose_only(asm_output1("call %s",gpn(r));) \
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verbose_only(outputAddr=true; asm_output1("call %s",gpn(r));) \
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debug_only(if ((c->_argtypes&3)==ARGSIZE_F) fpu_push();)\
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} while (0)
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