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Bug 1096684 - IonMonkey: Optimize with SSE3 movsldup and movshdup r=bbouvier
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@ -2194,6 +2194,40 @@ class AssemblerX86Shared : public AssemblerShared
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MOZ_CRASH("unexpected operand kind");
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}
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}
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void movsldup(FloatRegister src, FloatRegister dest) {
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MOZ_ASSERT(HasSSE3());
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masm.movsldup_rr(src.code(), dest.code());
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}
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void movsldup(const Operand &src, FloatRegister dest) {
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MOZ_ASSERT(HasSSE3());
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switch (src.kind()) {
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case Operand::FPREG:
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masm.movsldup_rr(src.fpu(), dest.code());
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break;
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case Operand::MEM_REG_DISP:
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masm.movsldup_mr(src.disp(), src.base(), dest.code());
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break;
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default:
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MOZ_CRASH("unexpected operand kind");
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}
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}
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void movshdup(FloatRegister src, FloatRegister dest) {
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MOZ_ASSERT(HasSSE3());
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masm.movshdup_rr(src.code(), dest.code());
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}
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void movshdup(const Operand &src, FloatRegister dest) {
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MOZ_ASSERT(HasSSE3());
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switch (src.kind()) {
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case Operand::FPREG:
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masm.movshdup_rr(src.fpu(), dest.code());
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break;
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case Operand::MEM_REG_DISP:
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masm.movshdup_mr(src.disp(), src.base(), dest.code());
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break;
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default:
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MOZ_CRASH("unexpected operand kind");
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}
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}
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void minsd(FloatRegister src, FloatRegister dest) {
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MOZ_ASSERT(HasSSE2());
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masm.minsd_rr(src.code(), dest.code());
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@ -300,9 +300,11 @@ private:
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OP2_MOVSD_WsdVsd = 0x11,
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OP2_MOVPS_WpsVps = 0x11,
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OP2_MOVHLPS_VqUq = 0x12,
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OP2_MOVSLDUP_VpsWps = 0x12,
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OP2_UNPCKLPS_VsdWsd = 0x14,
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OP2_UNPCKHPS_VsdWsd = 0x15,
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OP2_MOVLHPS_VqUq = 0x16,
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OP2_MOVSHDUP_VpsWps = 0x16,
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OP2_MOVAPD_VsdWsd = 0x28,
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OP2_MOVAPS_VsdWsd = 0x28,
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OP2_MOVAPS_WsdVsd = 0x29,
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@ -3764,6 +3766,36 @@ public:
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m_formatter.immediate8(uint8_t(imm));
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}
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void movsldup_rr(XMMRegisterID src, XMMRegisterID dst)
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{
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spew("movsldup %s, %s", nameFPReg(src), nameFPReg(dst));
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m_formatter.prefix(PRE_SSE_F3);
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m_formatter.twoByteOp(OP2_MOVSLDUP_VpsWps, (RegisterID)dst, (RegisterID)src);
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}
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void movsldup_mr(int offset, RegisterID base, XMMRegisterID dst)
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{
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spew("movsldup %s0x%x(%s), %s", PRETTY_PRINT_OFFSET(offset), nameIReg(base),
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nameFPReg(dst));
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m_formatter.prefix(PRE_SSE_F3);
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m_formatter.twoByteOp(OP2_MOVSLDUP_VpsWps, (RegisterID)dst, base, offset);
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}
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void movshdup_rr(XMMRegisterID src, XMMRegisterID dst)
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{
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spew("movshdup %s, %s", nameFPReg(src), nameFPReg(dst));
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m_formatter.prefix(PRE_SSE_F3);
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m_formatter.twoByteOp(OP2_MOVSHDUP_VpsWps, (RegisterID)dst, (RegisterID)src);
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}
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void movshdup_mr(int offset, RegisterID base, XMMRegisterID dst)
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{
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spew("movshdup %s0x%x(%s), %s", PRETTY_PRINT_OFFSET(offset), nameIReg(base),
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nameFPReg(dst));
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m_formatter.prefix(PRE_SSE_F3);
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m_formatter.twoByteOp(OP2_MOVSHDUP_VpsWps, (RegisterID)dst, base, offset);
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}
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void minsd_rr(XMMRegisterID src, XMMRegisterID dst)
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{
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spew("minsd %s, %s", nameFPReg(src), nameFPReg(dst));
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@ -2414,6 +2414,17 @@ CodeGeneratorX86Shared::visitSimdSwizzleF(LSimdSwizzleF *ins)
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uint32_t z = ins->laneZ();
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uint32_t w = ins->laneW();
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if (AssemblerX86Shared::HasSSE3()) {
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if (ins->lanesMatch(0, 0, 2, 2)) {
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masm.movsldup(input, output);
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return true;
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}
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if (ins->lanesMatch(1, 1, 3, 3)) {
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masm.movshdup(input, output);
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return true;
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}
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}
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// TODO Here and below, arch specific lowering could identify this pattern
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// and use defineReuseInput to avoid this move (bug 1084404)
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if (ins->lanesMatch(2, 3, 2, 3)) {
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