add stub implementations of asm_f2i on PPC and Sparc. add NJ_F2I_SUPPORTED compiletime flag. (r=rreitmai,bug=523251)

--HG--
extra : convert_revision : 387c73e51e77eb47b3344678175208f13390dd02

js/src/nanojit/Native.h

@@ -80,6 +80,10 @@
 #  define NJ_USES_QUAD_CONSTANTS 0
 #endif
 
+#ifndef NJ_F2I_SUPPORTED
+#  define NJ_F2I_SUPPORTED 0
+#endif
+
 namespace nanojit {
 
     inline Register nextreg(Register r) {

js/src/nanojit/NativeARM.h

@@ -80,6 +80,7 @@ namespace nanojit
 #define NJ_ALIGN_STACK                  8
 #define NJ_JTBL_SUPPORTED               1
 #define NJ_EXPANDED_LOADSTORE_SUPPORTED 0
+#define NJ_F2I_SUPPORTED                1
 
 #define NJ_CONSTANT_POOLS
 const int NJ_MAX_CPOOL_OFFSET = 4096;

js/src/nanojit/NativePPC.cpp

@@ -1029,6 +1029,10 @@ namespace nanojit
     #endif
     }
 
+    void Assembler::asm_f2i(LInsp) {
+        NanoAssertMsg(0, "NJ_F2I_SUPPORTED not yet supported for this architecture");
+    }
+
     void Assembler::asm_promote(LIns *ins) {
         LOpcode op = ins->opcode();
         Register r = prepResultReg(ins, GpRegs);

js/src/nanojit/NativePPC.h

@@ -58,6 +58,7 @@ namespace nanojit
 #define NJ_ALIGN_STACK                  16
 #define NJ_JTBL_SUPPORTED               1
 #define NJ_EXPANDED_LOADSTORE_SUPPORTED 0
+#define NJ_F2I_SUPPORTED                0
 
     enum ConditionRegister {
         CR0 = 0,

js/src/nanojit/NativeSparc.cpp

@@ -961,6 +961,10 @@ namespace nanojit
         SETHI(0x43300000, G1);
     }
 
+    void Assembler::asm_f2i(LInsp) {
+        NanoAssertMsg(0, "NJ_F2I_SUPPORTED not yet supported for this architecture");
+    }
+
     void Assembler::asm_nongp_copy(Register r, Register s)
     {
         underrunProtect(4);

js/src/nanojit/NativeSparc.h

@@ -75,6 +75,7 @@ namespace nanojit
 #define NJ_MAX_PARAMETERS               1
 #define NJ_JTBL_SUPPORTED               0
 #define NJ_EXPANDED_LOADSTORE_SUPPORTED 0
+#define NJ_F2I_SUPPORTED                0
 
     const int NJ_ALIGN_STACK = 16;
 

js/src/nanojit/NativeX64.h

@@ -62,6 +62,7 @@ namespace nanojit
 #define NJ_ALIGN_STACK                  16
 #define NJ_JTBL_SUPPORTED               1
 #define NJ_EXPANDED_LOADSTORE_SUPPORTED 1
+#define NJ_F2I_SUPPORTED                1
 
     enum Register {
         RAX = 0, // 1st int return, # of sse varargs

js/src/nanojit/Nativei386.h

@@ -98,6 +98,7 @@ namespace nanojit
     #define NJ_JTBL_SUPPORTED 1
     #define NJ_EXPANDED_LOADSTORE_SUPPORTED 1
     #define NJ_USES_QUAD_CONSTANTS 1
+    #define NJ_F2I_SUPPORTED                1
 
         // Preserve a 16-byte stack alignment, to support the use of
         // SSE instructions like MOVDQA (if not by Tamarin itself,