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Bug 1026438 followup - Allow unaligned 16-bit loads in the ARM simulator, as irregexp emits them for Latin1 strings. r=nbp on IRC
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@ -1491,8 +1491,8 @@ Simulator::setCallResult(int64_t res)
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int
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Simulator::readW(int32_t addr, SimInstruction *instr)
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{
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// The regexp engines emit unaligned loads, so we don't check for them here
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// like the other methods below.
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// The regexp engine emits unaligned loads, so we don't check for them here
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// like most of the other methods do.
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intptr_t *ptr = reinterpret_cast<intptr_t*>(addr);
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return *ptr;
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}
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@ -1512,13 +1512,10 @@ Simulator::writeW(int32_t addr, int value, SimInstruction *instr)
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uint16_t
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Simulator::readHU(int32_t addr, SimInstruction *instr)
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{
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if ((addr & 1) == 0) {
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uint16_t *ptr = reinterpret_cast<uint16_t*>(addr);
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return *ptr;
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}
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printf("Unaligned unsigned halfword read at 0x%08x, pc=%p\n", addr, instr);
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MOZ_CRASH();
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return 0;
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// The regexp engine emits unaligned loads, so we don't check for them here
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// like most of the other methods do.
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uint16_t *ptr = reinterpret_cast<uint16_t*>(addr);
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return *ptr;
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}
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int16_t
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