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Bug 476042 Integrate sparc nanojit, fix for LDUB/LDUH, r=gal
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@ -770,9 +770,9 @@ namespace nanojit
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int d = disp->constval();
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int d = disp->constval();
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Register ra = getBaseReg(base, d, GpRegs);
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Register ra = getBaseReg(base, d, GpRegs);
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if (op == LIR_ldcb) {
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if (op == LIR_ldcb) {
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LDSB32(ra, d, rr);
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LDUB32(ra, d, rr);
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} else if (op == LIR_ldcs) {
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} else if (op == LIR_ldcs) {
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LDSH32(ra, d, rr);
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LDUH32(ra, d, rr);
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} else {
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} else {
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LDSW32(ra, d, rr);
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LDSW32(ra, d, rr);
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}
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}
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@ -511,28 +511,28 @@ namespace nanojit
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Format_3_1I(3, rd, 0x20, rs1, simm13); \
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Format_3_1I(3, rd, 0x20, rs1, simm13); \
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} while (0)
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} while (0)
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#define LDSB(rs1, rs2, rd) \
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#define LDUB(rs1, rs2, rd) \
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do { \
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do { \
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asm_output("ld [%s + %s], %s", gpn(rs1), gpn(rs2), gpn(rd)); \
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asm_output("ld [%s + %s], %s", gpn(rs1), gpn(rs2), gpn(rd)); \
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Format_3_1(3, rd, 0x9, rs1, 0, rs2); \
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Format_3_1(3, rd, 0x1, rs1, 0, rs2); \
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} while (0)
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} while (0)
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#define LDSBI(rs1, simm13, rd) \
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#define LDUBI(rs1, simm13, rd) \
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do { \
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do { \
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asm_output("ld [%s + %d], %s", gpn(rs1), simm13, gpn(rd)); \
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asm_output("ld [%s + %d], %s", gpn(rs1), simm13, gpn(rd)); \
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Format_3_1I(3, rd, 0x9, rs1, simm13); \
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Format_3_1I(3, rd, 0x1, rs1, simm13); \
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} while (0)
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} while (0)
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#define LDSH(rs1, rs2, rd) \
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#define LDUH(rs1, rs2, rd) \
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do { \
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do { \
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asm_output("ld [%s + %s], %s", gpn(rs1), gpn(rs2), gpn(rd)); \
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asm_output("ld [%s + %s], %s", gpn(rs1), gpn(rs2), gpn(rd)); \
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Format_3_1(3, rd, 0xa, rs1, 0, rs2); \
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Format_3_1(3, rd, 0x2, rs1, 0, rs2); \
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} while (0)
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} while (0)
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#define LDSHI(rs1, simm13, rd) \
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#define LDUHI(rs1, simm13, rd) \
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do { \
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do { \
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asm_output("ld [%s + %d], %s", gpn(rs1), simm13, gpn(rd)); \
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asm_output("ld [%s + %d], %s", gpn(rs1), simm13, gpn(rd)); \
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Format_3_1I(3, rd, 0xa, rs1, simm13); \
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Format_3_1I(3, rd, 0x2, rs1, simm13); \
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} while (0)
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} while (0)
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#define LDSW(rs1, rs2, rd) \
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#define LDSW(rs1, rs2, rd) \
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@ -877,19 +877,19 @@ namespace nanojit
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SET32(imm32, L0); \
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SET32(imm32, L0); \
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}
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}
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#define LDSB32(rs1, imm32, rd) \
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#define LDUB32(rs1, imm32, rd) \
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if(isIMM13(imm32)) { \
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if(isIMM13(imm32)) { \
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LDSBI(rs1, imm32, rd); \
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LDUBI(rs1, imm32, rd); \
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} else { \
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} else { \
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LDSB(rs1, L0, rd); \
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LDUB(rs1, L0, rd); \
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SET32(imm32, L0); \
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SET32(imm32, L0); \
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}
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}
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#define LDSH32(rs1, imm32, rd) \
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#define LDUH32(rs1, imm32, rd) \
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if(isIMM13(imm32)) { \
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if(isIMM13(imm32)) { \
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LDSHI(rs1, imm32, rd); \
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LDUHI(rs1, imm32, rd); \
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} else { \
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} else { \
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LDSH(rs1, L0, rd); \
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LDUH(rs1, L0, rd); \
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SET32(imm32, L0); \
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SET32(imm32, L0); \
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}
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}
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