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bug 495995 - nanojit-central part of VTUNE support for TR

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--HG--
extra : convert_revision : 602fdcb7288454f85fe81d401559b7c1639a41e6
This commit is contained in:
Werner Sharp (wsharp@adobe.com) 2010-08-06 14:18:43 -04:00
parent 5113963733
commit d00b1ec4cb
7 changed files with 58 additions and 56 deletions
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70
js/src/nanojit/Assembler.cpp
View File

@ -41,7 +41,7 @@
#ifdef FEATURE_NANOJIT
#ifdef VTUNE
#ifdef VMCFG_VTUNE
#include "../core/CodegenLIR.h"
#endif
@ -50,6 +50,18 @@
#pragma warning(disable:4310) // cast truncates constant value
#endif
#ifdef VMCFG_VTUNE
namespace vtune {
using namespace nanojit;
void vtuneStart(void*, NIns*);
void vtuneEnd(void*, NIns*);
void vtuneLine(void*, int, NIns*);
void vtuneFile(void*, void*);
}
using namespace vtune;
#endif // VMCFG_VTUNE
namespace nanojit
{
/**
@ -74,8 +86,8 @@ namespace nanojit
#if PEDANTIC
, pedanticTop(NULL)
#endif
#ifdef VTUNE
, cgen(NULL)
#ifdef VMCFG_VTUNE
, vtuneHandle(NULL)
#endif
, _config(config)
{
@ -273,14 +285,6 @@ namespace nanojit
verbose_only( nBytes += (end - start) * sizeof(NIns); )
NanoAssert(uintptr_t(end) - uintptr_t(start) >= (size_t)LARGEST_UNDERRUN_PROT);
eip = end;
#ifdef VTUNE
if (_nIns && _nExitIns) {
//cgen->jitAddRecord((uintptr_t)list->code, 0, 0, true); // add placeholder record for top of page
cgen->jitCodePosUpdate((uintptr_t)list->code);
cgen->jitPushInfo(); // new page requires new entry
}
#endif
}
void Assembler::reset()
@ -1108,6 +1112,15 @@ namespace nanojit
// save entry point pointers
frag->fragEntry = fragEntry;
frag->setCode(_nIns);
#ifdef VMCFG_VTUNE
if (vtuneHandle)
{
vtuneEnd(vtuneHandle, codeEnd);
vtuneStart(vtuneHandle, _nIns);
}
#endif
PERFM_NVPROF("code", CodeAlloc::size(codeList));
#ifdef NANOJIT_IA32
@ -1928,27 +1941,28 @@ namespace nanojit
asm_call(ins);
break;
#ifdef VTUNE
#ifdef VMCFG_VTUNE
case LIR_file: {
// we traverse backwards so we are now hitting the file
// that is associated with a bunch of LIR_lines we already have seen
ins->oprnd1()->setResultLive();
uintptr_t currentFile = ins->oprnd1()->immI();
cgen->jitFilenameUpdate(currentFile);
// we traverse backwards so we are now hitting the file
// that is associated with a bunch of LIR_lines we already have seen
if (vtuneHandle) {
void * currentFile = (void *) ins->oprnd1()->immI();
vtuneFile(vtuneHandle, currentFile);
}
break;
}
case LIR_line: {
// add a new table entry, we don't yet knwo which file it belongs
// to so we need to add it to the update table too
// note the alloc, actual act is delayed; see above
ins->oprnd1()->setResultLive();
uint32_t currentLine = (uint32_t) ins->oprnd1()->immI();
cgen->jitLineNumUpdate(currentLine);
cgen->jitAddRecord((uintptr_t)_nIns, 0, currentLine, true);
// add a new table entry, we don't yet knwo which file it belongs
// to so we need to add it to the update table too
// note the alloc, actual act is delayed; see above
if (vtuneHandle) {
uint32_t currentLine = (uint32_t) ins->oprnd1()->immI();
vtuneLine(vtuneHandle, currentLine, _nIns);
}
break;
}
#endif // VTUNE
#endif // VMCFG_VTUNE
}
#ifdef NJ_VERBOSE
@ -1968,10 +1982,6 @@ namespace nanojit
if (error())
return;
#ifdef VTUNE
cgen->jitCodePosUpdate((uintptr_t)_nIns);
#endif
// check that all is well (don't check in exit paths since its more complicated)
debug_only( pageValidate(); )
debug_only( resourceConsistencyCheck(); )

6
js/src/nanojit/Assembler.h
View File

@ -196,7 +196,7 @@ namespace nanojit
typedef HashMap<uint64_t, uint64_t*> ImmDPoolMap;
#endif
#ifdef VTUNE
#ifdef VMCFG_VTUNE
class avmplus::CodegenLIR;
#endif
@ -271,8 +271,8 @@ namespace nanojit
#endif // NJ_VERBOSE
public:
#ifdef VTUNE
avmplus::CodegenLIR *cgen;
#ifdef VMCFG_VTUNE
void* vtuneHandle;
#endif
Assembler(CodeAlloc& codeAlloc, Allocator& dataAlloc, Allocator& alloc, AvmCore* core, LogControl* logc, const Config& config);

6
js/src/nanojit/CodeAlloc.cpp
View File

@ -47,7 +47,11 @@
namespace nanojit
{
static const bool verbose = false;
#if defined(NANOJIT_ARM)
#ifdef VMCFG_VTUNE
// vtune jit profiling api can't handle non-contiguous methods,
// so make the allocation size huge to avoid non-contiguous methods
static const int pagesPerAlloc = 128; // 1MB
#elif defined(NANOJIT_ARM)
// ARM requires single-page allocations, due to the constant pool that
// lives on each page that must be reachable by a 4kb pcrel load.
static const int pagesPerAlloc = 1;

2
js/src/nanojit/LIR.cpp
View File

@ -3038,7 +3038,7 @@ namespace nanojit
case LIR_file:
case LIR_line:
// XXX: not sure about these ones. Ignore for the moment.
// These will never get hit since VTUNE implies !DEBUG. Ignore for the moment.
nArgs = 0;
break;

10
js/src/nanojit/NativeARM.cpp
View File

@ -2777,14 +2777,13 @@ Assembler::asm_cmov(LIns* ins)
Register rf = findRegFor(iffalse, allow & ~rmask(rr));
// If 'iftrue' isn't in a register, it can be clobbered by 'ins'.
Register rt = iftrue->isInReg() ? iftrue->getReg() : rr;
if (ins->isop(LIR_cmovd)) {
NIns* target = _nIns;
asm_nongp_copy(rr, rf);
asm_branch(false, condval, target);
// If 'iftrue' isn't in a register, it can be clobbered by 'ins'.
Register rt = iftrue->isInReg() ? iftrue->getReg() : rr;
if (rr != rt)
asm_nongp_copy(rr, rt);
freeResourcesOf(ins);
@ -2795,9 +2794,6 @@ Assembler::asm_cmov(LIns* ins)
return;
}
// If 'iftrue' isn't in a register, it can be clobbered by 'ins'.
Register rt = iftrue->isInReg() ? iftrue->getReg() : rr;
// WARNING: We cannot generate any code that affects the condition
// codes between the MRcc generation here and the asm_cmp() call
// below. See asm_cmp() for more details.

10
js/src/nanojit/NativeX64.cpp
View File

@ -1119,14 +1119,13 @@ namespace nanojit
Register rf = findRegFor(iffalse, allow & ~rmask(rr));
// If 'iftrue' isn't in a register, it can be clobbered by 'ins'.
Register rt = iftrue->isInReg() ? iftrue->getReg() : rr;
if (ins->isop(LIR_cmovd)) {
NIns* target = _nIns;
asm_nongp_copy(rr, rf);
asm_branch(false, cond, target);
// If 'iftrue' isn't in a register, it can be clobbered by 'ins'.
Register rt = iftrue->isInReg() ? iftrue->getReg() : rr;
if (rr != rt)
asm_nongp_copy(rr, rt);
freeResourcesOf(ins);
@ -1137,9 +1136,6 @@ namespace nanojit
return;
}
// If 'iftrue' isn't in a register, it can be clobbered by 'ins'.
Register rt = iftrue->isInReg() ? iftrue->getReg() : rr;
// WARNING: We cannot generate any code that affects the condition
// codes between the MRcc generation here and the asm_cmp() call
// below. See asm_cmp() for more details.

10
js/src/nanojit/Nativei386.cpp
View File

@ -2059,14 +2059,13 @@ namespace nanojit
Register rf = findRegFor(iffalse, allow & ~rmask(rr));
// If 'iftrue' isn't in a register, it can be clobbered by 'ins'.
Register rt = iftrue->isInReg() ? iftrue->getReg() : rr;
if (ins->isop(LIR_cmovd)) {
NIns* target = _nIns;
asm_nongp_copy(rr, rf);
asm_branch(false, condval, target);
// If 'iftrue' isn't in a register, it can be clobbered by 'ins'.
Register rt = iftrue->isInReg() ? iftrue->getReg() : rr;
if (rr != rt)
asm_nongp_copy(rr, rt);
freeResourcesOf(ins);
@ -2077,9 +2076,6 @@ namespace nanojit
return;
}
// If 'iftrue' isn't in a register, it can be clobbered by 'ins'.
Register rt = iftrue->isInReg() ? iftrue->getReg() : rr;
NanoAssert(ins->isop(LIR_cmovi));
// WARNING: We cannot generate any code that affects the condition