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Bug 1204306 - IonMonkey: MIPS32: Clean up MacroAssembler functions that aliased to Assembler. r=arai

Browse Source 
---
 js/src/jit/mips32/CodeGenerator-mips32.cpp    | 10 +++----
 js/src/jit/mips32/MacroAssembler-mips32-inl.h |  2 +-
 js/src/jit/mips32/MacroAssembler-mips32.cpp   | 38 +++------------------------
 js/src/jit/mips32/MacroAssembler-mips32.h     |  5 ----
 js/src/jit/mips32/SharedIC-mips32.cpp         |  6 ++---
 js/src/jit/mips32/Trampoline-mips32.cpp       | 16 +++++------
 6 files changed, 21 insertions(+), 56 deletions(-)
This commit is contained in:
Heiher 2015-09-14 03:31:43 +08:00
parent 589d2d296b
commit ccb1450dc3
6 changed files with 21 additions and 56 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

10
js/src/jit/mips32/CodeGenerator-mips32.cpp
View File

@ -505,7 +505,7 @@ CodeGeneratorMIPS::visitMulI(LMulI* ins)
// Result is -0 if lhs or rhs is negative. // Result is -0 if lhs or rhs is negative.
// In that case result must be double value so bailout // In that case result must be double value so bailout
Register scratch = SecondScratchReg; Register scratch = SecondScratchReg;
masm.ma_or(scratch, ToRegister(lhs), ToRegister(rhs)); masm.as_or(scratch, ToRegister(lhs), ToRegister(rhs));
bailoutCmp32(Assembler::Signed, scratch, scratch, ins->snapshot()); bailoutCmp32(Assembler::Signed, scratch, scratch, ins->snapshot());
masm.bind(&done); masm.bind(&done);
@ -796,19 +796,19 @@ CodeGeneratorMIPS::visitBitOpI(LBitOpI* ins)
if (rhs->isConstant()) if (rhs->isConstant())
masm.ma_or(ToRegister(dest), ToRegister(lhs), Imm32(ToInt32(rhs))); masm.ma_or(ToRegister(dest), ToRegister(lhs), Imm32(ToInt32(rhs)));
else else
masm.ma_or(ToRegister(dest), ToRegister(lhs), ToRegister(rhs)); masm.as_or(ToRegister(dest), ToRegister(lhs), ToRegister(rhs));
break; break;
case JSOP_BITXOR: case JSOP_BITXOR:
if (rhs->isConstant()) if (rhs->isConstant())
masm.ma_xor(ToRegister(dest), ToRegister(lhs), Imm32(ToInt32(rhs))); masm.ma_xor(ToRegister(dest), ToRegister(lhs), Imm32(ToInt32(rhs)));
else else
masm.ma_xor(ToRegister(dest), ToRegister(lhs), ToRegister(rhs)); masm.as_xor(ToRegister(dest), ToRegister(lhs), ToRegister(rhs));
break; break;
case JSOP_BITAND: case JSOP_BITAND:
if (rhs->isConstant()) if (rhs->isConstant())
masm.ma_and(ToRegister(dest), ToRegister(lhs), Imm32(ToInt32(rhs))); masm.ma_and(ToRegister(dest), ToRegister(lhs), Imm32(ToInt32(rhs)));
else else
masm.ma_and(ToRegister(dest), ToRegister(lhs), ToRegister(rhs)); masm.as_and(ToRegister(dest), ToRegister(lhs), ToRegister(rhs));
break; break;
default: default:
MOZ_CRASH("unexpected binary opcode"); MOZ_CRASH("unexpected binary opcode");
@ -1647,7 +1647,7 @@ CodeGeneratorMIPS::visitBitAndAndBranch(LBitAndAndBranch* lir)
if (lir->right()->isConstant()) if (lir->right()->isConstant())
masm.ma_and(ScratchRegister, ToRegister(lir->left()), Imm32(ToInt32(lir->right()))); masm.ma_and(ScratchRegister, ToRegister(lir->left()), Imm32(ToInt32(lir->right())));
else else
masm.ma_and(ScratchRegister, ToRegister(lir->left()), ToRegister(lir->right())); masm.as_and(ScratchRegister, ToRegister(lir->left()), ToRegister(lir->right()));
emitBranch(ScratchRegister, ScratchRegister, Assembler::NonZero, lir->ifTrue(), emitBranch(ScratchRegister, ScratchRegister, Assembler::NonZero, lir->ifTrue(),
lir->ifFalse()); lir->ifFalse());
} }

2
js/src/jit/mips32/MacroAssembler-mips32-inl.h
View File

@ -25,7 +25,7 @@ MacroAssembler::not32(Register reg)
void void
MacroAssembler::and32(Register src, Register dest) MacroAssembler::and32(Register src, Register dest)
{ {
ma_and(dest, dest, src); as_and(dest, dest, src);
} }
void void

38
js/src/jit/mips32/MacroAssembler-mips32.cpp
View File

@ -393,12 +393,6 @@ MacroAssemblerMIPS::ma_and(Register rd, Register rs)
as_and(rd, rd, rs); as_and(rd, rd, rs);
} }
void
MacroAssemblerMIPS::ma_and(Register rd, Register rs, Register rt)
{
as_and(rd, rs, rt);
}
void void
MacroAssemblerMIPS::ma_and(Register rd, Imm32 imm) MacroAssemblerMIPS::ma_and(Register rd, Imm32 imm)
{ {
@ -423,12 +417,6 @@ MacroAssemblerMIPS::ma_or(Register rd, Register rs)
as_or(rd, rd, rs); as_or(rd, rd, rs);
} }
void
MacroAssemblerMIPS::ma_or(Register rd, Register rs, Register rt)
{
as_or(rd, rs, rt);
}
void void
MacroAssemblerMIPS::ma_or(Register rd, Imm32 imm) MacroAssemblerMIPS::ma_or(Register rd, Imm32 imm)
{ {
@ -453,12 +441,6 @@ MacroAssemblerMIPS::ma_xor(Register rd, Register rs)
as_xor(rd, rd, rs); as_xor(rd, rd, rs);
} }
void
MacroAssemblerMIPS::ma_xor(Register rd, Register rs, Register rt)
{
as_xor(rd, rs, rt);
}
void void
MacroAssemblerMIPS::ma_xor(Register rd, Imm32 imm) MacroAssemblerMIPS::ma_xor(Register rd, Imm32 imm)
{ {
@ -490,12 +472,6 @@ MacroAssemblerMIPS::ma_addu(Register rd, Register rs, Imm32 imm)
} }
} }
void
MacroAssemblerMIPS::ma_addu(Register rd, Register rs, Register rt)
{
as_addu(rd, rs, rt);
}
void void
MacroAssemblerMIPS::ma_addu(Register rd, Register rs) MacroAssemblerMIPS::ma_addu(Register rd, Register rs)
{ {
@ -549,12 +525,6 @@ MacroAssemblerMIPS::ma_addTestOverflow(Register rd, Register rs, Imm32 imm, Labe
} }
// Subtract. // Subtract.
void
MacroAssemblerMIPS::ma_subu(Register rd, Register rs, Register rt)
{
as_subu(rd, rs, rt);
}
void void
MacroAssemblerMIPS::ma_subu(Register rd, Register rs, Imm32 imm) MacroAssemblerMIPS::ma_subu(Register rd, Register rs, Imm32 imm)
{ {
@ -578,7 +548,7 @@ MacroAssemblerMIPS::ma_subTestOverflow(Register rd, Register rs, Register rt, La
Label goodSubtraction; Label goodSubtraction;
// Use second scratch. The instructions generated by ma_b don't use the // Use second scratch. The instructions generated by ma_b don't use the
// second scratch register. // second scratch register.
ma_subu(rd, rs, rt); as_subu(rd, rs, rt);
as_xor(ScratchRegister, rs, rt); // If same sign, no overflow as_xor(ScratchRegister, rs, rt); // If same sign, no overflow
ma_b(ScratchRegister, Imm32(0), &goodSubtraction, Assembler::GreaterThanOrEqual, ShortJump); ma_b(ScratchRegister, Imm32(0), &goodSubtraction, Assembler::GreaterThanOrEqual, ShortJump);
@ -1544,7 +1514,7 @@ MacroAssemblerMIPSCompat::sub32(Imm32 imm, Register dest)
void void
MacroAssemblerMIPSCompat::sub32(Register src, Register dest) MacroAssemblerMIPSCompat::sub32(Register src, Register dest)
{ {
ma_subu(dest, dest, src); as_subu(dest, dest, src);
} }
void void
@ -1563,7 +1533,7 @@ MacroAssemblerMIPSCompat::addPtr(const Address& src, Register dest)
void void
MacroAssemblerMIPSCompat::subPtr(Register src, Register dest) MacroAssemblerMIPSCompat::subPtr(Register src, Register dest)
{ {
ma_subu(dest, dest, src); as_subu(dest, dest, src);
} }
void void
@ -2544,7 +2514,7 @@ MacroAssemblerMIPSCompat::loadConstantDouble(double dp, FloatRegister dest)
void void
MacroAssemblerMIPSCompat::branchTestInt32Truthy(bool b, const ValueOperand& value, Label* label) MacroAssemblerMIPSCompat::branchTestInt32Truthy(bool b, const ValueOperand& value, Label* label)
{ {
ma_and(ScratchRegister, value.payloadReg(), value.payloadReg()); as_and(ScratchRegister, value.payloadReg(), value.payloadReg());
ma_b(ScratchRegister, ScratchRegister, label, b ? NonZero : Zero); ma_b(ScratchRegister, ScratchRegister, label, b ? NonZero : Zero);
} }

5
js/src/jit/mips32/MacroAssembler-mips32.h
View File

@ -110,19 +110,16 @@ class MacroAssemblerMIPS : public Assembler
// and // and
void ma_and(Register rd, Register rs); void ma_and(Register rd, Register rs);
void ma_and(Register rd, Register rs, Register rt);
void ma_and(Register rd, Imm32 imm); void ma_and(Register rd, Imm32 imm);
void ma_and(Register rd, Register rs, Imm32 imm); void ma_and(Register rd, Register rs, Imm32 imm);
// or // or
void ma_or(Register rd, Register rs); void ma_or(Register rd, Register rs);
void ma_or(Register rd, Register rs, Register rt);
void ma_or(Register rd, Imm32 imm); void ma_or(Register rd, Imm32 imm);
void ma_or(Register rd, Register rs, Imm32 imm); void ma_or(Register rd, Register rs, Imm32 imm);
// xor // xor
void ma_xor(Register rd, Register rs); void ma_xor(Register rd, Register rs);
void ma_xor(Register rd, Register rs, Register rt);
void ma_xor(Register rd, Imm32 imm); void ma_xor(Register rd, Imm32 imm);
void ma_xor(Register rd, Register rs, Imm32 imm); void ma_xor(Register rd, Register rs, Imm32 imm);
@ -143,14 +140,12 @@ class MacroAssemblerMIPS : public Assembler
// arithmetic based ops // arithmetic based ops
// add // add
void ma_addu(Register rd, Register rs, Imm32 imm); void ma_addu(Register rd, Register rs, Imm32 imm);
void ma_addu(Register rd, Register rs, Register rt);
void ma_addu(Register rd, Register rs); void ma_addu(Register rd, Register rs);
void ma_addu(Register rd, Imm32 imm); void ma_addu(Register rd, Imm32 imm);
void ma_addTestOverflow(Register rd, Register rs, Register rt, Label* overflow); void ma_addTestOverflow(Register rd, Register rs, Register rt, Label* overflow);
void ma_addTestOverflow(Register rd, Register rs, Imm32 imm, Label* overflow); void ma_addTestOverflow(Register rd, Register rs, Imm32 imm, Label* overflow);
// subtract // subtract
void ma_subu(Register rd, Register rs, Register rt);
void ma_subu(Register rd, Register rs, Imm32 imm); void ma_subu(Register rd, Register rs, Imm32 imm);
void ma_subu(Register rd, Imm32 imm); void ma_subu(Register rd, Imm32 imm);
void ma_subTestOverflow(Register rd, Register rs, Register rt, Label* overflow); void ma_subTestOverflow(Register rd, Register rs, Register rt, Label* overflow);

6
js/src/jit/mips32/SharedIC-mips32.cpp
View File

@ -97,13 +97,13 @@ ICBinaryArith_Int32::Compiler::generateStubCode(MacroAssembler& masm)
break; break;
} }
case JSOP_BITOR: case JSOP_BITOR:
masm.ma_or(R0.payloadReg() , R0.payloadReg(), R1.payloadReg()); masm.as_or(R0.payloadReg() , R0.payloadReg(), R1.payloadReg());
break; break;
case JSOP_BITXOR: case JSOP_BITXOR:
masm.ma_xor(R0.payloadReg() , R0.payloadReg(), R1.payloadReg()); masm.as_xor(R0.payloadReg() , R0.payloadReg(), R1.payloadReg());
break; break;
case JSOP_BITAND: case JSOP_BITAND:
masm.ma_and(R0.payloadReg() , R0.payloadReg(), R1.payloadReg()); masm.as_and(R0.payloadReg() , R0.payloadReg(), R1.payloadReg());
break; break;
case JSOP_LSH: case JSOP_LSH:
// MIPS will only use 5 lowest bits in R1 as shift offset. // MIPS will only use 5 lowest bits in R1 as shift offset.

16
js/src/jit/mips32/Trampoline-mips32.cpp
View File

@ -441,7 +441,7 @@ JitRuntime::generateArgumentsRectifier(JSContext* cx, void** returnAddrOut)
masm.andPtr(Imm32(CalleeTokenMask), numArgsReg); masm.andPtr(Imm32(CalleeTokenMask), numArgsReg);
masm.load16ZeroExtend(Address(numArgsReg, JSFunction::offsetOfNargs()), numArgsReg); masm.load16ZeroExtend(Address(numArgsReg, JSFunction::offsetOfNargs()), numArgsReg);
masm.ma_subu(t1, numArgsReg, s3); masm.as_subu(t1, numArgsReg, s3);
// Get the topmost argument. // Get the topmost argument.
masm.ma_sll(t0, s3, Imm32(3)); // t0 <- nargs * 8 masm.ma_sll(t0, s3, Imm32(3)); // t0 <- nargs * 8
@ -1191,7 +1191,7 @@ JitRuntime::generateProfilerExitFrameTailStub(JSContext* cx)
// Store return frame in lastProfilingFrame. // Store return frame in lastProfilingFrame.
// scratch2 := StackPointer + Descriptor.size*1 + JitFrameLayout::Size(); // scratch2 := StackPointer + Descriptor.size*1 + JitFrameLayout::Size();
masm.ma_addu(scratch2, StackPointer, scratch1); masm.as_addu(scratch2, StackPointer, scratch1);
masm.ma_addu(scratch2, scratch2, Imm32(JitFrameLayout::Size())); masm.ma_addu(scratch2, scratch2, Imm32(JitFrameLayout::Size()));
masm.storePtr(scratch2, lastProfilingFrame); masm.storePtr(scratch2, lastProfilingFrame);
masm.ret(); masm.ret();
@ -1225,7 +1225,7 @@ JitRuntime::generateProfilerExitFrameTailStub(JSContext* cx)
// //
masm.bind(&handle_BaselineStub); masm.bind(&handle_BaselineStub);
{ {
masm.ma_addu(scratch3, StackPointer, scratch1); masm.as_addu(scratch3, StackPointer, scratch1);
Address stubFrameReturnAddr(scratch3, Address stubFrameReturnAddr(scratch3,
JitFrameLayout::Size() + JitFrameLayout::Size() +
BaselineStubFrameLayout::offsetOfReturnAddress()); BaselineStubFrameLayout::offsetOfReturnAddress());
@ -1282,7 +1282,7 @@ JitRuntime::generateProfilerExitFrameTailStub(JSContext* cx)
masm.bind(&handle_Rectifier); masm.bind(&handle_Rectifier);
{ {
// scratch2 := StackPointer + Descriptor.size*1 + JitFrameLayout::Size(); // scratch2 := StackPointer + Descriptor.size*1 + JitFrameLayout::Size();
masm.ma_addu(scratch2, StackPointer, scratch1); masm.as_addu(scratch2, StackPointer, scratch1);
masm.add32(Imm32(JitFrameLayout::Size()), scratch2); masm.add32(Imm32(JitFrameLayout::Size()), scratch2);
masm.loadPtr(Address(scratch2, RectifierFrameLayout::offsetOfDescriptor()), scratch3); masm.loadPtr(Address(scratch2, RectifierFrameLayout::offsetOfDescriptor()), scratch3);
masm.ma_srl(scratch1, scratch3, Imm32(FRAMESIZE_SHIFT)); masm.ma_srl(scratch1, scratch3, Imm32(FRAMESIZE_SHIFT));
@ -1303,7 +1303,7 @@ JitRuntime::generateProfilerExitFrameTailStub(JSContext* cx)
masm.storePtr(scratch3, lastProfilingCallSite); masm.storePtr(scratch3, lastProfilingCallSite);
// scratch3 := RectFrame + Rect-Descriptor.Size + RectifierFrameLayout::Size() // scratch3 := RectFrame + Rect-Descriptor.Size + RectifierFrameLayout::Size()
masm.ma_addu(scratch3, scratch2, scratch1); masm.as_addu(scratch3, scratch2, scratch1);
masm.add32(Imm32(RectifierFrameLayout::Size()), scratch3); masm.add32(Imm32(RectifierFrameLayout::Size()), scratch3);
masm.storePtr(scratch3, lastProfilingFrame); masm.storePtr(scratch3, lastProfilingFrame);
masm.ret(); masm.ret();
@ -1318,7 +1318,7 @@ JitRuntime::generateProfilerExitFrameTailStub(JSContext* cx)
masm.bind(&checkOk); masm.bind(&checkOk);
} }
#endif #endif
masm.ma_addu(scratch3, scratch2, scratch1); masm.as_addu(scratch3, scratch2, scratch1);
Address stubFrameReturnAddr(scratch3, RectifierFrameLayout::Size() + Address stubFrameReturnAddr(scratch3, RectifierFrameLayout::Size() +
BaselineStubFrameLayout::offsetOfReturnAddress()); BaselineStubFrameLayout::offsetOfReturnAddress());
masm.loadPtr(stubFrameReturnAddr, scratch2); masm.loadPtr(stubFrameReturnAddr, scratch2);
@ -1350,7 +1350,7 @@ JitRuntime::generateProfilerExitFrameTailStub(JSContext* cx)
masm.bind(&handle_IonAccessorIC); masm.bind(&handle_IonAccessorIC);
{ {
// scratch2 := StackPointer + Descriptor.size + JitFrameLayout::Size() // scratch2 := StackPointer + Descriptor.size + JitFrameLayout::Size()
masm.ma_addu(scratch2, StackPointer, scratch1); masm.as_addu(scratch2, StackPointer, scratch1);
masm.addPtr(Imm32(JitFrameLayout::Size()), scratch2); masm.addPtr(Imm32(JitFrameLayout::Size()), scratch2);
// scratch3 := AccFrame-Descriptor.Size // scratch3 := AccFrame-Descriptor.Size
@ -1374,7 +1374,7 @@ JitRuntime::generateProfilerExitFrameTailStub(JSContext* cx)
// lastProfilingFrame := AccessorFrame + AccFrame-Descriptor.Size + // lastProfilingFrame := AccessorFrame + AccFrame-Descriptor.Size +
// IonAccessorICFrameLayout::Size() // IonAccessorICFrameLayout::Size()
masm.ma_addu(scratch1, scratch2, scratch3); masm.as_addu(scratch1, scratch2, scratch3);
masm.addPtr(Imm32(IonAccessorICFrameLayout::Size()), scratch1); masm.addPtr(Imm32(IonAccessorICFrameLayout::Size()), scratch1);
masm.storePtr(scratch1, lastProfilingFrame); masm.storePtr(scratch1, lastProfilingFrame);
masm.ret(); masm.ret();