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Fixed AMD64 loop branch patching for >32-bit offstes.
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@ -950,9 +950,11 @@ namespace nanojit
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#define JMPc 0xe9
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#define JMP_long_placeholder() do {\
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underrunProtect(5); \
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JMP_long_nochk_offset(-1); } while(0)
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#define JMP_long_placeholder() do { \
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underrunProtect(14); \
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IMM64(-1); \
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JMPm_nochk(0); \
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} while (0)
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// this should only be used when you can guarantee there is enough room on the page
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#define JMP_long_nochk_offset(o) do {\
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@ -372,11 +372,22 @@ namespace nanojit
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void Assembler::nPatchBranch(NIns* branch, NIns* location)
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{
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uint32_t offset = location - branch;
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#if defined NANOJIT_IA32
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intptr_t offset = intptr_t(location) - intptr_t(branch);
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if (branch[0] == JMPc)
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*(uint32_t*)&branch[1] = offset - 5;
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else
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*(uint32_t*)&branch[2] = offset - 6;
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#else
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if (branch[0] == 0xFF && branch[1] == 0x25) {
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NIns *mem;
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mem = &branch[6] + *(int32_t *)&branch[2];
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*(intptr_t *)mem = intptr_t(location);
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} else {
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NanoAssert(0);
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}
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#endif
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}
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RegisterMask Assembler::hint(LIns* i, RegisterMask allow)
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