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Fix asm_ret on ARM (515290, r=gal,vlad).
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@ -474,8 +474,6 @@ Assembler::genPrologue()
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uint32_t stackNeeded = max_out_args + STACK_GRANULARITY * _activation.tos;
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uint32_t savingCount = 2;
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uint32_t savingMask = rmask(FP) | rmask(LR);
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// so for alignment purposes we've pushed return addr and fp
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uint32_t stackPushed = STACK_GRANULARITY * savingCount;
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uint32_t aligned = alignUp(stackNeeded + stackPushed, NJ_ALIGN_STACK);
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@ -490,7 +488,7 @@ Assembler::genPrologue()
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NIns *patchEntry = _nIns;
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MOV(FP, SP);
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PUSH_mask(savingMask);
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PUSH_mask((rmask(FP) | rmask(LR)));
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return patchEntry;
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}
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@ -519,13 +517,7 @@ Assembler::nFragExit(LInsp guard)
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// will work correctly.
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JMP_far(_epilogue);
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// Load the guard record pointer into R2. We want it in R0 but we can't
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// do this at this stage because R0 is used for something else.
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// I don't understand why I can't load directly into R0. It works for
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// the JavaScript JIT but not for the Regular Expression compiler.
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// However, I haven't pushed this further as it only saves a single MOV
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// instruction in genEpilogue.
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asm_ld_imm(R2, int(gr));
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asm_ld_imm(R0, int(gr));
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// Set the jmp pointer to the start of the sequence so that patched
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// branches can skip the LDi sequence.
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@ -552,13 +544,7 @@ Assembler::genEpilogue()
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// Note that we don't support anything older than ARMv5.
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NanoAssert(AvmCore::config.arch >= 5);
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RegisterMask savingMask = rmask(FP) | rmask(PC);
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POP_mask(savingMask); // regs
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// nFragExit loads the guard record pointer into R2, but we need it in R0
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// so it must be moved here.
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MOV(R0,R2); // return GuardRecord*
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POP_mask((rmask(FP) | rmask(PC))); // regs
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return _nIns;
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}
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