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Bug 969375 - MIPS port: Added Architecture-mips files. r=nbp
This commit is contained in:
Branislav Rankov
parent
bae6d34e37
commit
a9351d43ee
78
js/src/jit/mips/Architecture-mips.cpp
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78
js/src/jit/mips/Architecture-mips.cpp
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/* -*- Mode: C++; tab-width: 8; indent-tabs-mode: nil; c-basic-offset: 4 -*-
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* vim: set ts=8 sts=4 et sw=4 tw=99:
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* This Source Code Form is subject to the terms of the Mozilla Public
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* License, v. 2.0. If a copy of the MPL was not distributed with this
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* file, You can obtain one at http://mozilla.org/MPL/2.0/. */
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#include "jit/mips/Architecture-mips.h"
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#include <elf.h>
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#include <fcntl.h>
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#include <unistd.h>
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#include "jit/mips/Assembler-mips.h"
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#define HWCAP_MIPS (1 << 31)
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#define HWCAP_FPU (1 << 0)
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namespace js {
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namespace jit {
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uint32_t GetMIPSFlags()
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{
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static bool isSet = false;
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static uint32_t flags = 0;
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if (isSet)
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return flags;
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#if WTF_OS_LINUX
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FILE *fp = fopen("/proc/cpuinfo", "r");
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if (!fp)
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return false;
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char buf[1024];
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memset(buf, 0, sizeof(buf));
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fread(buf, sizeof(char), sizeof(buf)-1, fp);
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fclose(fp);
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if (strstr(buf, "FPU"))
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flags |= HWCAP_FPU;
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isSet = true;
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return flags;
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#endif
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return false;
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}
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bool hasFPU()
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{
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return js::jit::GetMIPSFlags() & HWCAP_FPU;
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}
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Registers::Code
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Registers::FromName(const char *name)
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{
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for (size_t i = 0; i < Total; i++) {
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if (strcmp(GetName(i), name) == 0)
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return Code(i);
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}
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return Invalid;
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}
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FloatRegisters::Code
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FloatRegisters::FromName(const char *name)
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{
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for (size_t i = 0; i < Total; i++) {
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if (strcmp(GetName(i), name) == 0)
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return Code(i);
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}
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return Invalid;
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}
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} // namespace ion
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} // namespace js
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280
js/src/jit/mips/Architecture-mips.h
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280
js/src/jit/mips/Architecture-mips.h
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/* -*- Mode: C++; tab-width: 8; indent-tabs-mode: nil; c-basic-offset: 4 -*-
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* vim: set ts=8 sts=4 et sw=4 tw=99:
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* This Source Code Form is subject to the terms of the Mozilla Public
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* License, v. 2.0. If a copy of the MPL was not distributed with this
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* file, You can obtain one at http://mozilla.org/MPL/2.0/. */
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#ifndef jit_mips_Architecture_mips_h
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#define jit_mips_Architecture_mips_h
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#include <limits.h>
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#include <stdint.h>
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#include "js/Utility.h"
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// gcc appears to use _mips_hard_float to denote
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// that the target is a hard-float target.
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#ifdef _mips_hard_float
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#define JS_CODEGEN_MIPS_HARDFP
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#endif
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namespace js {
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namespace jit {
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// Shadow stack space is not required on MIPS.
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static const uint32_t ShadowStackSpace = 0;
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// These offsets are specific to nunboxing, and capture offsets into the
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// components of a js::Value.
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// Size of MIPS32 general purpose registers is 32 bits.
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static const int32_t NUNBOX32_TYPE_OFFSET = 4;
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static const int32_t NUNBOX32_PAYLOAD_OFFSET = 0;
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// Size of each bailout table entry.
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// For MIPS this is 2 instructions relative call.
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static const uint32_t BAILOUT_TABLE_ENTRY_SIZE = 2 * sizeof(void *);
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class Registers
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{
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public:
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enum RegisterID {
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r0 = 0,
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r1,
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r2,
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r3,
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r4,
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r5,
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r6,
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r7,
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r8,
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r9,
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r10,
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r11,
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r12,
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r13,
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r14,
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r15,
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r16,
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r17,
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r18,
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r19,
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r20,
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r21,
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r22,
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r23,
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r24,
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r25,
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r26,
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r27,
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r28,
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r29,
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r30,
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r31,
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zero = r0,
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at = r1,
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v0 = r2,
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v1 = r3,
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a0 = r4,
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a1 = r5,
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a2 = r6,
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a3 = r7,
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t0 = r8,
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t1 = r9,
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t2 = r10,
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t3 = r11,
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t4 = r12,
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t5 = r13,
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t6 = r14,
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t7 = r15,
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s0 = r16,
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s1 = r17,
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s2 = r18,
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s3 = r19,
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s4 = r20,
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s5 = r21,
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s6 = r22,
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s7 = r23,
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t8 = r24,
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t9 = r25,
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k0 = r26,
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k1 = r27,
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gp = r28,
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sp = r29,
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fp = r30,
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ra = r31,
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invalid_reg
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};
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typedef RegisterID Code;
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static const char *GetName(Code code) {
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static const char * const Names[] = { "zero", "at", "v0", "v1", "a0", "a1", "a2", "a3",
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"t0", "t1", "t2", "t3", "t4", "t5", "t6", "t7",
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"s0", "s1", "s2", "s3", "s4", "s5", "s6", "s7",
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"t8", "t9", "k0", "k1", "gp", "sp", "fp", "ra"};
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return Names[code];
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}
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static const char *GetName(uint32_t i) {
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MOZ_ASSERT(i < Total);
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return GetName(Code(i));
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}
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static Code FromName(const char *name);
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static const Code StackPointer = sp;
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static const Code Invalid = invalid_reg;
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static const uint32_t Total = 32;
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static const uint32_t Allocatable = 14;
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static const uint32_t AllMask = 0xffffffff;
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static const uint32_t ArgRegMask = (1 << a0) | (1 << a1) | (1 << a2) | (1 << a3);
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static const uint32_t VolatileMask =
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(1 << Registers::v0) |
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(1 << Registers::v1) |
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(1 << Registers::a0) |
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(1 << Registers::a1) |
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(1 << Registers::a2) |
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(1 << Registers::a3) |
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(1 << Registers::t0) |
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(1 << Registers::t1) |
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(1 << Registers::t2) |
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(1 << Registers::t3) |
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(1 << Registers::t4) |
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(1 << Registers::t5) |
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(1 << Registers::t6) |
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(1 << Registers::t7);
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static const uint32_t NonVolatileMask =
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(1 << Registers::s0) |
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(1 << Registers::s1) |
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(1 << Registers::s2) |
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(1 << Registers::s3) |
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(1 << Registers::s4) |
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(1 << Registers::s5) |
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(1 << Registers::s6) |
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(1 << Registers::s7);
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static const uint32_t WrapperMask =
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VolatileMask | // = arguments
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(1 << Registers::t0) | // = outReg
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(1 << Registers::t1); // = argBase
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static const uint32_t NonAllocatableMask =
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(1 << Registers::zero) |
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(1 << Registers::at) | // at = scratch
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(1 << Registers::t8) | // t8 = scratch
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(1 << Registers::t9) | // t9 = scratch
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(1 << Registers::k0) |
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(1 << Registers::k1) |
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(1 << Registers::gp) |
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(1 << Registers::sp) |
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(1 << Registers::fp) |
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(1 << Registers::ra);
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// Registers that can be allocated without being saved, generally.
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static const uint32_t TempMask = VolatileMask & ~NonAllocatableMask;
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// Registers returned from a JS -> JS call.
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static const uint32_t JSCallMask =
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(1 << Registers::v0) |
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(1 << Registers::v1);
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// Registers returned from a JS -> C call.
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static const uint32_t CallMask =
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(1 << Registers::v0) |
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(1 << Registers::v1); // used for double-size returns
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static const uint32_t AllocatableMask = AllMask & ~NonAllocatableMask;
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};
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// Smallest integer type that can hold a register bitmask.
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typedef uint32_t PackedRegisterMask;
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// MIPS32 uses pairs of even and odd float registers as double precision
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// registers. Example: f0 (double) is composed of f0 and f1 (single).
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// This port only uses even registers to avoid allocation problems.
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class FloatRegisters
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{
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public:
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enum FPRegisterID {
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f0 = 0, // f0, f2 - Return values
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f2,
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f4, // f4 - f10, f16, f18 - Temporaries
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f6,
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f8,
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f10,
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f12, // f12, f14 - Arguments
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f14,
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f16,
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f18,
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f20, // f20 - f30 - Saved registers
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f22,
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f24,
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f26,
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f28,
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f30,
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invalid_freg
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};
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typedef FPRegisterID Code;
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static const char *GetName(Code code) {
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static const char * const Names[] = { "f0", "f2", "f4", "f6",
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"f8", "f10", "f12", "f14",
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"f16", "f18", "f20", "f22",
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"f24", "f26", "f28", "f30"};
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return Names[code];
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}
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static const char *GetName(uint32_t i) {
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JS_ASSERT(i < Total);
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return GetName(Code(i));
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}
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static Code FromName(const char *name);
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static const Code Invalid = invalid_freg;
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static const uint32_t Total = 16;
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static const uint32_t Allocatable = 14;
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static const uint32_t AllMask = 0xffff;
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static const uint32_t VolatileMask =
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(1 << FloatRegisters::f0) |
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(1 << FloatRegisters::f2) |
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(1 << FloatRegisters::f4) |
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(1 << FloatRegisters::f6) |
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(1 << FloatRegisters::f8) |
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(1 << FloatRegisters::f10) |
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(1 << FloatRegisters::f12) |
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(1 << FloatRegisters::f14) |
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(1 << FloatRegisters::f16) |
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(1 << FloatRegisters::f18);
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static const uint32_t NonVolatileMask =
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(1 << FloatRegisters::f20) |
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(1 << FloatRegisters::f22) |
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(1 << FloatRegisters::f24) |
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(1 << FloatRegisters::f26) |
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(1 << FloatRegisters::f28) |
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(1 << FloatRegisters::f30);
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static const uint32_t WrapperMask = VolatileMask;
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// f18 and f16 are MIPS scratch float registers.
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static const uint32_t NonAllocatableMask =
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(1 << f16) |
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(1 << f18);
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// Registers that can be allocated without being saved, generally.
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static const uint32_t TempMask = VolatileMask & ~NonAllocatableMask;
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static const uint32_t AllocatableMask = AllMask & ~NonAllocatableMask;
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};
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uint32_t GetMIPSFlags();
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bool hasFPU();
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} // namespace jit
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} // namespace js
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#endif /* jit_mips_Architecture_mips_h */
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