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https://gitlab.winehq.org/wine/wine-gecko.git
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Bug 520712 - nanojit: print assembly code for X64 backend with TMFLAGS=assembly. r=edwsmith.
--HG-- extra : convert_revision : bc99b0483e324920fa4c55235d1f9da58eeebcaf
This commit is contained in:
Nicholas Nethercote
parent
e33f55be7a
commit
a8fa693ddd
File diff suppressed because it is too large
Load Diff
@ -163,26 +163,25 @@ namespace nanojit
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X64_call = 0x00000000E8000005LL, // near call
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X64_callrax = 0xD0FF000000000002LL, // indirect call to addr in rax (no REX)
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X64_cmovqno = 0xC0410F4800000004LL, // 64bit conditional mov if (no overflow) r = b
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X64_cmovqb = 0xC0420F4800000004LL, // 64bit conditional mov if (uint <) r = b
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X64_cmovqae = 0xC0430F4800000004LL, // 64bit conditional mov if (uint >=) r = b
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X64_cmovqne = 0xC0450F4800000004LL, // 64bit conditional mov if (c) r = b
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X64_cmovqbe = 0xC0460F4800000004LL, // 64bit conditional mov if (uint <=) r = b
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X64_cmovqa = 0xC0470F4800000004LL, // 64bit conditional mov if (uint >) r = b
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X64_cmovql = 0xC04C0F4800000004LL, // 64bit conditional mov if (int <) r = b
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X64_cmovqge = 0xC04D0F4800000004LL, // 64bit conditional mov if (int >=) r = b
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X64_cmovqle = 0xC04E0F4800000004LL, // 64bit conditional mov if (int <=) r = b
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X64_cmovqg = 0xC04F0F4800000004LL, // 64bit conditional mov if (int >) r = b
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X64_cmovqnae= 0xC0420F4800000004LL, // 64bit conditional mov if (uint <) r = b
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X64_cmovqnb = 0xC0430F4800000004LL, // 64bit conditional mov if (uint >=) r = b
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X64_cmovqne = 0xC0450F4800000004LL, // 64bit conditional mov if (c) r = b
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X64_cmovqna = 0xC0460F4800000004LL, // 64bit conditional mov if (uint <=) r = b
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X64_cmovqnbe= 0xC0470F4800000004LL, // 64bit conditional mov if (uint >) r = b
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X64_cmovqnge= 0xC04C0F4800000004LL, // 64bit conditional mov if (int <) r = b
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X64_cmovqnl = 0xC04D0F4800000004LL, // 64bit conditional mov if (int >=) r = b
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X64_cmovqng = 0xC04E0F4800000004LL, // 64bit conditional mov if (int <=) r = b
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X64_cmovqnle= 0xC04F0F4800000004LL, // 64bit conditional mov if (int >) r = b
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X64_cmovno = 0xC0410F4000000004LL, // 32bit conditional mov if (no overflow) r = b
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X64_cmovb = 0xC0420F4000000004LL, // 32bit conditional mov if (uint <) r = b
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X64_cmovae = 0xC0430F4000000004LL, // 32bit conditional mov if (uint >=) r = b
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X64_cmovne = 0xC0450F4000000004LL, // 32bit conditional mov if (c) r = b
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X64_cmovbe = 0xC0460F4000000004LL, // 32bit conditional mov if (uint <=) r = b
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X64_cmova = 0xC0470F4000000004LL, // 32bit conditional mov if (uint >) r = b
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X64_cmovl = 0xC04C0F4000000004LL, // 32bit conditional mov if (int <) r = b
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X64_cmovge = 0xC04D0F4000000004LL, // 32bit conditional mov if (int >=) r = b
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X64_cmovle = 0xC04E0F4000000004LL, // 32bit conditional mov if (int <=) r = b
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X64_cmovg = 0xC04F0F4000000004LL, // 32bit conditional mov if (int >) r = b
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X64_cmov_64 = 0x0000000800000000LL, // OR with 32-bit cmov to promote to 64-bit
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X64_cmovnae = 0xC0420F4000000004LL, // 32bit conditional mov if (uint <) r = b
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X64_cmovnb = 0xC0430F4000000004LL, // 32bit conditional mov if (uint >=) r = b
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X64_cmovne = 0xC0450F4000000004LL, // 32bit conditional mov if (c) r = b
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X64_cmovna = 0xC0460F4000000004LL, // 32bit conditional mov if (uint <=) r = b
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X64_cmovnbe = 0xC0470F4000000004LL, // 32bit conditional mov if (uint >) r = b
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X64_cmovnge = 0xC04C0F4000000004LL, // 32bit conditional mov if (int <) r = b
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X64_cmovnl = 0xC04D0F4000000004LL, // 32bit conditional mov if (int >=) r = b
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X64_cmovng = 0xC04E0F4000000004LL, // 32bit conditional mov if (int <=) r = b
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X64_cmovnle = 0xC04F0F4000000004LL, // 32bit conditional mov if (int >) r = b
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X64_cmplr = 0xC03B400000000003LL, // 32bit compare r,b
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X64_cmpqr = 0xC03B480000000003LL, // 64bit compare r,b
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X64_cmplri = 0xF881400000000003LL, // 32bit compare r,imm32
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@ -206,13 +205,11 @@ namespace nanojit
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X64_ja = 0x00000000870F0006LL, // jump near if above (uint >)
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X64_jbe = 0x00000000860F0006LL, // jump near if below or equal (uint <=)
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X64_je = 0x00000000840F0006LL, // near jump if equal
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X64_jne = 0x00000000850F0006LL, // jump near if not equal
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X64_jl = 0x000000008C0F0006LL, // jump near if less (int <)
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X64_jge = 0x000000008D0F0006LL, // jump near if greater or equal (int >=)
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X64_jg = 0x000000008F0F0006LL, // jump near if greater (int >)
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X64_jle = 0x000000008E0F0006LL, // jump near if less or equal (int <=)
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X64_jp = 0x000000008A0F0006LL, // jump near if parity (PF == 1)
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X64_jnp = 0x000000008B0F0006LL, // jump near if not parity (PF == 0)
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X64_jneg = 0x0000000001000000LL, // xor with this mask to negate the condition
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X64_jo8 = 0x0070000000000002LL, // jump near if overflow
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X64_jb8 = 0x0072000000000002LL, // jump near if below (uint <)
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@ -241,7 +238,7 @@ namespace nanojit
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X64_movi = 0xB840000000000002LL, // 32bit mov r <- imm32
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X64_movqi32 = 0xC0C7480000000003LL, // 64bit mov r <- int64(imm32)
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X64_movapsr = 0xC0280F4000000004LL, // 128bit mov xmm <- xmm
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X64_movqrx = 0xC07E0F4866000005LL, // 64bit mov b <- xmm-r
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X64_movqrx = 0xC07E0F4866000005LL, // 64bit mov b <- xmm-r (reverses the usual r/b order)
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X64_movqxr = 0xC06E0F4866000005LL, // 64bit mov b -> xmm-r
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X64_movqrm = 0x00000000808B4807LL, // 64bit load r <- [b+d32]
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X64_movsdrr = 0xC0100F40F2000005LL, // 64bit mov xmm-r <- xmm-b (upper 64bits unchanged)
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@ -334,6 +331,9 @@ namespace nanojit
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}
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verbose_only( extern const char* regNames[]; )
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verbose_only( extern const char* gpRegNames32[]; )
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verbose_only( extern const char* gpRegNames8[]; )
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verbose_only( extern const char* gpRegNames8hi[]; )
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#define DECLARE_PLATFORM_STATS()
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#define DECLARE_PLATFORM_REGALLOC()
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@ -349,7 +349,8 @@ namespace nanojit
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void JMPl(NIns*);\
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void emit(uint64_t op);\
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void emit8(uint64_t op, int64_t val);\
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void emit32(uint64_t op, int64_t val);\
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void emit_target8(size_t underrun, uint64_t op, NIns* target);\
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void emit_target32(size_t underrun, uint64_t op, NIns* target);\
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void emitrr(uint64_t op, Register r, Register b);\
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void emitrxb(uint64_t op, Register r, Register x, Register b);\
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void emitxb(uint64_t op, Register x, Register b) { emitrxb(op, (Register)0, x, b); }\
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@ -362,11 +363,13 @@ namespace nanojit
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uint64_t emit_disp32(uint64_t op, int32_t d);\
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void emitprm(uint64_t op, Register r, int32_t d, Register b);\
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void emitrr_imm(uint64_t op, Register r, Register b, int32_t imm);\
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void emitr_imm64(uint64_t op, Register r, uint64_t imm);\
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void emitrxb_imm(uint64_t op, Register r, Register x, Register b, int32_t imm);\
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void emitr_imm(uint64_t op, Register b, int32_t imm) { emitrr_imm(op, (Register)0, b, imm); }\
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void emitr_imm(uint64_t op, Register r, int32_t imm) { emitrr_imm(op, (Register)0, r, imm); }\
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void emitr_imm8(uint64_t op, Register b, int32_t imm8);\
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void emit_int(Register r, int32_t v);\
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void emit_quad(Register r, uint64_t v);\
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void emitxm_abs(uint64_t op, Register r, int32_t addr32);\
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void emitxm_rel(uint64_t op, Register r, NIns* addr64);\
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void asm_quad(Register r, uint64_t v);\
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void asm_regarg(ArgSize, LIns*, Register);\
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void asm_stkarg(ArgSize, LIns*, int);\
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void asm_shift(LIns*);\
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@ -381,7 +384,173 @@ namespace nanojit
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void fcmp(LIns*, LIns*);\
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NIns* asm_fbranch(bool, LIns*, NIns*);\
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void asm_div_mod(LIns *i);\
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int max_stk_used;
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int max_stk_used;\
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void PUSHR(Register r);\
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void POPR(Register r);\
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void NOT(Register r);\
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void NEG(Register r);\
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void IDIV(Register r);\
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void SHR(Register r);\
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void SAR(Register r);\
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void SHL(Register r);\
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void SHRQ(Register r);\
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void SARQ(Register r);\
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void SHLQ(Register r);\
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void SHRI(Register r, int i);\
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void SARI(Register r, int i);\
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void SHLI(Register r, int i);\
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void SHRQI(Register r, int i);\
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void SARQI(Register r, int i);\
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void SHLQI(Register r, int i);\
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void SETE(Register r);\
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void SETL(Register r);\
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void SETLE(Register r);\
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void SETG(Register r);\
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void SETGE(Register r);\
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void SETB(Register r);\
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void SETBE(Register r);\
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void SETA(Register r);\
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void SETAE(Register r);\
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void SETO(Register r);\
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void ADDRR(Register l, Register r);\
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void SUBRR(Register l, Register r);\
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void ANDRR(Register l, Register r);\
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void ORLRR(Register l, Register r);\
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void XORRR(Register l, Register r);\
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void IMUL(Register l, Register r);\
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void CMPLR(Register l, Register r);\
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void MOVLR(Register l, Register r);\
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void ADDQRR(Register l, Register r);\
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void SUBQRR(Register l, Register r);\
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void ANDQRR(Register l, Register r);\
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void ORQRR(Register l, Register r);\
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void XORQRR(Register l, Register r);\
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void CMPQR(Register l, Register r);\
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void MOVQR(Register l, Register r);\
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void MOVAPSR(Register l, Register r);\
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void CMOVNO(Register l, Register r);\
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void CMOVNE(Register l, Register r);\
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void CMOVNL(Register l, Register r);\
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void CMOVNLE(Register l, Register r);\
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void CMOVNG(Register l, Register r);\
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void CMOVNGE(Register l, Register r);\
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void CMOVNB(Register l, Register r);\
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void CMOVNBE(Register l, Register r);\
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void CMOVNA(Register l, Register r);\
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void CMOVNAE(Register l, Register r);\
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void CMOVQNO(Register l, Register r);\
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void CMOVQNE(Register l, Register r);\
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void CMOVQNL(Register l, Register r);\
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void CMOVQNLE(Register l, Register r);\
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void CMOVQNG(Register l, Register r);\
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void CMOVQNGE(Register l, Register r);\
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void CMOVQNB(Register l, Register r);\
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void CMOVQNBE(Register l, Register r);\
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void CMOVQNA(Register l, Register r);\
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void CMOVQNAE(Register l, Register r);\
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void MOVSXDR(Register l, Register r);\
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void MOVZX8(Register l, Register r);\
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void XORPS(Register r);\
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void DIVSD(Register l, Register r);\
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void MULSD(Register l, Register r);\
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void ADDSD(Register l, Register r);\
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void SUBSD(Register l, Register r);\
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void CVTSQ2SD(Register l, Register r);\
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void CVTSI2SD(Register l, Register r);\
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void UCOMISD(Register l, Register r);\
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void MOVQRX(Register l, Register r);\
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void MOVQXR(Register l, Register r);\
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void MOVI(Register r, int32_t i32);\
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void ADDLRI(Register r, int32_t i32);\
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void SUBLRI(Register r, int32_t i32);\
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void ANDLRI(Register r, int32_t i32);\
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void ORLRI(Register r, int32_t i32);\
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void XORLRI(Register r, int32_t i32);\
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void CMPLRI(Register r, int32_t i32);\
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void ADDQRI(Register r, int32_t i32);\
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void SUBQRI(Register r, int32_t i32);\
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void ANDQRI(Register r, int32_t i32);\
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void ORQRI(Register r, int32_t i32);\
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void XORQRI(Register r, int32_t i32);\
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void CMPQRI(Register r, int32_t i32);\
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void MOVQI32(Register r, int32_t i32);\
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void ADDLR8(Register r, int32_t i8);\
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void SUBLR8(Register r, int32_t i8);\
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void ANDLR8(Register r, int32_t i8);\
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void ORLR8(Register r, int32_t i8);\
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void XORLR8(Register r, int32_t i8);\
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void CMPLR8(Register r, int32_t i8);\
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void ADDQR8(Register r, int32_t i8);\
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void SUBQR8(Register r, int32_t i8);\
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void ANDQR8(Register r, int32_t i8);\
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void ORQR8(Register r, int32_t i8);\
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void XORQR8(Register r, int32_t i8);\
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void CMPQR8(Register r, int32_t i8);\
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void IMULI(Register l, Register r, int32_t i32);\
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void MOVQI(Register r, uint64_t u64);\
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void LEARIP(Register r, int32_t d);\
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void LEAQRM(Register r1, int d, Register r2);\
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void MOVLRM(Register r1, int d, Register r2);\
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void MOVQRM(Register r1, int d, Register r2);\
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void MOVLMR(Register r1, int d, Register r2);\
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void MOVQMR(Register r1, int d, Register r2);\
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void MOVZX8M(Register r1, int d, Register r2);\
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void MOVZX16M(Register r1, int d, Register r2);\
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void MOVSDRM(Register r1, int d, Register r2);\
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void MOVSDMR(Register r1, int d, Register r2);\
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void JMP8(size_t n, NIns* t);\
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void JMP32(size_t n, NIns* t);\
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void JO(size_t n, NIns* t);\
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void JE(size_t n, NIns* t);\
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void JL(size_t n, NIns* t);\
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void JLE(size_t n, NIns* t);\
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void JG(size_t n, NIns* t);\
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void JGE(size_t n, NIns* t);\
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void JB(size_t n, NIns* t);\
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void JBE(size_t n, NIns* t);\
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void JA(size_t n, NIns* t);\
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void JAE(size_t n, NIns* t);\
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void JP(size_t n, NIns* t);\
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void JNO(size_t n, NIns* t);\
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void JNE(size_t n, NIns* t);\
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void JNL(size_t n, NIns* t);\
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void JNLE(size_t n, NIns* t);\
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void JNG(size_t n, NIns* t);\
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void JNGE(size_t n, NIns* t);\
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void JNB(size_t n, NIns* t);\
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void JNBE(size_t n, NIns* t);\
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void JNA(size_t n, NIns* t);\
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void JNAE(size_t n, NIns* t);\
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void JO8(size_t n, NIns* t);\
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void JE8(size_t n, NIns* t);\
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void JL8(size_t n, NIns* t);\
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void JLE8(size_t n, NIns* t);\
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void JG8(size_t n, NIns* t);\
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void JGE8(size_t n, NIns* t);\
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void JB8(size_t n, NIns* t);\
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void JBE8(size_t n, NIns* t);\
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void JA8(size_t n, NIns* t);\
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void JAE8(size_t n, NIns* t);\
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void JP8(size_t n, NIns* t);\
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void JNO8(size_t n, NIns* t);\
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void JNE8(size_t n, NIns* t);\
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void JNL8(size_t n, NIns* t);\
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void JNLE8(size_t n, NIns* t);\
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void JNG8(size_t n, NIns* t);\
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void JNGE8(size_t n, NIns* t);\
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void JNB8(size_t n, NIns* t);\
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void JNBE8(size_t n, NIns* t);\
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void JNA8(size_t n, NIns* t);\
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void JNAE8(size_t n, NIns* t);\
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void CALL(size_t n, NIns* t);\
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void CALLRAX();\
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void RET();\
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void MOVQSPR(int d, Register r);\
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void XORPSA(Register r, int32_t i32);\
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void XORPSM(Register r, NIns* a64);\
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void X86_AND8R(Register r);\
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void X86_SETNP(Register r);\
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void X86_SETE(Register r);\
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#define swapptrs() { NIns* _tins = _nIns; _nIns=_nExitIns; _nExitIns=_tins; }
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