diff --git a/js/src/nanojit/Assembler.cpp b/js/src/nanojit/Assembler.cpp index a19ed1dc9c0..fd97d3ec162 100644 --- a/js/src/nanojit/Assembler.cpp +++ b/js/src/nanojit/Assembler.cpp @@ -1482,7 +1482,6 @@ namespace nanojit } case LIR_eq: case LIR_ov: - case LIR_cs: case LIR_le: case LIR_lt: case LIR_gt: diff --git a/js/src/nanojit/LIR.cpp b/js/src/nanojit/LIR.cpp index 22fb37de3ed..f5ffc56c6ff 100644 --- a/js/src/nanojit/LIR.cpp +++ b/js/src/nanojit/LIR.cpp @@ -475,7 +475,7 @@ namespace nanojit bool LIns::isCond() const { LOpcode op = opcode(); - return (op == LIR_ov) || (op == LIR_cs) || isCmp(); + return (op == LIR_ov) || isCmp(); } bool LIns::isQuad() const { @@ -688,8 +688,6 @@ namespace nanojit return insImm(c1 == c2); case LIR_ov: return insImm((c2 != 0) && ((c1 + c2) <= c1)); - case LIR_cs: - return insImm((c2 != 0) && ((uint32_t(c1) + uint32_t(c2)) <= uint32_t(c1))); case LIR_lt: return insImm(c1 < c2); case LIR_gt: @@ -1729,7 +1727,6 @@ namespace nanojit case LIR_qlo: case LIR_qhi: case LIR_ov: - case LIR_cs: case LIR_not: case LIR_mod: sprintf(s, "%s = %s %s", formatRef(i), lirNames[op], formatRef(i->oprnd1())); diff --git a/js/src/nanojit/LIRopcode.tbl b/js/src/nanojit/LIRopcode.tbl index 4c4e6134ced..b416a875f67 100644 --- a/js/src/nanojit/LIRopcode.tbl +++ b/js/src/nanojit/LIRopcode.tbl @@ -159,7 +159,8 @@ OPDEF(qhi, 51, 1, Op1) // get the high 32 bits of a 64-bit value OPDEF(unused52, 52,-1, None) OPDEF(ov, 53, 1, Op1) // test for overflow; value must have just been computed -OPDEF(cs, 54, 1, Op1) // test for carry; value must have just been computed + +OPDEF(unused53, 54,-1, None) // Integer (all sizes) relational operators. (op ^ 1) is the op which flips the // left and right sides of the comparison, so (lt ^ 1) == gt, or the operator diff --git a/js/src/nanojit/NativeARM.cpp b/js/src/nanojit/NativeARM.cpp index d8c0463ea0b..85909633e32 100644 --- a/js/src/nanojit/NativeARM.cpp +++ b/js/src/nanojit/NativeARM.cpp @@ -1564,7 +1564,6 @@ Assembler::asm_branch(bool branchOnFalse, LInsp cond, NIns* targ, bool isfar) // Standard signed and unsigned integer comparisons. case LIR_eq: cc = EQ; fp_cond = false; break; case LIR_ov: cc = VS; fp_cond = false; break; - case LIR_cs: cc = CS; fp_cond = false; break; case LIR_lt: cc = LT; fp_cond = false; break; case LIR_le: cc = LE; fp_cond = false; break; case LIR_gt: cc = GT; fp_cond = false; break; @@ -1608,8 +1607,8 @@ Assembler::asm_cmp(LIns *cond) { LOpcode condop = cond->opcode(); - // LIR_ov and LIR_cs recycle the flags set by arithmetic ops - if ((condop == LIR_ov) || (condop == LIR_cs)) + // LIR_ov recycles the flags set by arithmetic ops + if ((condop == LIR_ov)) return; LInsp lhs = cond->oprnd1(); @@ -1700,7 +1699,6 @@ Assembler::asm_cond(LInsp ins) { case LIR_eq: SET(r,EQ); break; case LIR_ov: SET(r,VS); break; - case LIR_cs: SET(r,CS); break; case LIR_lt: SET(r,LT); break; case LIR_le: SET(r,LE); break; case LIR_gt: SET(r,GT); break; @@ -1882,7 +1880,6 @@ Assembler::asm_cmov(LInsp ins) // note that these are all opposites... case LIR_eq: MOVNE(rr, iffalsereg); break; case LIR_ov: MOVVC(rr, iffalsereg); break; - case LIR_cs: MOVNC(rr, iffalsereg); break; case LIR_lt: MOVGE(rr, iffalsereg); break; case LIR_le: MOVGT(rr, iffalsereg); break; case LIR_gt: MOVLE(rr, iffalsereg); break; diff --git a/js/src/nanojit/NativeARM.h b/js/src/nanojit/NativeARM.h index 7934eddf908..1ee45546f09 100644 --- a/js/src/nanojit/NativeARM.h +++ b/js/src/nanojit/NativeARM.h @@ -503,7 +503,6 @@ enum { #define MOVHS(dr,sr) MOV_cond(HS, dr, sr) // Equivalent to MOVCS #define MOVCS(dr,sr) MOV_cond(CS, dr, sr) // Equivalent to MOVHS #define MOVVC(dr,sr) MOV_cond(VC, dr, sr) // overflow clear -#define MOVNC(dr,sr) MOV_cond(CC, dr, sr) // carry clear // _d = [_b+off] #define LDR(_d,_b,_off) asm_ldr_chk(_d,_b,_off,1) @@ -666,8 +665,6 @@ enum { #define JNGE(t) B_cond(LT,t) #define JG(t) B_cond(GT,t) #define JNG(t) B_cond(LE,t) -#define JC(t) B_cond(CS,t) -#define JNC(t) B_cond(CC,t) #define JO(t) B_cond(VS,t) #define JNO(t) B_cond(VC,t) diff --git a/js/src/nanojit/NativeSparc.cpp b/js/src/nanojit/NativeSparc.cpp index 5a63b8efe25..e7dc8a976ca 100644 --- a/js/src/nanojit/NativeSparc.cpp +++ b/js/src/nanojit/NativeSparc.cpp @@ -491,8 +491,6 @@ namespace nanojit BNE(0, tt); else if (condop == LIR_ov) BVC(0, tt); - else if (condop == LIR_cs) - BCC(0, tt); else if (condop == LIR_lt) BGE(0, tt); else if (condop == LIR_le) @@ -516,8 +514,6 @@ namespace nanojit BE(0, tt); else if (condop == LIR_ov) BVS(0, tt); - else if (condop == LIR_cs) - BCS(0, tt); else if (condop == LIR_lt) BL(0, tt); else if (condop == LIR_le) @@ -544,8 +540,8 @@ namespace nanojit underrunProtect(12); LOpcode condop = cond->opcode(); - // LIR_ov and LIR_cs recycle the flags set by arithmetic ops - if ((condop == LIR_ov) || (condop == LIR_cs)) + // LIR_ov recycles the flags set by arithmetic ops + if ((condop == LIR_ov)) return; LInsp lhs = cond->oprnd1(); @@ -612,8 +608,6 @@ namespace nanojit MOVEI(1, 1, 0, 0, r); else if (op == LIR_ov) MOVVSI(1, 1, 0, 0, r); - else if (op == LIR_cs) - MOVCSI(1, 1, 0, 0, r); else if (op == LIR_lt) MOVLI(1, 1, 0, 0, r); else if (op == LIR_le) @@ -788,7 +782,6 @@ namespace nanojit // note that these are all opposites... case LIR_eq: MOVNE (iffalsereg, 1, 0, 0, rr); break; case LIR_ov: MOVVC (iffalsereg, 1, 0, 0, rr); break; - case LIR_cs: MOVCC (iffalsereg, 1, 0, 0, rr); break; case LIR_lt: MOVGE (iffalsereg, 1, 0, 0, rr); break; case LIR_le: MOVG (iffalsereg, 1, 0, 0, rr); break; case LIR_gt: MOVLE (iffalsereg, 1, 0, 0, rr); break; diff --git a/js/src/nanojit/NativeSparc.h b/js/src/nanojit/NativeSparc.h index 02ea1faa437..36364025ac2 100644 --- a/js/src/nanojit/NativeSparc.h +++ b/js/src/nanojit/NativeSparc.h @@ -685,12 +685,6 @@ namespace nanojit Format_4_2I(rd, 0x2c, cc2, 0xb, cc1, cc0, simm11); \ } while (0) -#define MOVCSI(simm11, cc2, cc1, cc0, rd) \ - do { \ - asm_output("movcs %d, %s", simm11, gpn(rd)); \ - Format_4_2I(rd, 0x2c, cc2, 5, cc1, cc0, simm11); \ - } while (0) - #define MOVLEUI(simm11, cc2, cc1, cc0, rd) \ do { \ asm_output("movleu %d, %s", simm11, gpn(rd)); \ diff --git a/js/src/nanojit/Nativei386.cpp b/js/src/nanojit/Nativei386.cpp index 70953ef6c90..a3648b5e4d9 100644 --- a/js/src/nanojit/Nativei386.cpp +++ b/js/src/nanojit/Nativei386.cpp @@ -657,8 +657,6 @@ namespace nanojit JNE(targ, isfar); else if (condop == LIR_ov) JNO(targ, isfar); - else if (condop == LIR_cs) - JNC(targ, isfar); else if (condop == LIR_lt) JNL(targ, isfar); else if (condop == LIR_le) @@ -682,8 +680,6 @@ namespace nanojit JE(targ, isfar); else if (condop == LIR_ov) JO(targ, isfar); - else if (condop == LIR_cs) - JC(targ, isfar); else if (condop == LIR_lt) JL(targ, isfar); else if (condop == LIR_le) @@ -718,8 +714,8 @@ namespace nanojit { LOpcode condop = cond->opcode(); - // LIR_ov and LIR_cs recycle the flags set by arithmetic ops - if ((condop == LIR_ov) || (condop == LIR_cs)) + // LIR_ov recycles the flags set by arithmetic ops + if ((condop == LIR_ov)) return; LInsp lhs = cond->oprnd1(); @@ -788,8 +784,6 @@ namespace nanojit SETE(r); else if (op == LIR_ov) SETO(r); - else if (op == LIR_cs) - SETC(r); else if (op == LIR_lt) SETL(r); else if (op == LIR_le) @@ -1086,7 +1080,6 @@ namespace nanojit // note that these are all opposites... case LIR_eq: MRNE(rr, iffalsereg); break; case LIR_ov: MRNO(rr, iffalsereg); break; - case LIR_cs: MRNC(rr, iffalsereg); break; case LIR_lt: MRGE(rr, iffalsereg); break; case LIR_le: MRG(rr, iffalsereg); break; case LIR_gt: MRLE(rr, iffalsereg); break; diff --git a/js/src/nanojit/Nativei386.h b/js/src/nanojit/Nativei386.h index 20626ab63a1..ef58ca544a1 100644 --- a/js/src/nanojit/Nativei386.h +++ b/js/src/nanojit/Nativei386.h @@ -393,7 +393,6 @@ namespace nanojit #define SETBE(r) do { count_alu(); ALU2(0x0f96,(r),(r)); asm_output("setbe %s",gpn(r)); } while(0) #define SETA(r) do { count_alu(); ALU2(0x0f97,(r),(r)); asm_output("seta %s",gpn(r)); } while(0) #define SETAE(r) do { count_alu(); ALU2(0x0f93,(r),(r)); asm_output("setae %s",gpn(r)); } while(0) -#define SETC(r) do { count_alu(); ALU2(0x0f90,(r),(r)); asm_output("setc %s",gpn(r)); } while(0) #define SETO(r) do { count_alu(); ALU2(0x0f92,(r),(r)); asm_output("seto %s",gpn(r)); } while(0) #define MREQ(dr,sr) do { count_alu(); ALU2(0x0f44,dr,sr); asm_output("cmove %s,%s", gpn(dr),gpn(sr)); } while(0) @@ -405,7 +404,6 @@ namespace nanojit #define MRB(dr,sr) do { count_alu(); ALU2(0x0f42,dr,sr); asm_output("cmovb %s,%s", gpn(dr),gpn(sr)); } while(0) #define MRBE(dr,sr) do { count_alu(); ALU2(0x0f46,dr,sr); asm_output("cmovbe %s,%s", gpn(dr),gpn(sr)); } while(0) #define MRA(dr,sr) do { count_alu(); ALU2(0x0f47,dr,sr); asm_output("cmova %s,%s", gpn(dr),gpn(sr)); } while(0) -#define MRNC(dr,sr) do { count_alu(); ALU2(0x0f43,dr,sr); asm_output("cmovnc %s,%s", gpn(dr),gpn(sr)); } while(0) #define MRAE(dr,sr) do { count_alu(); ALU2(0x0f43,dr,sr); asm_output("cmovae %s,%s", gpn(dr),gpn(sr)); } while(0) #define MRNO(dr,sr) do { count_alu(); ALU2(0x0f41,dr,sr); asm_output("cmovno %s,%s", gpn(dr),gpn(sr)); } while(0) @@ -610,8 +608,6 @@ namespace nanojit #define JGE(t, isfar) JCC(0x0D, t, isfar, "jge") #define JNGE(t, isfar) JCC(0x0C, t, isfar, "jnge") -#define JC(t, isfar) JCC(0x02, t, isfar, "jc") -#define JNC(t, isfar) JCC(0x03, t, isfar, "jnc") #define JO(t, isfar) JCC(0x00, t, isfar, "jo") #define JNO(t, isfar) JCC(0x01, t, isfar, "jno")