From a365c30cae9540a1ebbfea2e5fd2f6ebac09bf10 Mon Sep 17 00:00:00 2001 From: Makoto Kato Date: Wed, 25 May 2011 17:37:27 +0900 Subject: [PATCH] Bug 576247 - asm_stkarg not implemented for x86_64. r=edwsmith --HG-- extra : convert_revision : 6176f4f11b273ddde0de661a2c2de0d2219515b2 --- js/src/nanojit/NativeX64.cpp | 6 +++++- js/src/nanojit/NativeX64.h | 4 +++- 2 files changed, 8 insertions(+), 2 deletions(-) diff --git a/js/src/nanojit/NativeX64.cpp b/js/src/nanojit/NativeX64.cpp index 343e67bd5f4..04a72a23b71 100644 --- a/js/src/nanojit/NativeX64.cpp +++ b/js/src/nanojit/NativeX64.cpp @@ -57,7 +57,6 @@ better code - disp64 branch/call - spill gp values to xmm registers? - prefer xmm registers for copies since gprs are in higher demand? -- stack arg doubles - stack based LIR_paramp tracing @@ -629,6 +628,7 @@ namespace nanojit void Assembler::MOVBMI(R r, I d, I32 imm) { emitrm_imm8(X64_movbmi,r,d,imm); asm_output("movb %d(%s), %d",d,RQ(r),imm); } void Assembler::MOVQSPR(I d, R r) { emit(X64_movqspr | U64(d) << 56 | U64((REGNUM(r)&7)<<3) << 40 | U64((REGNUM(r)&8)>>1) << 24); asm_output("movq %d(rsp), %s", d, RQ(r)); } // insert r into mod/rm and rex bytes + void Assembler::MOVQSPX(I d, R r) { emit(rexprb(X64_movqspx,RSP,r) | U64(d) << 56 | U64((REGNUM(r)&7)<<3) << 40); asm_output("movq %d(rsp), %s", d, RQ(r)); } void Assembler::XORPSA(R r, I32 i32) { emitxm_abs(X64_xorpsa, r, i32); asm_output("xorps %s, (0x%x)",RQ(r), i32); } void Assembler::XORPSM(R r, NIns* a64) { emitxm_rel(X64_xorpsm, r, a64); asm_output("xorps %s, (%p)", RQ(r), a64); } @@ -1077,6 +1077,10 @@ namespace nanojit NanoAssert(ty == ARGTYPE_Q); // Do nothing. } + } else if (ty == ARGTYPE_D) { + NanoAssert(p->isD()); + Register r = findRegFor(p, FpRegs); + MOVQSPX(stk_off, r); // movsd [rsp+d8], xmm } else { TODO(asm_stkarg_non_int); } diff --git a/js/src/nanojit/NativeX64.h b/js/src/nanojit/NativeX64.h index fcf4205f7ca..e46fe1b7edc 100644 --- a/js/src/nanojit/NativeX64.h +++ b/js/src/nanojit/NativeX64.h @@ -248,7 +248,8 @@ namespace nanojit X64_movlmr = 0x0000000080894007LL, // 32bit store r -> [b+d32] X64_movlrm = 0x00000000808B4007LL, // 32bit load r <- [b+d32] X64_movqmr = 0x0000000080894807LL, // 64bit store gpr -> [b+d32] - X64_movqspr = 0x0024448948000005LL, // 64bit store gpr -> [rsp+d32] (sib required) + X64_movqspr = 0x0024448948000005LL, // 64bit store gpr -> [rsp+d8] (sib required) + X64_movqspx = 0x002444110F40F207LL, // 64bit store xmm -> [rsp+d8] (sib required) X64_movqr = 0xC08B480000000003LL, // 64bit mov r <- b X64_movqi = 0xB848000000000002LL, // 64bit mov r <- imm64 X64_movi = 0xB840000000000002LL, // 32bit mov r <- immI @@ -608,6 +609,7 @@ namespace nanojit void CALLRAX();\ void RET();\ void MOVQSPR(int d, Register r);\ + void MOVQSPX(int d, Register r);\ void XORPSA(Register r, int32_t i32);\ void XORPSM(Register r, NIns* a64);\ void X86_AND8R(Register r);\